Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/include/llvm/Support/ARMTargetParser.h
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//===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a target parser to recognise ARM hardware features
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// such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_SUPPORT_ARMTARGETPARSER_H
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#define LLVM_SUPPORT_ARMTARGETPARSER_H
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#include "llvm/ADT/StringRef.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/Support/ARMBuildAttributes.h"
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#include <vector>
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namespace llvm {
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namespace ARM {
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// Arch extension modifiers for CPUs.
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// Note that this is not the same as the AArch64 list
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enum ArchExtKind : unsigned {
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  AEK_INVALID =     0,
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  AEK_NONE =        1,
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  AEK_CRC =         1 << 1,
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  AEK_CRYPTO =      1 << 2,
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  AEK_FP =          1 << 3,
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  AEK_HWDIVTHUMB =  1 << 4,
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  AEK_HWDIVARM =    1 << 5,
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  AEK_MP =          1 << 6,
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  AEK_SIMD =        1 << 7,
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  AEK_SEC =         1 << 8,
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  AEK_VIRT =        1 << 9,
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  AEK_DSP =         1 << 10,
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  AEK_FP16 =        1 << 11,
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  AEK_RAS =         1 << 12,
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  AEK_SVE =         1 << 13,
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  AEK_DOTPROD =     1 << 14,
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  AEK_SHA2    =     1 << 15,
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  AEK_AES     =     1 << 16,
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  AEK_FP16FML =     1 << 17,
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  AEK_SB      =     1 << 18,
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  AEK_SVE2 =        1 << 19,
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  AEK_SVE2AES =     1 << 20,
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  AEK_SVE2SM4 =     1 << 21,
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  AEK_SVE2SHA3 =    1 << 22,
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  AEK_BITPERM =     1 << 23,
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  AEK_FP_DP   =     1 << 24,
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  AEK_LOB     =     1 << 25,
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  // Unsupported extensions.
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  AEK_OS = 0x8000000,
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  AEK_IWMMXT = 0x10000000,
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  AEK_IWMMXT2 = 0x20000000,
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  AEK_MAVERICK = 0x40000000,
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  AEK_XSCALE = 0x80000000,
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};
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// List of Arch Extension names.
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// FIXME: TableGen this.
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struct ExtName {
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  const char *NameCStr;
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  size_t NameLength;
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  unsigned ID;
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  const char *Feature;
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  const char *NegFeature;
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9.36k
  StringRef getName() const { return StringRef(NameCStr, NameLength); }
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};
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const ExtName ARCHExtNames[] = {
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#define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)                       \
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  {NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE},
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#include "ARMTargetParser.def"
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};
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// List of HWDiv names (use getHWDivSynonym) and which architectural
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// features they correspond to (use getHWDivFeatures).
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// FIXME: TableGen this.
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const struct {
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  const char *NameCStr;
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  size_t NameLength;
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  unsigned ID;
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  StringRef getName() const { return StringRef(NameCStr, NameLength); }
Unexecuted instantiation: cc1as_main.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64TargetObjectFile.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64ELFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64MCAsmInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64MCExpr.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64TargetStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64WinCOFFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUAlwaysInlinePass.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUAnnotateKernelFeatures.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUAtomicOptimizer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUCallLowering.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUCodeGenPrepare.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUHSAMetadataStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUInstrInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUInstructionSelector.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUISelDAGToDAG.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUISelLowering.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPULegalizerInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPULibCalls.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPULowerIntrinsics.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPULowerKernelArguments.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPULowerKernelAttributes.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUMachineCFGStructurizer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUMachineFunction.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUMacroFusion.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUMCInstLower.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUPromoteAlloca.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUPropagateAttributes.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPURegisterBankInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPURegisterInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPURewriteOutArguments.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUSubtarget.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUTargetMachine.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUTargetObjectFile.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUTargetTransformInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUPerfHintAnalysis.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDILCFGStructurizer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: GCNHazardRecognizer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: GCNIterativeScheduler.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: GCNRegPressure.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: GCNSchedStrategy.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600AsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600ClauseMergePass.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600ControlFlowFinalizer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600EmitClauseMarkers.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600ExpandSpecialInstrs.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600FrameLowering.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600InstrInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600ISelLowering.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600MachineScheduler.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600OptimizeVectorRegisters.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600Packetizer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: R600RegisterInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIAddIMGInit.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIAnnotateControlFlow.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIFixSGPRCopies.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIFixupVectorISel.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIFixVGPRCopies.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIPreAllocateWWMRegs.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIFoldOperands.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIFormMemoryClauses.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIFrameLowering.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIInsertSkips.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIInsertWaitcnts.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIInstrInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIISelLowering.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SILoadStoreOptimizer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SILowerControlFlow.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SILowerI1Copies.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SILowerSGPRSpills.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIMachineFunctionInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIMachineScheduler.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIMemoryLegalizer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIOptimizeExecMasking.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIOptimizeExecMaskingPreRA.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIPeepholeSDWA.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIRegisterInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIShrinkInstructions.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIWholeQuadMode.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: GCNRegBankReassign.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: GCNNSAReassign.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: GCNDPPCombine.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIModeRegister.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUAsmBackend.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUELFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUInstPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUTargetStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SIMCCodeEmitter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUBaseInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPUPALMetadata.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMMCInstLower.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMSubtarget.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMTargetMachine.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMAsmBackend.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMELFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMMCExpr.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMTargetStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMWinCOFFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: BPFAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: BTFDebug.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: BPFAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: HexagonAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: HexagonMCInstLower.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: HexagonAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: HexagonMCELFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: HexagonMCExpr.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: HexagonMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: LanaiAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: LanaiAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: LanaiMCExpr.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: LanaiMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsDelaySlotFiller.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsBranchExpansion.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsMCInstLower.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsABIFlagsSection.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsELFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsMCExpr.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsNaClELFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsOptionRecord.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MipsTargetStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MSP430AsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MSP430AsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MSP430ELFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: NVPTXAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: NVPTXMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: NVPTXTargetStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: PPCAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: PPCAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: PPCMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: PPCMCExpr.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: RISCVAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: RISCVAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: RISCVMCExpr.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: RISCVMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: RISCVTargetStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: RISCVELFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SparcAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SparcAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SparcMCAsmInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SparcMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SparcMCExpr.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SparcTargetStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SystemZAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SystemZMCInstLower.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SystemZAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SystemZMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: WebAssemblyAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: WebAssemblyMCInstLower.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: WebAssemblyAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: WebAssemblyMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: WebAssemblyTargetStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86AsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86CallFrameOptimization.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86CallingConv.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86CallLowering.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86CmovConversion.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86CondBrFolding.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86DomainReassignment.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86DiscriminateMemOps.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86ExpandPseudo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86FastISel.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86FixupBWInsts.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86FixupLEAs.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86AvoidStoreForwardingBlocks.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86FixupSetCC.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86FlagsCopyLowering.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86FloatingPoint.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86FrameLowering.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86InstructionSelector.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86ISelDAGToDAG.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86ISelLowering.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86IndirectBranchTracking.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86InterleavedAccess.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86InsertPrefetch.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86InstrFMA3Info.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86InstrFoldTables.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86InstrInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86EvexToVex.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86LegalizerInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86MCInstLower.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86MacroFusion.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86OptimizeLEAs.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86PadShortFunction.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86RegisterBankInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86RegisterInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86RetpolineThunks.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86SelectionDAGInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86SpeculativeLoadHardening.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86Subtarget.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86TargetMachine.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86TargetTransformInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86VZeroUpper.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86WinAllocaExpander.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86AsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86ATTInstPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86IntelInstPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86InstComments.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86InstPrinterCommon.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86AsmBackend.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86MCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86MCAsmInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86MCCodeEmitter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86MachObjectWriter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86ELFObjectWriter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86WinCOFFObjectWriter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86WinCOFFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86WinCOFFTargetStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: XCoreAsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: XCoreMCTargetDesc.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: FaultMaps.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: LLVMTargetMachine.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: StackMaps.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: TargetLoweringObjectFileImpl.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ConstantPools.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCAsmInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCAsmStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCAssembler.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCCodePadder.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCCodeView.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCContext.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCDwarf.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCELFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCMachOStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCNullStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCObjectStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCWasmStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCWin64EH.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCWinCOFFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCWinEH.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: MCXCOFFStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: COFFAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DarwinAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ELFAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: WasmAsmParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64TargetParser.cpp:llvm::ARM::$_0::getName() const
ARMTargetParser.cpp:llvm::ARM::$_0::getName() const
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102
  StringRef getName() const { return StringRef(NameCStr, NameLength); }
Unexecuted instantiation: TargetParser.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: Triple.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: Host.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: TargetInfo.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: Targets.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AArch64.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AMDGPU.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARM.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: X86.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: CGBuiltin.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: SanitizerArgs.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ToolChain.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: RISCV.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: Clang.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: CommonArgs.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: Darwin.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: FreeBSD.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: Gnu.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: Linux.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: NetBSD.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AccelTable.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AddressPool.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ARMException.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AsmPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AsmPrinterDwarf.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: AsmPrinterInlineAsm.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DebugHandlerBase.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DebugLocStream.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DIE.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DIEHash.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DwarfCFIException.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DwarfCompileUnit.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DwarfDebug.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DwarfExpression.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DwarfFile.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DwarfStringPool.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: DwarfUnit.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: EHStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: WinCFGuard.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: WinException.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: CodeViewDebug.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: WasmException.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ParseStmtAsm.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: TargetLoweringObjectFile.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ModuleSymbolTable.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: RecordStreamer.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: ErlangGCPrinter.cpp:llvm::ARM::$_0::getName() const
Unexecuted instantiation: OcamlGCPrinter.cpp:llvm::ARM::$_0::getName() const
90
} HWDivNames[] = {
91
#define ARM_HW_DIV_NAME(NAME, ID) {NAME, sizeof(NAME) - 1, ID},
92
#include "ARMTargetParser.def"
93
};
94
95
// Arch names.
96
enum class ArchKind {
97
#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
98
#include "ARMTargetParser.def"
99
};
100
101
// List of CPU names and their arches.
102
// The same CPU can have multiple arches and can be default on multiple arches.
103
// When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
104
// When this becomes table-generated, we'd probably need two tables.
105
// FIXME: TableGen this.
106
template <typename T> struct CpuNames {
107
  const char *NameCStr;
108
  size_t NameLength;
109
  T ArchID;
110
  bool Default; // is $Name the default CPU for $ArchID ?
111
  unsigned DefaultExtensions;
112
113
1.39M
  StringRef getName() const { return StringRef(NameCStr, NameLength); }
llvm::ARM::CpuNames<llvm::AArch64::ArchKind>::getName() const
Line
Count
Source
113
300k
  StringRef getName() const { return StringRef(NameCStr, NameLength); }
llvm::ARM::CpuNames<llvm::ARM::ArchKind>::getName() const
Line
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113
1.09M
  StringRef getName() const { return StringRef(NameCStr, NameLength); }
114
};
115
116
const CpuNames<ArchKind> CPUNames[] = {
117
#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
118
  {NAME, sizeof(NAME) - 1, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
119
#include "ARMTargetParser.def"
120
};
121
122
// FPU names.
123
enum FPUKind {
124
#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
125
#include "ARMTargetParser.def"
126
  FK_LAST
127
};
128
129
// FPU Version
130
enum class FPUVersion {
131
  NONE,
132
  VFPV2,
133
  VFPV3,
134
  VFPV3_FP16,
135
  VFPV4,
136
  VFPV5,
137
  VFPV5_FULLFP16,
138
};
139
140
// An FPU name restricts the FPU in one of three ways:
141
enum class FPURestriction {
142
  None = 0, ///< No restriction
143
  D16,      ///< Only 16 D registers
144
  SP_D16    ///< Only single-precision instructions, with 16 D registers
145
};
146
147
// An FPU name implies one of three levels of Neon support:
148
enum class NeonSupportLevel {
149
  None = 0, ///< No Neon
150
  Neon,     ///< Neon
151
  Crypto    ///< Neon with Crypto
152
};
153
154
// ISA kinds.
155
enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
156
157
// Endianness
158
// FIXME: BE8 vs. BE32?
159
enum class EndianKind { INVALID = 0, LITTLE, BIG };
160
161
// v6/v7/v8 Profile
162
enum class ProfileKind { INVALID = 0, A, R, M };
163
164
// List of canonical FPU names (use getFPUSynonym) and which architectural
165
// features they correspond to (use getFPUFeatures).
166
// FIXME: TableGen this.
167
// The entries must appear in the order listed in ARM::FPUKind for correct
168
// indexing
169
struct FPUName {
170
  const char *NameCStr;
171
  size_t NameLength;
172
  FPUKind ID;
173
  FPUVersion FPUVer;
174
  NeonSupportLevel NeonSupport;
175
  FPURestriction Restriction;
176
177
4.30k
  StringRef getName() const { return StringRef(NameCStr, NameLength); }
178
};
179
180
static const FPUName FPUNames[] = {
181
#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION)                \
182
  {NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION},
183
#include "llvm/Support/ARMTargetParser.def"
184
};
185
186
// List of canonical arch names (use getArchSynonym).
187
// This table also provides the build attribute fields for CPU arch
188
// and Arch ID, according to the Addenda to the ARM ABI, chapters
189
// 2.4 and 2.3.5.2 respectively.
190
// FIXME: SubArch values were simplified to fit into the expectations
191
// of the triples and are not conforming with their official names.
192
// Check to see if the expectation should be changed.
193
// FIXME: TableGen this.
194
template <typename T> struct ArchNames {
195
  const char *NameCStr;
196
  size_t NameLength;
197
  const char *CPUAttrCStr;
198
  size_t CPUAttrLength;
199
  const char *SubArchCStr;
200
  size_t SubArchLength;
201
  unsigned DefaultFPU;
202
  unsigned ArchBaseExtensions;
203
  T ID;
204
  ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
205
206
56.7M
  StringRef getName() const { return StringRef(NameCStr, NameLength); }
llvm::ARM::ArchNames<llvm::AArch64::ArchKind>::getName() const
Line
Count
Source
206
1.31k
  StringRef getName() const { return StringRef(NameCStr, NameLength); }
llvm::ARM::ArchNames<llvm::ARM::ArchKind>::getName() const
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Source
206
56.7M
  StringRef getName() const { return StringRef(NameCStr, NameLength); }
207
208
  // CPU class in build attributes.
209
1.16k
  StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
llvm::ARM::ArchNames<llvm::AArch64::ArchKind>::getCPUAttr() const
Line
Count
Source
209
25
  StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
llvm::ARM::ArchNames<llvm::ARM::ArchKind>::getCPUAttr() const
Line
Count
Source
209
1.13k
  StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
210
211
  // Sub-Arch name.
212
16.1k
  StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
llvm::ARM::ArchNames<llvm::AArch64::ArchKind>::getSubArch() const
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Count
Source
212
6
  StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
llvm::ARM::ArchNames<llvm::ARM::ArchKind>::getSubArch() const
Line
Count
Source
212
16.1k
  StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
213
};
214
215
static const ArchNames<ArchKind> ARCHNames[] = {
216
#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU,            \
217
                 ARCH_BASE_EXT)                                                \
218
  {NAME,         sizeof(NAME) - 1,                                             \
219
   CPU_ATTR,     sizeof(CPU_ATTR) - 1,                                         \
220
   SUB_ARCH,     sizeof(SUB_ARCH) - 1,                                         \
221
   ARCH_FPU,     ARCH_BASE_EXT,                                                \
222
   ArchKind::ID, ARCH_ATTR},
223
#include "llvm/Support/ARMTargetParser.def"
224
};
225
226
// Information by ID
227
StringRef getFPUName(unsigned FPUKind);
228
FPUVersion getFPUVersion(unsigned FPUKind);
229
NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
230
FPURestriction getFPURestriction(unsigned FPUKind);
231
232
// FIXME: These should be moved to TargetTuple once it exists
233
bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
234
bool getHWDivFeatures(unsigned HWDivKind, std::vector<StringRef> &Features);
235
bool getExtensionFeatures(unsigned Extensions,
236
                          std::vector<StringRef> &Features);
237
238
StringRef getArchName(ArchKind AK);
239
unsigned getArchAttr(ArchKind AK);
240
StringRef getCPUAttr(ArchKind AK);
241
StringRef getSubArch(ArchKind AK);
242
StringRef getArchExtName(unsigned ArchExtKind);
243
StringRef getArchExtFeature(StringRef ArchExt);
244
bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt,
245
                           std::vector<StringRef> &Features);
246
StringRef getHWDivName(unsigned HWDivKind);
247
248
// Information by Name
249
unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
250
unsigned getDefaultExtensions(StringRef CPU, ArchKind AK);
251
StringRef getDefaultCPU(StringRef Arch);
252
StringRef getCanonicalArchName(StringRef Arch);
253
StringRef getFPUSynonym(StringRef FPU);
254
StringRef getArchSynonym(StringRef Arch);
255
256
// Parser
257
unsigned parseHWDiv(StringRef HWDiv);
258
unsigned parseFPU(StringRef FPU);
259
ArchKind parseArch(StringRef Arch);
260
unsigned parseArchExt(StringRef ArchExt);
261
ArchKind parseCPUArch(StringRef CPU);
262
ISAKind parseArchISA(StringRef Arch);
263
EndianKind parseArchEndian(StringRef Arch);
264
ProfileKind parseArchProfile(StringRef Arch);
265
unsigned parseArchVersion(StringRef Arch);
266
267
void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
268
StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);
269
270
} // namespace ARM
271
} // namespace llvm
272
273
#endif