Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/include/llvm/Target/TargetMachine.h
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//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the TargetMachine and LLVMTargetMachine classes.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_TARGETMACHINE_H
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#define LLVM_TARGET_TARGETMACHINE_H
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#include "llvm/ADT/StringRef.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Target/TargetOptions.h"
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#include <string>
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namespace llvm {
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class Function;
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class GlobalValue;
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class MachineModuleInfo;
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class Mangler;
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class MCAsmInfo;
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class MCContext;
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class MCInstrInfo;
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class MCRegisterInfo;
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class MCSubtargetInfo;
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class MCSymbol;
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class raw_pwrite_stream;
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class PassManagerBuilder;
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struct PerFunctionMIParsingState;
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class SMDiagnostic;
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class SMRange;
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class Target;
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class TargetIntrinsicInfo;
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class TargetIRAnalysis;
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class TargetTransformInfo;
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class TargetLoweringObjectFile;
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class TargetPassConfig;
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class TargetSubtargetInfo;
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// The old pass manager infrastructure is hidden in a legacy namespace now.
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namespace legacy {
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class PassManagerBase;
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}
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using legacy::PassManagerBase;
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namespace yaml {
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struct MachineFunctionInfo;
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}
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//===----------------------------------------------------------------------===//
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///
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/// Primary interface to the complete machine description for the target
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/// machine.  All target-specific information should be accessible through this
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/// interface.
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///
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class TargetMachine {
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protected: // Can only create subclasses.
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  TargetMachine(const Target &T, StringRef DataLayoutString,
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                const Triple &TargetTriple, StringRef CPU, StringRef FS,
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                const TargetOptions &Options);
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  /// The Target that this machine was created for.
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  const Target &TheTarget;
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  /// DataLayout for the target: keep ABI type size and alignment.
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  ///
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  /// The DataLayout is created based on the string representation provided
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  /// during construction. It is kept here only to avoid reparsing the string
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  /// but should not really be used during compilation, because it has an
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  /// internal cache that is context specific.
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  const DataLayout DL;
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  /// Triple string, CPU name, and target feature strings the TargetMachine
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  /// instance is created with.
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  Triple TargetTriple;
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  std::string TargetCPU;
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  std::string TargetFS;
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  Reloc::Model RM = Reloc::Static;
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  CodeModel::Model CMModel = CodeModel::Small;
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  CodeGenOpt::Level OptLevel = CodeGenOpt::Default;
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  /// Contains target specific asm information.
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  std::unique_ptr<const MCAsmInfo> AsmInfo;
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  std::unique_ptr<const MCRegisterInfo> MRI;
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  std::unique_ptr<const MCInstrInfo> MII;
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  std::unique_ptr<const MCSubtargetInfo> STI;
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  unsigned RequireStructuredCFG : 1;
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  unsigned O0WantsFastISel : 1;
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public:
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  const TargetOptions DefaultOptions;
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  mutable TargetOptions Options;
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  TargetMachine(const TargetMachine &) = delete;
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  void operator=(const TargetMachine &) = delete;
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  virtual ~TargetMachine();
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521k
  const Target &getTarget() const { return TheTarget; }
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11.9M
  const Triple &getTargetTriple() const { return TargetTriple; }
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315k
  StringRef getTargetCPU() const { return TargetCPU; }
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1.14M
  StringRef getTargetFeatureString() const { return TargetFS; }
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  /// Virtual method implemented by subclasses that returns a reference to that
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  /// target's TargetSubtargetInfo-derived member variable.
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0
  virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const {
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0
    return nullptr;
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0
  }
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  virtual TargetLoweringObjectFile *getObjFileLowering() const {
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    return nullptr;
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  }
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  /// Allocate and return a default initialized instance of the YAML
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  /// representation for the MachineFunctionInfo.
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5.66k
  virtual yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const {
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5.66k
    return nullptr;
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5.66k
  }
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  /// Allocate and initialize an instance of the YAML representation of the
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  /// MachineFunctionInfo.
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  virtual yaml::MachineFunctionInfo *
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6.10k
  convertFuncInfoToYAML(const MachineFunction &MF) const {
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6.10k
    return nullptr;
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6.10k
  }
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  /// Parse out the target's MachineFunctionInfo from the YAML reprsentation.
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  virtual bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
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                                        PerFunctionMIParsingState &PFS,
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                                        SMDiagnostic &Error,
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0
                                        SMRange &SourceRange) const {
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    return false;
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0
  }
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  /// This method returns a pointer to the specified type of
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  /// TargetSubtargetInfo.  In debug builds, it verifies that the object being
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  /// returned is of the correct type.
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  template <typename STC> const STC &getSubtarget(const Function &F) const {
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    return *static_cast<const STC*>(getSubtargetImpl(F));
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  }
llvm::GCNSubtarget const& llvm::TargetMachine::getSubtarget<llvm::GCNSubtarget>(llvm::Function const&) const
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  template <typename STC> const STC &getSubtarget(const Function &F) const {
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    return *static_cast<const STC*>(getSubtargetImpl(F));
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  }
llvm::R600Subtarget const& llvm::TargetMachine::getSubtarget<llvm::R600Subtarget>(llvm::Function const&) const
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5.08k
  template <typename STC> const STC &getSubtarget(const Function &F) const {
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    return *static_cast<const STC*>(getSubtargetImpl(F));
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  }
llvm::ARMSubtarget const& llvm::TargetMachine::getSubtarget<llvm::ARMSubtarget>(llvm::Function const&) const
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66.7k
  template <typename STC> const STC &getSubtarget(const Function &F) const {
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    return *static_cast<const STC*>(getSubtargetImpl(F));
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  }
llvm::NVPTXSubtarget const& llvm::TargetMachine::getSubtarget<llvm::NVPTXSubtarget>(llvm::Function const&) const
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3.41k
  template <typename STC> const STC &getSubtarget(const Function &F) const {
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    return *static_cast<const STC*>(getSubtargetImpl(F));
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  }
Unexecuted instantiation: llvm::PPCSubtarget const& llvm::TargetMachine::getSubtarget<llvm::PPCSubtarget>(llvm::Function const&) const
llvm::WebAssemblySubtarget const& llvm::TargetMachine::getSubtarget<llvm::WebAssemblySubtarget>(llvm::Function const&) const
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22.1k
  template <typename STC> const STC &getSubtarget(const Function &F) const {
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    return *static_cast<const STC*>(getSubtargetImpl(F));
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  }
llvm::X86Subtarget const& llvm::TargetMachine::getSubtarget<llvm::X86Subtarget>(llvm::Function const&) const
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3.06k
  template <typename STC> const STC &getSubtarget(const Function &F) const {
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    return *static_cast<const STC*>(getSubtargetImpl(F));
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  }
llvm::TargetSubtargetInfo const& llvm::TargetMachine::getSubtarget<llvm::TargetSubtargetInfo>(llvm::Function const&) const
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  template <typename STC> const STC &getSubtarget(const Function &F) const {
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    return *static_cast<const STC*>(getSubtargetImpl(F));
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  }
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  /// Create a DataLayout.
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  const DataLayout createDataLayout() const { return DL; }
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  /// Test if a DataLayout if compatible with the CodeGen for this target.
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  ///
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  /// The LLVM Module owns a DataLayout that is used for the target independent
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  /// optimizations and code generation. This hook provides a target specific
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  /// check on the validity of this DataLayout.
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  bool isCompatibleDataLayout(const DataLayout &Candidate) const {
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    return DL == Candidate;
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  }
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  /// Get the pointer size for this target.
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  ///
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  /// This is the only time the DataLayout in the TargetMachine is used.
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1.94M
  unsigned getPointerSize(unsigned AS) const {
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1.94M
    return DL.getPointerSize(AS);
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1.94M
  }
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68.1k
  unsigned getPointerSizeInBits(unsigned AS) const {
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    return DL.getPointerSizeInBits(AS);
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68.1k
  }
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  unsigned getProgramPointerSize() const {
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    return DL.getPointerSize(DL.getProgramAddressSpace());
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  }
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  unsigned getAllocaPointerSize() const {
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    return DL.getPointerSize(DL.getAllocaAddrSpace());
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  }
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  /// Reset the target options based on the function's attributes.
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  // FIXME: Remove TargetOptions that affect per-function code generation
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  // from TargetMachine.
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  void resetTargetOptions(const Function &F) const;
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  /// Return target specific asm information.
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63.5M
  const MCAsmInfo *getMCAsmInfo() const { return AsmInfo.get(); }
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74.5k
  const MCRegisterInfo *getMCRegisterInfo() const { return MRI.get(); }
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36.1k
  const MCInstrInfo *getMCInstrInfo() const { return MII.get(); }
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161k
  const MCSubtargetInfo *getMCSubtargetInfo() const { return STI.get(); }
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  /// If intrinsic information is available, return it.  If not, return null.
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2.15M
  virtual const TargetIntrinsicInfo *getIntrinsicInfo() const {
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2.15M
    return nullptr;
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2.15M
  }
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7.56M
  bool requiresStructuredCFG() const { return RequireStructuredCFG; }
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750
  void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }
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  /// Returns the code generation relocation model. The choices are static, PIC,
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  /// and dynamic-no-pic, and target default.
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  Reloc::Model getRelocationModel() const;
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  /// Returns the code model. The choices are small, kernel, medium, large, and
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  /// target default.
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  CodeModel::Model getCodeModel() const;
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  bool isPositionIndependent() const;
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  bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const;
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  /// Returns true if this target uses emulated TLS.
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  bool useEmulatedTLS() const;
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  /// Returns the TLS model which should be used for the given global variable.
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  TLSModel::Model getTLSModel(const GlobalValue *GV) const;
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  /// Returns the optimization level: None, Less, Default, or Aggressive.
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  CodeGenOpt::Level getOptLevel() const;
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  /// Overrides the optimization level.
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  void setOptLevel(CodeGenOpt::Level Level);
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  void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
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1.84k
  bool getO0WantsFastISel() { return O0WantsFastISel; }
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36.3k
  void setO0WantsFastISel(bool Enable) { O0WantsFastISel = Enable; }
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  void setGlobalISel(bool Enable) { Options.EnableGlobalISel = Enable; }
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  void setGlobalISelAbort(GlobalISelAbortMode Mode) {
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    Options.GlobalISelAbort = Mode;
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  }
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  void setMachineOutliner(bool Enable) {
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27.1k
    Options.EnableMachineOutliner = Enable;
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27.1k
  }
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9.63k
  void setSupportsDefaultOutlining(bool Enable) {
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9.63k
    Options.SupportsDefaultOutlining = Enable;
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  }
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2.15M
  bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
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5.21k
  bool getUniqueSectionNames() const { return Options.UniqueSectionNames; }
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  /// Return true if data objects should be emitted into their own section,
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  /// corresponds to -fdata-sections.
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9.23k
  bool getDataSections() const {
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9.23k
    return Options.DataSections;
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9.23k
  }
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  /// Return true if functions should be emitted into their own section,
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  /// corresponding to -ffunction-sections.
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202k
  bool getFunctionSections() const {
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202k
    return Options.FunctionSections;
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  }
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  /// Get a \c TargetIRAnalysis appropriate for the target.
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  ///
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  /// This is used to construct the new pass manager's target IR analysis pass,
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  /// set up appropriately for this target machine. Even the old pass manager
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  /// uses this to answer queries about the IR.
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  TargetIRAnalysis getTargetIRAnalysis();
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  /// Return a TargetTransformInfo for a given function.
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  ///
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  /// The returned TargetTransformInfo is specialized to the subtarget
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  /// corresponding to \p F.
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  virtual TargetTransformInfo getTargetTransformInfo(const Function &F);
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  /// Allow the target to modify the pass manager, e.g. by calling
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  /// PassManagerBuilder::addExtension.
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20.8k
  virtual void adjustPassManager(PassManagerBuilder &) {}
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  /// These enums are meant to be passed into addPassesToEmitFile to indicate
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  /// what type of file to emit, and returned by it to indicate what type of
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  /// file could actually be made.
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  enum CodeGenFileType {
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    CGFT_AssemblyFile,
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    CGFT_ObjectFile,
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    CGFT_Null         // Do not emit any output.
281
  };
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  /// Add passes to the specified pass manager to get the specified file
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  /// emitted.  Typically this will involve several steps of code generation.
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  /// This method should return true if emission of this file type is not
286
  /// supported, or false on success.
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  /// \p MMI is an optional parameter that, if set to non-nullptr,
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  /// will be used to set the MachineModuloInfo for this PM.
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  virtual bool addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &,
290
                                   raw_pwrite_stream *, CodeGenFileType,
291
                                   bool /*DisableVerify*/ = true,
292
0
                                   MachineModuleInfo *MMI = nullptr) {
293
0
    return true;
294
0
  }
295
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  /// Add passes to the specified pass manager to get machine code emitted with
297
  /// the MCJIT. This method returns true if machine code is not supported. It
298
  /// fills the MCContext Ctx pointer which can be used to build custom
299
  /// MCStreamer.
300
  ///
301
  virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&,
302
                                 raw_pwrite_stream &,
303
0
                                 bool /*DisableVerify*/ = true) {
304
0
    return true;
305
0
  }
306
307
  /// True if subtarget inserts the final scheduling pass on its own.
308
  ///
309
  /// Branch relaxation, which must happen after block placement, can
310
  /// on some targets (e.g. SystemZ) expose additional post-RA
311
  /// scheduling opportunities.
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33.5k
  virtual bool targetSchedulesPostRAScheduling() const { return false; };
313
314
  void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
315
                         Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
316
  MCSymbol *getSymbol(const GlobalValue *GV) const;
317
};
318
319
/// This class describes a target machine that is implemented with the LLVM
320
/// target-independent code generator.
321
///
322
class LLVMTargetMachine : public TargetMachine {
323
protected: // Can only create subclasses.
324
  LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
325
                    const Triple &TT, StringRef CPU, StringRef FS,
326
                    const TargetOptions &Options, Reloc::Model RM,
327
                    CodeModel::Model CM, CodeGenOpt::Level OL);
328
329
  void initAsmInfo();
330
331
public:
332
  /// Get a TargetTransformInfo implementation for the target.
333
  ///
334
  /// The TTI returned uses the common code generator to answer queries about
335
  /// the IR.
336
  TargetTransformInfo getTargetTransformInfo(const Function &F) override;
337
338
  /// Create a pass configuration object to be used by addPassToEmitX methods
339
  /// for generating a pipeline of CodeGen passes.
340
  virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
341
342
  /// Add passes to the specified pass manager to get the specified file
343
  /// emitted.  Typically this will involve several steps of code generation.
344
  /// \p MMI is an optional parameter that, if set to non-nullptr,
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  /// will be used to set the MachineModuloInfofor this PM.
346
  bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
347
                           raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
348
                           bool DisableVerify = true,
349
                           MachineModuleInfo *MMI = nullptr) override;
350
351
  /// Add passes to the specified pass manager to get machine code emitted with
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  /// the MCJIT. This method returns true if machine code is not supported. It
353
  /// fills the MCContext Ctx pointer which can be used to build custom
354
  /// MCStreamer.
355
  bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
356
                         raw_pwrite_stream &Out,
357
                         bool DisableVerify = true) override;
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359
  /// Returns true if the target is expected to pass all machine verifier
360
  /// checks. This is a stopgap measure to fix targets one by one. We will
361
  /// remove this at some point and always enable the verifier when
362
  /// EXPENSIVE_CHECKS is enabled.
363
0
  virtual bool isMachineVerifierClean() const { return true; }
364
365
  /// Adds an AsmPrinter pass to the pipeline that prints assembly or
366
  /// machine code from the MI representation.
367
  bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
368
                     raw_pwrite_stream *DwoOut, CodeGenFileType FileTYpe,
369
                     MCContext &Context);
370
371
  /// True if the target uses physical regs at Prolog/Epilog insertion
372
  /// time. If true (most machines), all vregs must be allocated before
373
  /// PEI. If false (virtual-register machines), then callee-save register
374
  /// spilling and scavenging are not needed or used.
375
492k
  virtual bool usesPhysRegsForPEI() const { return true; }
376
377
  /// True if the target wants to use interprocedural register allocation by
378
  /// default. The -enable-ipra flag can be used to override this.
379
39.0k
  virtual bool useIPRA() const {
380
39.0k
    return false;
381
39.0k
  }
382
};
383
384
/// Helper method for getting the code model, returning Default if
385
/// CM does not have a value. The tiny and kernel models will produce
386
/// an error, so targets that support them or require more complex codemodel
387
/// selection logic should implement and call their own getEffectiveCodeModel.
388
inline CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM,
389
14.9k
                                              CodeModel::Model Default) {
390
14.9k
  if (CM) {
391
19
    // By default, targets do not support the tiny and kernel models.
392
19
    if (*CM == CodeModel::Tiny)
393
2
      report_fatal_error("Target does not support the tiny CodeModel", false);
394
17
    if (*CM == CodeModel::Kernel)
395
2
      report_fatal_error("Target does not support the kernel CodeModel", false);
396
15
    return *CM;
397
15
  }
398
14.9k
  return Default;
399
14.9k
}
400
401
} // end namespace llvm
402
403
#endif // LLVM_TARGET_TARGETMACHINE_H