Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/LiveRegUnits.cpp
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//===- LiveRegUnits.cpp - Register Unit Set -------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This file imlements the LiveRegUnits set.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/LiveRegUnits.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBundle.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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using namespace llvm;
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44.3k
void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) {
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5.15M
  for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; 
++U5.10M
) {
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    for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); 
++RootReg5.10M
) {
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      if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
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4.20M
        Units.reset(U);
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5.10M
    }
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  }
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}
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1.24M
void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) {
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  for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; 
++U142M
) {
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    for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); 
++RootReg142M
) {
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      if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
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        Units.set(U);
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    }
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  }
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1.24M
}
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596k
void LiveRegUnits::stepBackward(const MachineInstr &MI) {
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  // Remove defined registers and regmask kills from the set.
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  for (ConstMIBundleOperands O(MI); O.isValid(); 
++O1.94M
) {
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    if (O->isReg()) {
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1.29M
      if (!O->isDef() || 
O->isDebug()483k
)
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        continue;
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      unsigned Reg = O->getReg();
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      if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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        continue;
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      removeReg(Reg);
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    } else if (O->isRegMask())
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      removeRegsNotPreserved(O->getRegMask());
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1.94M
  }
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  // Add uses to the set.
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  for (ConstMIBundleOperands O(MI); O.isValid(); 
++O1.94M
) {
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1.94M
    if (!O->isReg() || 
!O->readsReg()1.29M
||
O->isDebug()807k
)
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1.13M
      continue;
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807k
    unsigned Reg = O->getReg();
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807k
    if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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      continue;
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    addReg(Reg);
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  }
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}
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void LiveRegUnits::accumulate(const MachineInstr &MI) {
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  // Add defs, uses and regmask clobbers to the set.
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  for (ConstMIBundleOperands O(MI); O.isValid(); 
++O41.2k
) {
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    if (O->isReg()) {
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      unsigned Reg = O->getReg();
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      if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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        continue;
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      if (!O->isDef() && 
!O->readsReg()11.1k
)
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        continue;
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      addReg(Reg);
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    } else if (O->isRegMask())
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      addRegsInMask(O->getRegMask());
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  }
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}
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/// Add live-in registers of basic block \p MBB to \p LiveUnits.
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static void addBlockLiveIns(LiveRegUnits &LiveUnits,
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                            const MachineBasicBlock &MBB) {
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  for (const auto &LI : MBB.liveins())
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2.01M
    LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
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}
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/// Adds all callee saved registers to \p LiveUnits.
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static void addCalleeSavedRegs(LiveRegUnits &LiveUnits,
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85.0k
                               const MachineFunction &MF) {
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  const MachineRegisterInfo &MRI = MF.getRegInfo();
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  for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; 
++CSR1.76M
)
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    LiveUnits.addReg(*CSR);
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}
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void LiveRegUnits::addPristines(const MachineFunction &MF) {
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  const MachineFrameInfo &MFI = MF.getFrameInfo();
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  if (!MFI.isCalleeSavedInfoValid())
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    return;
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  /// This function will usually be called on an empty object, handle this
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  /// as a special case.
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  if (empty()) {
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    /// Add all callee saved regs, then remove the ones that are saved and
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    /// restored.
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    addCalleeSavedRegs(*this, MF);
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    /// Remove the ones that are not saved/restored; they are pristine.
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    for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
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      removeReg(Info.getReg());
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    return;
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  }
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  /// If a callee-saved register that is not pristine is already present
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  /// in the set, we should make sure that it stays in it. Precompute the
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  /// set of pristine registers in a separate object.
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  /// Add all callee saved regs, then remove the ones that are saved+restored.
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  LiveRegUnits Pristine(*TRI);
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  addCalleeSavedRegs(Pristine, MF);
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  /// Remove the ones that are not saved/restored; they are pristine.
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  for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
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    Pristine.removeReg(Info.getReg());
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  addUnits(Pristine.getBitVector());
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}
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void LiveRegUnits::addLiveOuts(const MachineBasicBlock &MBB) {
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  const MachineFunction &MF = *MBB.getParent();
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  addPristines(MF);
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  // To get the live-outs we simply merge the live-ins of all successors.
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  for (const MachineBasicBlock *Succ : MBB.successors())
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    addBlockLiveIns(*this, *Succ);
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81.2k
  // For the return block: Add all callee saved registers.
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  if (MBB.isReturnBlock()) {
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    const MachineFrameInfo &MFI = MF.getFrameInfo();
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    if (MFI.isCalleeSavedInfoValid())
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      addCalleeSavedRegs(*this, MF);
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  }
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}
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void LiveRegUnits::addLiveIns(const MachineBasicBlock &MBB) {
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  const MachineFunction &MF = *MBB.getParent();
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  addPristines(MF);
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  addBlockLiveIns(*this, MBB);
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}