Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/MachineCopyPropagation.cpp
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//===- MachineCopyPropagation.cpp - Machine Copy Propagation Pass ---------===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
//
9
// This is an extremely simple MachineInstr-level copy propagation pass.
10
//
11
// This pass forwards the source of COPYs to the users of their destinations
12
// when doing so is legal.  For example:
13
//
14
//   %reg1 = COPY %reg0
15
//   ...
16
//   ... = OP %reg1
17
//
18
// If
19
//   - %reg0 has not been clobbered by the time of the use of %reg1
20
//   - the register class constraints are satisfied
21
//   - the COPY def is the only value that reaches OP
22
// then this pass replaces the above with:
23
//
24
//   %reg1 = COPY %reg0
25
//   ...
26
//   ... = OP %reg0
27
//
28
// This pass also removes some redundant COPYs.  For example:
29
//
30
//    %R1 = COPY %R0
31
//    ... // No clobber of %R1
32
//    %R0 = COPY %R1 <<< Removed
33
//
34
// or
35
//
36
//    %R1 = COPY %R0
37
//    ... // No clobber of %R0
38
//    %R1 = COPY %R0 <<< Removed
39
//
40
//===----------------------------------------------------------------------===//
41
42
#include "llvm/ADT/DenseMap.h"
43
#include "llvm/ADT/STLExtras.h"
44
#include "llvm/ADT/SetVector.h"
45
#include "llvm/ADT/SmallVector.h"
46
#include "llvm/ADT/Statistic.h"
47
#include "llvm/ADT/iterator_range.h"
48
#include "llvm/CodeGen/MachineBasicBlock.h"
49
#include "llvm/CodeGen/MachineFunction.h"
50
#include "llvm/CodeGen/MachineFunctionPass.h"
51
#include "llvm/CodeGen/MachineInstr.h"
52
#include "llvm/CodeGen/MachineOperand.h"
53
#include "llvm/CodeGen/MachineRegisterInfo.h"
54
#include "llvm/CodeGen/TargetInstrInfo.h"
55
#include "llvm/CodeGen/TargetRegisterInfo.h"
56
#include "llvm/CodeGen/TargetSubtargetInfo.h"
57
#include "llvm/MC/MCRegisterInfo.h"
58
#include "llvm/Pass.h"
59
#include "llvm/Support/Debug.h"
60
#include "llvm/Support/DebugCounter.h"
61
#include "llvm/Support/raw_ostream.h"
62
#include <cassert>
63
#include <iterator>
64
65
using namespace llvm;
66
67
#define DEBUG_TYPE "machine-cp"
68
69
STATISTIC(NumDeletes, "Number of dead copies deleted");
70
STATISTIC(NumCopyForwards, "Number of copy uses forwarded");
71
DEBUG_COUNTER(FwdCounter, "machine-cp-fwd",
72
              "Controls which register COPYs are forwarded");
73
74
namespace {
75
76
class CopyTracker {
77
  struct CopyInfo {
78
    MachineInstr *MI;
79
    SmallVector<unsigned, 4> DefRegs;
80
    bool Avail;
81
  };
82
83
  DenseMap<unsigned, CopyInfo> Copies;
84
85
public:
86
  /// Mark all of the given registers and their subregisters as unavailable for
87
  /// copying.
88
  void markRegsUnavailable(ArrayRef<unsigned> Regs,
89
6.11M
                           const TargetRegisterInfo &TRI) {
90
6.11M
    for (unsigned Reg : Regs) {
91
3.93M
      // Source of copy is no longer available for propagation.
92
9.49M
      for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); 
++RUI5.55M
) {
93
5.55M
        auto CI = Copies.find(*RUI);
94
5.55M
        if (CI != Copies.end())
95
4.69M
          CI->second.Avail = false;
96
5.55M
      }
97
3.93M
    }
98
6.11M
  }
99
100
  /// Clobber a single register, removing it from the tracker's copy maps.
101
36.2M
  void clobberRegister(unsigned Reg, const TargetRegisterInfo &TRI) {
102
78.6M
    for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); 
++RUI42.4M
) {
103
42.4M
      auto I = Copies.find(*RUI);
104
42.4M
      if (I != Copies.end()) {
105
3.71M
        // When we clobber the source of a copy, we need to clobber everything
106
3.71M
        // it defined.
107
3.71M
        markRegsUnavailable(I->second.DefRegs, TRI);
108
3.71M
        // When we clobber the destination of a copy, we need to clobber the
109
3.71M
        // whole register it defined.
110
3.71M
        if (MachineInstr *MI = I->second.MI)
111
2.40M
          markRegsUnavailable({MI->getOperand(0).getReg()}, TRI);
112
3.71M
        // Now we can erase the copy.
113
3.71M
        Copies.erase(I);
114
3.71M
      }
115
42.4M
    }
116
36.2M
  }
117
118
  /// Add this copy's registers into the tracker's copy maps.
119
4.83M
  void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI) {
120
4.83M
    assert(MI->isCopy() && "Tracking non-copy?");
121
4.83M
122
4.83M
    unsigned Def = MI->getOperand(0).getReg();
123
4.83M
    unsigned Src = MI->getOperand(1).getReg();
124
4.83M
125
4.83M
    // Remember Def is defined by the copy.
126
10.5M
    for (MCRegUnitIterator RUI(Def, &TRI); RUI.isValid(); 
++RUI5.73M
)
127
5.73M
      Copies[*RUI] = {MI, {}, true};
128
4.83M
129
4.83M
    // Remember source that's copied to Def. Once it's clobbered, then
130
4.83M
    // it's no longer available for copy propagation.
131
10.5M
    for (MCRegUnitIterator RUI(Src, &TRI); RUI.isValid(); 
++RUI5.75M
) {
132
5.75M
      auto I = Copies.insert({*RUI, {nullptr, {}, false}});
133
5.75M
      auto &Copy = I.first->second;
134
5.75M
      if (!is_contained(Copy.DefRegs, Def))
135
4.97M
        Copy.DefRegs.push_back(Def);
136
5.75M
    }
137
4.83M
  }
138
139
37.8M
  bool hasAnyCopies() {
140
37.8M
    return !Copies.empty();
141
37.8M
  }
142
143
  MachineInstr *findCopyForUnit(unsigned RegUnit, const TargetRegisterInfo &TRI,
144
74.6M
                         bool MustBeAvailable = false) {
145
74.6M
    auto CI = Copies.find(RegUnit);
146
74.6M
    if (CI == Copies.end())
147
62.9M
      return nullptr;
148
11.6M
    if (MustBeAvailable && 
!CI->second.Avail4.77M
)
149
3.04M
      return nullptr;
150
8.64M
    return CI->second.MI;
151
8.64M
  }
152
153
  MachineInstr *findAvailCopy(MachineInstr &DestCopy, unsigned Reg,
154
16.3M
                              const TargetRegisterInfo &TRI) {
155
16.3M
    // We check the first RegUnit here, since we'll only be interested in the
156
16.3M
    // copy if it copies the entire register anyway.
157
16.3M
    MCRegUnitIterator RUI(Reg, &TRI);
158
16.3M
    MachineInstr *AvailCopy =
159
16.3M
        findCopyForUnit(*RUI, TRI, /*MustBeAvailable=*/true);
160
16.3M
    if (!AvailCopy ||
161
16.3M
        
!TRI.isSubRegisterEq(AvailCopy->getOperand(0).getReg(), Reg)1.72M
)
162
14.7M
      return nullptr;
163
1.64M
164
1.64M
    // Check that the available copy isn't clobbered by any regmasks between
165
1.64M
    // itself and the destination.
166
1.64M
    unsigned AvailSrc = AvailCopy->getOperand(1).getReg();
167
1.64M
    unsigned AvailDef = AvailCopy->getOperand(0).getReg();
168
1.64M
    for (const MachineInstr &MI :
169
1.64M
         make_range(AvailCopy->getIterator(), DestCopy.getIterator()))
170
6.25M
      for (const MachineOperand &MO : MI.operands())
171
17.2M
        if (MO.isRegMask())
172
1.17M
          if (MO.clobbersPhysReg(AvailSrc) || 
MO.clobbersPhysReg(AvailDef)1.00M
)
173
1.17M
            return nullptr;
174
1.64M
175
1.64M
    
return AvailCopy469k
;
176
1.64M
  }
177
178
5.50M
  void clear() {
179
5.50M
    Copies.clear();
180
5.50M
  }
181
};
182
183
class MachineCopyPropagation : public MachineFunctionPass {
184
  const TargetRegisterInfo *TRI;
185
  const TargetInstrInfo *TII;
186
  const MachineRegisterInfo *MRI;
187
188
public:
189
  static char ID; // Pass identification, replacement for typeid
190
191
67.7k
  MachineCopyPropagation() : MachineFunctionPass(ID) {
192
67.7k
    initializeMachineCopyPropagationPass(*PassRegistry::getPassRegistry());
193
67.7k
  }
194
195
67.2k
  void getAnalysisUsage(AnalysisUsage &AU) const override {
196
67.2k
    AU.setPreservesCFG();
197
67.2k
    MachineFunctionPass::getAnalysisUsage(AU);
198
67.2k
  }
199
200
  bool runOnMachineFunction(MachineFunction &MF) override;
201
202
67.2k
  MachineFunctionProperties getRequiredProperties() const override {
203
67.2k
    return MachineFunctionProperties().set(
204
67.2k
        MachineFunctionProperties::Property::NoVRegs);
205
67.2k
  }
206
207
private:
208
  void ClobberRegister(unsigned Reg);
209
  void ReadRegister(unsigned Reg);
210
  void CopyPropagateBlock(MachineBasicBlock &MBB);
211
  bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def);
212
  void forwardUses(MachineInstr &MI);
213
  bool isForwardableRegClassCopy(const MachineInstr &Copy,
214
                                 const MachineInstr &UseI, unsigned UseIdx);
215
  bool hasImplicitOverlap(const MachineInstr &MI, const MachineOperand &Use);
216
217
  /// Candidates for deletion.
218
  SmallSetVector<MachineInstr *, 8> MaybeDeadCopies;
219
220
  CopyTracker Tracker;
221
222
  bool Changed;
223
};
224
225
} // end anonymous namespace
226
227
char MachineCopyPropagation::ID = 0;
228
229
char &llvm::MachineCopyPropagationID = MachineCopyPropagation::ID;
230
231
INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE,
232
                "Machine Copy Propagation Pass", false, false)
233
234
48.7M
void MachineCopyPropagation::ReadRegister(unsigned Reg) {
235
48.7M
  // If 'Reg' is defined by a copy, the copy is no longer a candidate
236
48.7M
  // for elimination.
237
107M
  for (MCRegUnitIterator RUI(Reg, TRI); RUI.isValid(); 
++RUI58.3M
) {
238
58.3M
    if (MachineInstr *Copy = Tracker.findCopyForUnit(*RUI, *TRI)) {
239
5.00M
      LLVM_DEBUG(dbgs() << "MCP: Copy is used - not dead: "; Copy->dump());
240
5.00M
      MaybeDeadCopies.remove(Copy);
241
5.00M
    }
242
58.3M
  }
243
48.7M
}
244
245
/// Return true if \p PreviousCopy did copy register \p Src to register \p Def.
246
/// This fact may have been obscured by sub register usage or may not be true at
247
/// all even though Src and Def are subregisters of the registers used in
248
/// PreviousCopy. e.g.
249
/// isNopCopy("ecx = COPY eax", AX, CX) == true
250
/// isNopCopy("ecx = COPY eax", AH, CL) == false
251
static bool isNopCopy(const MachineInstr &PreviousCopy, unsigned Src,
252
115k
                      unsigned Def, const TargetRegisterInfo *TRI) {
253
115k
  unsigned PreviousSrc = PreviousCopy.getOperand(1).getReg();
254
115k
  unsigned PreviousDef = PreviousCopy.getOperand(0).getReg();
255
115k
  if (Src == PreviousSrc) {
256
84.3k
    assert(Def == PreviousDef);
257
84.3k
    return true;
258
84.3k
  }
259
31.4k
  if (!TRI->isSubRegister(PreviousSrc, Src))
260
31.4k
    return false;
261
73
  unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
262
73
  return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
263
73
}
264
265
/// Remove instruction \p Copy if there exists a previous copy that copies the
266
/// register \p Src to the register \p Def; This may happen indirectly by
267
/// copying the super registers.
268
bool MachineCopyPropagation::eraseIfRedundant(MachineInstr &Copy, unsigned Src,
269
9.74M
                                              unsigned Def) {
270
9.74M
  // Avoid eliminating a copy from/to a reserved registers as we cannot predict
271
9.74M
  // the value (Example: The sparc zero register is writable but stays zero).
272
9.74M
  if (MRI->isReserved(Src) || 
MRI->isReserved(Def)9.49M
)
273
497k
    return false;
274
9.24M
275
9.24M
  // Search for an existing copy.
276
9.24M
  MachineInstr *PrevCopy = Tracker.findAvailCopy(Copy, Def, *TRI);
277
9.24M
  if (!PrevCopy)
278
9.13M
    return false;
279
115k
280
115k
  // Check that the existing copy uses the correct sub registers.
281
115k
  if (PrevCopy->getOperand(0).isDead())
282
3
    return false;
283
115k
  if (!isNopCopy(*PrevCopy, Src, Def, TRI))
284
31.4k
    return false;
285
84.4k
286
84.4k
  LLVM_DEBUG(dbgs() << "MCP: copy is a NOP, removing: "; Copy.dump());
287
84.4k
288
84.4k
  // Copy was redundantly redefining either Src or Def. Remove earlier kill
289
84.4k
  // flags between Copy and PrevCopy because the value will be reused now.
290
84.4k
  assert(Copy.isCopy());
291
84.4k
  unsigned CopyDef = Copy.getOperand(0).getReg();
292
84.4k
  assert(CopyDef == Src || CopyDef == Def);
293
84.4k
  for (MachineInstr &MI :
294
84.4k
       make_range(PrevCopy->getIterator(), Copy.getIterator()))
295
558k
    MI.clearRegisterKills(CopyDef, TRI);
296
84.4k
297
84.4k
  Copy.eraseFromParent();
298
84.4k
  Changed = true;
299
84.4k
  ++NumDeletes;
300
84.4k
  return true;
301
84.4k
}
302
303
/// Decide whether we should forward the source of \param Copy to its use in
304
/// \param UseI based on the physical register class constraints of the opcode
305
/// and avoiding introducing more cross-class COPYs.
306
bool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy,
307
                                                       const MachineInstr &UseI,
308
340k
                                                       unsigned UseIdx) {
309
340k
310
340k
  unsigned CopySrcReg = Copy.getOperand(1).getReg();
311
340k
312
340k
  // If the new register meets the opcode register constraints, then allow
313
340k
  // forwarding.
314
340k
  if (const TargetRegisterClass *URC =
315
326k
          UseI.getRegClassConstraint(UseIdx, TII, TRI))
316
326k
    return URC->contains(CopySrcReg);
317
14.1k
318
14.1k
  if (!UseI.isCopy())
319
77
    return false;
320
14.0k
321
14.0k
  /// COPYs don't have register class constraints, so if the user instruction
322
14.0k
  /// is a COPY, we just try to avoid introducing additional cross-class
323
14.0k
  /// COPYs.  For example:
324
14.0k
  ///
325
14.0k
  ///   RegClassA = COPY RegClassB  // Copy parameter
326
14.0k
  ///   ...
327
14.0k
  ///   RegClassB = COPY RegClassA  // UseI parameter
328
14.0k
  ///
329
14.0k
  /// which after forwarding becomes
330
14.0k
  ///
331
14.0k
  ///   RegClassA = COPY RegClassB
332
14.0k
  ///   ...
333
14.0k
  ///   RegClassB = COPY RegClassB
334
14.0k
  ///
335
14.0k
  /// so we have reduced the number of cross-class COPYs and potentially
336
14.0k
  /// introduced a nop COPY that can be removed.
337
14.0k
  const TargetRegisterClass *UseDstRC =
338
14.0k
      TRI->getMinimalPhysRegClass(UseI.getOperand(0).getReg());
339
14.0k
340
14.0k
  const TargetRegisterClass *SuperRC = UseDstRC;
341
14.0k
  for (TargetRegisterClass::sc_iterator SuperRCI = UseDstRC->getSuperClasses();
342
21.4k
       SuperRC; 
SuperRC = *SuperRCI++7.41k
)
343
21.2k
    if (SuperRC->contains(CopySrcReg))
344
13.8k
      return true;
345
14.0k
346
14.0k
  
return false170
;
347
14.0k
}
348
349
/// Check that \p MI does not have implicit uses that overlap with it's \p Use
350
/// operand (the register being replaced), since these can sometimes be
351
/// implicitly tied to other operands.  For example, on AMDGPU:
352
///
353
/// V_MOVRELS_B32_e32 %VGPR2, %M0<imp-use>, %EXEC<imp-use>, %VGPR2_VGPR3_VGPR4_VGPR5<imp-use>
354
///
355
/// the %VGPR2 is implicitly tied to the larger reg operand, but we have no
356
/// way of knowing we need to update the latter when updating the former.
357
bool MachineCopyPropagation::hasImplicitOverlap(const MachineInstr &MI,
358
257k
                                                const MachineOperand &Use) {
359
257k
  for (const MachineOperand &MIUse : MI.uses())
360
678k
    if (&MIUse != &Use && 
MIUse.isReg()421k
&&
MIUse.isImplicit()206k
&&
361
678k
        
MIUse.isUse()42.8k
&&
TRI->regsOverlap(Use.getReg(), MIUse.getReg())1.55k
)
362
143
      return true;
363
257k
364
257k
  
return false256k
;
365
257k
}
366
367
/// Look for available copies whose destination register is used by \p MI and
368
/// replace the use in \p MI with the copy's source register.
369
37.8M
void MachineCopyPropagation::forwardUses(MachineInstr &MI) {
370
37.8M
  if (!Tracker.hasAnyCopies())
371
23.2M
    return;
372
14.5M
373
14.5M
  // Look for non-tied explicit vreg uses that have an active COPY
374
14.5M
  // instruction that defines the physical register allocated to them.
375
14.5M
  // Replace the vreg with the source of the active COPY.
376
68.7M
  
for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); 14.5M
OpIdx < OpEnd;
377
54.1M
       ++OpIdx) {
378
54.1M
    MachineOperand &MOUse = MI.getOperand(OpIdx);
379
54.1M
    // Don't forward into undef use operands since doing so can cause problems
380
54.1M
    // with the machine verifier, since it doesn't treat undef reads as reads,
381
54.1M
    // so we can end up with a live range that ends on an undef read, leading to
382
54.1M
    // an error that the live range doesn't end on a read of the live range
383
54.1M
    // register.
384
54.1M
    if (!MOUse.isReg() || 
MOUse.isTied()37.2M
||
MOUse.isUndef()36.2M
||
MOUse.isDef()36.2M
||
385
54.1M
        
MOUse.isImplicit()21.0M
)
386
43.8M
      continue;
387
10.3M
388
10.3M
    if (!MOUse.getReg())
389
974k
      continue;
390
9.33M
391
9.33M
    // Check that the register is marked 'renamable' so we know it is safe to
392
9.33M
    // rename it without violating any constraints that aren't expressed in the
393
9.33M
    // IR (e.g. ABI or opcode requirements).
394
9.33M
    if (!MOUse.isRenamable())
395
2.24M
      continue;
396
7.09M
397
7.09M
    MachineInstr *Copy = Tracker.findAvailCopy(MI, MOUse.getReg(), *TRI);
398
7.09M
    if (!Copy)
399
6.74M
      continue;
400
353k
401
353k
    unsigned CopyDstReg = Copy->getOperand(0).getReg();
402
353k
    const MachineOperand &CopySrc = Copy->getOperand(1);
403
353k
    unsigned CopySrcReg = CopySrc.getReg();
404
353k
405
353k
    // FIXME: Don't handle partial uses of wider COPYs yet.
406
353k
    if (MOUse.getReg() != CopyDstReg) {
407
9.18k
      LLVM_DEBUG(
408
9.18k
          dbgs() << "MCP: FIXME! Not forwarding COPY to sub-register use:\n  "
409
9.18k
                 << MI);
410
9.18k
      continue;
411
9.18k
    }
412
344k
413
344k
    // Don't forward COPYs of reserved regs unless they are constant.
414
344k
    if (MRI->isReserved(CopySrcReg) && 
!MRI->isConstantPhysReg(CopySrcReg)4.74k
)
415
3.22k
      continue;
416
340k
417
340k
    if (!isForwardableRegClassCopy(*Copy, MI, OpIdx))
418
83.9k
      continue;
419
257k
420
257k
    if (hasImplicitOverlap(MI, MOUse))
421
143
      continue;
422
256k
423
256k
    if (!DebugCounter::shouldExecute(FwdCounter)) {
424
0
      LLVM_DEBUG(dbgs() << "MCP: Skipping forwarding due to debug counter:\n  "
425
0
                        << MI);
426
0
      continue;
427
0
    }
428
256k
429
256k
    LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MOUse.getReg(), TRI)
430
256k
                      << "\n     with " << printReg(CopySrcReg, TRI)
431
256k
                      << "\n     in " << MI << "     from " << *Copy);
432
256k
433
256k
    MOUse.setReg(CopySrcReg);
434
256k
    if (!CopySrc.isRenamable())
435
234k
      MOUse.setIsRenamable(false);
436
256k
437
256k
    LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n");
438
256k
439
256k
    // Clear kill markers that may have been invalidated.
440
256k
    for (MachineInstr &KMI :
441
256k
         make_range(Copy->getIterator(), std::next(MI.getIterator())))
442
1.26M
      KMI.clearRegisterKills(CopySrcReg, TRI);
443
256k
444
256k
    ++NumCopyForwards;
445
256k
    Changed = true;
446
256k
  }
447
14.5M
}
448
449
5.50M
void MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) {
450
5.50M
  LLVM_DEBUG(dbgs() << "MCP: CopyPropagateBlock " << MBB.getName() << "\n");
451
5.50M
452
43.4M
  for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ) {
453
37.9M
    MachineInstr *MI = &*I;
454
37.9M
    ++I;
455
37.9M
456
37.9M
    // Analyze copies (which don't overlap themselves).
457
37.9M
    if (MI->isCopy() && !TRI->regsOverlap(MI->getOperand(0).getReg(),
458
4.91M
                                          MI->getOperand(1).getReg())) {
459
4.91M
      unsigned Def = MI->getOperand(0).getReg();
460
4.91M
      unsigned Src = MI->getOperand(1).getReg();
461
4.91M
462
4.91M
      assert(!TargetRegisterInfo::isVirtualRegister(Def) &&
463
4.91M
             !TargetRegisterInfo::isVirtualRegister(Src) &&
464
4.91M
             "MachineCopyPropagation should be run after register allocation!");
465
4.91M
466
4.91M
      // The two copies cancel out and the source of the first copy
467
4.91M
      // hasn't been overridden, eliminate the second one. e.g.
468
4.91M
      //  %ecx = COPY %eax
469
4.91M
      //  ... nothing clobbered eax.
470
4.91M
      //  %eax = COPY %ecx
471
4.91M
      // =>
472
4.91M
      //  %ecx = COPY %eax
473
4.91M
      //
474
4.91M
      // or
475
4.91M
      //
476
4.91M
      //  %ecx = COPY %eax
477
4.91M
      //  ... nothing clobbered eax.
478
4.91M
      //  %ecx = COPY %eax
479
4.91M
      // =>
480
4.91M
      //  %ecx = COPY %eax
481
4.91M
      if (eraseIfRedundant(*MI, Def, Src) || 
eraseIfRedundant(*MI, Src, Def)4.83M
)
482
84.4k
        continue;
483
4.83M
484
4.83M
      forwardUses(*MI);
485
4.83M
486
4.83M
      // Src may have been changed by forwardUses()
487
4.83M
      Src = MI->getOperand(1).getReg();
488
4.83M
489
4.83M
      // If Src is defined by a previous copy, the previous copy cannot be
490
4.83M
      // eliminated.
491
4.83M
      ReadRegister(Src);
492
4.83M
      for (const MachineOperand &MO : MI->implicit_operands()) {
493
237k
        if (!MO.isReg() || !MO.readsReg())
494
156k
          continue;
495
81.2k
        unsigned Reg = MO.getReg();
496
81.2k
        if (!Reg)
497
0
          continue;
498
81.2k
        ReadRegister(Reg);
499
81.2k
      }
500
4.83M
501
4.83M
      LLVM_DEBUG(dbgs() << "MCP: Copy is a deletion candidate: "; MI->dump());
502
4.83M
503
4.83M
      // Copy is now a candidate for deletion.
504
4.83M
      if (!MRI->isReserved(Def))
505
4.82M
        MaybeDeadCopies.insert(MI);
506
4.83M
507
4.83M
      // If 'Def' is previously source of another copy, then this earlier copy's
508
4.83M
      // source is no longer available. e.g.
509
4.83M
      // %xmm9 = copy %xmm2
510
4.83M
      // ...
511
4.83M
      // %xmm2 = copy %xmm0
512
4.83M
      // ...
513
4.83M
      // %xmm2 = copy %xmm9
514
4.83M
      Tracker.clobberRegister(Def, *TRI);
515
4.83M
      for (const MachineOperand &MO : MI->implicit_operands()) {
516
237k
        if (!MO.isReg() || !MO.isDef())
517
81.2k
          continue;
518
156k
        unsigned Reg = MO.getReg();
519
156k
        if (!Reg)
520
0
          continue;
521
156k
        Tracker.clobberRegister(Reg, *TRI);
522
156k
      }
523
4.83M
524
4.83M
      Tracker.trackCopy(MI, *TRI);
525
4.83M
526
4.83M
      continue;
527
4.83M
    }
528
33.0M
529
33.0M
    // Clobber any earlyclobber regs first.
530
33.0M
    for (const MachineOperand &MO : MI->operands())
531
122M
      if (MO.isReg() && 
MO.isEarlyClobber()78.4M
) {
532
594k
        unsigned Reg = MO.getReg();
533
594k
        // If we have a tied earlyclobber, that means it is also read by this
534
594k
        // instruction, so we need to make sure we don't remove it as dead
535
594k
        // later.
536
594k
        if (MO.isTied())
537
361k
          ReadRegister(Reg);
538
594k
        Tracker.clobberRegister(Reg, *TRI);
539
594k
      }
540
33.0M
541
33.0M
    forwardUses(*MI);
542
33.0M
543
33.0M
    // Not a copy.
544
33.0M
    SmallVector<unsigned, 2> Defs;
545
33.0M
    const MachineOperand *RegMask = nullptr;
546
122M
    for (const MachineOperand &MO : MI->operands()) {
547
122M
      if (MO.isRegMask())
548
2.92M
        RegMask = &MO;
549
122M
      if (!MO.isReg())
550
43.9M
        continue;
551
78.4M
      unsigned Reg = MO.getReg();
552
78.4M
      if (!Reg)
553
3.78M
        continue;
554
74.6M
555
74.6M
      assert(!TargetRegisterInfo::isVirtualRegister(Reg) &&
556
74.6M
             "MachineCopyPropagation should be run after register allocation!");
557
74.6M
558
74.6M
      if (MO.isDef() && 
!MO.isEarlyClobber()31.2M
) {
559
30.6M
        Defs.push_back(Reg);
560
30.6M
        continue;
561
44.0M
      } else if (!MO.isDebug() && 
MO.readsReg()44.0M
)
562
43.4M
        ReadRegister(Reg);
563
74.6M
    }
564
33.0M
565
33.0M
    // The instruction has a register mask operand which means that it clobbers
566
33.0M
    // a large set of registers.  Treat clobbered registers the same way as
567
33.0M
    // defined registers.
568
33.0M
    if (RegMask) {
569
2.92M
      // Erase any MaybeDeadCopies whose destination register is clobbered.
570
2.92M
      for (SmallSetVector<MachineInstr *, 8>::iterator DI =
571
2.92M
               MaybeDeadCopies.begin();
572
5.02M
           DI != MaybeDeadCopies.end();) {
573
2.10M
        MachineInstr *MaybeDead = *DI;
574
2.10M
        unsigned Reg = MaybeDead->getOperand(0).getReg();
575
2.10M
        assert(!MRI->isReserved(Reg));
576
2.10M
577
2.10M
        if (!RegMask->clobbersPhysReg(Reg)) {
578
2.10M
          ++DI;
579
2.10M
          continue;
580
2.10M
        }
581
214
582
214
        LLVM_DEBUG(dbgs() << "MCP: Removing copy due to regmask clobbering: ";
583
214
                   MaybeDead->dump());
584
214
585
214
        // Make sure we invalidate any entries in the copy maps before erasing
586
214
        // the instruction.
587
214
        Tracker.clobberRegister(Reg, *TRI);
588
214
589
214
        // erase() will return the next valid iterator pointing to the next
590
214
        // element after the erased one.
591
214
        DI = MaybeDeadCopies.erase(DI);
592
214
        MaybeDead->eraseFromParent();
593
214
        Changed = true;
594
214
        ++NumDeletes;
595
214
      }
596
2.92M
    }
597
33.0M
598
33.0M
    // Any previous copy definition or reading the Defs is no longer available.
599
33.0M
    for (unsigned Reg : Defs)
600
30.6M
      Tracker.clobberRegister(Reg, *TRI);
601
33.0M
  }
602
5.50M
603
5.50M
  // If MBB doesn't have successors, delete the copies whose defs are not used.
604
5.50M
  // If MBB does have successors, then conservative assume the defs are live-out
605
5.50M
  // since we don't want to trust live-in lists.
606
5.50M
  if (MBB.succ_empty()) {
607
1.21M
    for (MachineInstr *MaybeDead : MaybeDeadCopies) {
608
363
      LLVM_DEBUG(dbgs() << "MCP: Removing copy due to no live-out succ: ";
609
363
                 MaybeDead->dump());
610
363
      assert(!MRI->isReserved(MaybeDead->getOperand(0).getReg()));
611
363
612
363
      // Update matching debug values.
613
363
      assert(MaybeDead->isCopy());
614
363
      MaybeDead->changeDebugValuesDefReg(MaybeDead->getOperand(1).getReg());
615
363
616
363
      MaybeDead->eraseFromParent();
617
363
      Changed = true;
618
363
      ++NumDeletes;
619
363
    }
620
1.21M
  }
621
5.50M
622
5.50M
  MaybeDeadCopies.clear();
623
5.50M
  Tracker.clear();
624
5.50M
}
625
626
968k
bool MachineCopyPropagation::runOnMachineFunction(MachineFunction &MF) {
627
968k
  if (skipFunction(MF.getFunction()))
628
501
    return false;
629
968k
630
968k
  Changed = false;
631
968k
632
968k
  TRI = MF.getSubtarget().getRegisterInfo();
633
968k
  TII = MF.getSubtarget().getInstrInfo();
634
968k
  MRI = &MF.getRegInfo();
635
968k
636
968k
  for (MachineBasicBlock &MBB : MF)
637
5.50M
    CopyPropagateBlock(MBB);
638
968k
639
968k
  return Changed;
640
968k
}