Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/MachineTraceMetrics.cpp
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//===- lib/CodeGen/MachineTraceMetrics.cpp --------------------------------===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
9
#include "llvm/CodeGen/MachineTraceMetrics.h"
10
#include "llvm/ADT/ArrayRef.h"
11
#include "llvm/ADT/DenseMap.h"
12
#include "llvm/ADT/Optional.h"
13
#include "llvm/ADT/PostOrderIterator.h"
14
#include "llvm/ADT/SmallPtrSet.h"
15
#include "llvm/ADT/SmallVector.h"
16
#include "llvm/ADT/SparseSet.h"
17
#include "llvm/CodeGen/MachineBasicBlock.h"
18
#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
19
#include "llvm/CodeGen/MachineFunction.h"
20
#include "llvm/CodeGen/MachineInstr.h"
21
#include "llvm/CodeGen/MachineLoopInfo.h"
22
#include "llvm/CodeGen/MachineOperand.h"
23
#include "llvm/CodeGen/MachineRegisterInfo.h"
24
#include "llvm/CodeGen/TargetRegisterInfo.h"
25
#include "llvm/CodeGen/TargetSchedule.h"
26
#include "llvm/CodeGen/TargetSubtargetInfo.h"
27
#include "llvm/MC/MCRegisterInfo.h"
28
#include "llvm/Pass.h"
29
#include "llvm/Support/Debug.h"
30
#include "llvm/Support/ErrorHandling.h"
31
#include "llvm/Support/Format.h"
32
#include "llvm/Support/raw_ostream.h"
33
#include <algorithm>
34
#include <cassert>
35
#include <iterator>
36
#include <tuple>
37
#include <utility>
38
39
using namespace llvm;
40
41
#define DEBUG_TYPE "machine-trace-metrics"
42
43
char MachineTraceMetrics::ID = 0;
44
45
char &llvm::MachineTraceMetricsID = MachineTraceMetrics::ID;
46
47
102k
INITIALIZE_PASS_BEGIN(MachineTraceMetrics, DEBUG_TYPE,
48
102k
                      "Machine Trace Metrics", false, true)
49
102k
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
50
102k
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
51
102k
INITIALIZE_PASS_END(MachineTraceMetrics, DEBUG_TYPE,
52
                    "Machine Trace Metrics", false, true)
53
54
31.1k
MachineTraceMetrics::MachineTraceMetrics() : MachineFunctionPass(ID) {
55
31.1k
  std::fill(std::begin(Ensembles), std::end(Ensembles), nullptr);
56
31.1k
}
57
58
31.1k
void MachineTraceMetrics::getAnalysisUsage(AnalysisUsage &AU) const {
59
31.1k
  AU.setPreservesAll();
60
31.1k
  AU.addRequired<MachineBranchProbabilityInfo>();
61
31.1k
  AU.addRequired<MachineLoopInfo>();
62
31.1k
  MachineFunctionPass::getAnalysisUsage(AU);
63
31.1k
}
64
65
668k
bool MachineTraceMetrics::runOnMachineFunction(MachineFunction &Func) {
66
668k
  MF = &Func;
67
668k
  const TargetSubtargetInfo &ST = MF->getSubtarget();
68
668k
  TII = ST.getInstrInfo();
69
668k
  TRI = ST.getRegisterInfo();
70
668k
  MRI = &MF->getRegInfo();
71
668k
  Loops = &getAnalysis<MachineLoopInfo>();
72
668k
  SchedModel.init(&ST);
73
668k
  BlockInfo.resize(MF->getNumBlockIDs());
74
668k
  ProcResourceCycles.resize(MF->getNumBlockIDs() *
75
668k
                            SchedModel.getNumProcResourceKinds());
76
668k
  return false;
77
668k
}
78
79
668k
void MachineTraceMetrics::releaseMemory() {
80
668k
  MF = nullptr;
81
668k
  BlockInfo.clear();
82
1.33M
  for (unsigned i = 0; i != TS_NumStrategies; 
++i668k
) {
83
668k
    delete Ensembles[i];
84
668k
    Ensembles[i] = nullptr;
85
668k
  }
86
668k
}
87
88
//===----------------------------------------------------------------------===//
89
//                          Fixed block information
90
//===----------------------------------------------------------------------===//
91
//
92
// The number of instructions in a basic block and the CPU resources used by
93
// those instructions don't depend on any given trace strategy.
94
95
/// Compute the resource usage in basic block MBB.
96
const MachineTraceMetrics::FixedBlockInfo*
97
1.58M
MachineTraceMetrics::getResources(const MachineBasicBlock *MBB) {
98
1.58M
  assert(MBB && "No basic block");
99
1.58M
  FixedBlockInfo *FBI = &BlockInfo[MBB->getNumber()];
100
1.58M
  if (FBI->hasResources())
101
776k
    return FBI;
102
804k
103
804k
  // Compute resource usage in the block.
104
804k
  FBI->HasCalls = false;
105
804k
  unsigned InstrCount = 0;
106
804k
107
804k
  // Add up per-processor resource cycles as well.
108
804k
  unsigned PRKinds = SchedModel.getNumProcResourceKinds();
109
804k
  SmallVector<unsigned, 32> PRCycles(PRKinds);
110
804k
111
7.53M
  for (const auto &MI : *MBB) {
112
7.53M
    if (MI.isTransient())
113
2.10M
      continue;
114
5.42M
    ++InstrCount;
115
5.42M
    if (MI.isCall())
116
251k
      FBI->HasCalls = true;
117
5.42M
118
5.42M
    // Count processor resources used.
119
5.42M
    if (!SchedModel.hasInstrSchedModel())
120
1.19k
      continue;
121
5.42M
    const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI);
122
5.42M
    if (!SC->isValid())
123
458k
      continue;
124
4.96M
125
4.96M
    for (TargetSchedModel::ProcResIter
126
4.96M
         PI = SchedModel.getWriteProcResBegin(SC),
127
12.4M
         PE = SchedModel.getWriteProcResEnd(SC); PI != PE; 
++PI7.46M
) {
128
7.46M
      assert(PI->ProcResourceIdx < PRKinds && "Bad processor resource kind");
129
7.46M
      PRCycles[PI->ProcResourceIdx] += PI->Cycles;
130
7.46M
    }
131
4.96M
  }
132
804k
  FBI->InstrCount = InstrCount;
133
804k
134
804k
  // Scale the resource cycles so they are comparable.
135
804k
  unsigned PROffset = MBB->getNumber() * PRKinds;
136
12.0M
  for (unsigned K = 0; K != PRKinds; 
++K11.2M
)
137
11.2M
    ProcResourceCycles[PROffset + K] =
138
11.2M
      PRCycles[K] * SchedModel.getResourceFactor(K);
139
804k
140
804k
  return FBI;
141
804k
}
142
143
ArrayRef<unsigned>
144
3.35M
MachineTraceMetrics::getProcResourceCycles(unsigned MBBNum) const {
145
3.35M
  assert(BlockInfo[MBBNum].hasResources() &&
146
3.35M
         "getResources() must be called before getProcResourceCycles()");
147
3.35M
  unsigned PRKinds = SchedModel.getNumProcResourceKinds();
148
3.35M
  assert((MBBNum+1) * PRKinds <= ProcResourceCycles.size());
149
3.35M
  return makeArrayRef(ProcResourceCycles.data() + MBBNum * PRKinds, PRKinds);
150
3.35M
}
151
152
//===----------------------------------------------------------------------===//
153
//                         Ensemble utility functions
154
//===----------------------------------------------------------------------===//
155
156
MachineTraceMetrics::Ensemble::Ensemble(MachineTraceMetrics *ct)
157
409k
  : MTM(*ct) {
158
409k
  BlockInfo.resize(MTM.BlockInfo.size());
159
409k
  unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
160
409k
  ProcResourceDepths.resize(MTM.BlockInfo.size() * PRKinds);
161
409k
  ProcResourceHeights.resize(MTM.BlockInfo.size() * PRKinds);
162
409k
}
163
164
// Virtual destructor serves as an anchor.
165
409k
MachineTraceMetrics::Ensemble::~Ensemble() = default;
166
167
const MachineLoop*
168
1.80M
MachineTraceMetrics::Ensemble::getLoopFor(const MachineBasicBlock *MBB) const {
169
1.80M
  return MTM.Loops->getLoopFor(MBB);
170
1.80M
}
171
172
// Update resource-related information in the TraceBlockInfo for MBB.
173
// Only update resources related to the trace above MBB.
174
void MachineTraceMetrics::Ensemble::
175
541k
computeDepthResources(const MachineBasicBlock *MBB) {
176
541k
  TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
177
541k
  unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
178
541k
  unsigned PROffset = MBB->getNumber() * PRKinds;
179
541k
180
541k
  // Compute resources from trace above. The top block is simple.
181
541k
  if (!TBI->Pred) {
182
100k
    TBI->InstrDepth = 0;
183
100k
    TBI->Head = MBB->getNumber();
184
100k
    std::fill(ProcResourceDepths.begin() + PROffset,
185
100k
              ProcResourceDepths.begin() + PROffset + PRKinds, 0);
186
100k
    return;
187
100k
  }
188
440k
189
440k
  // Compute from the block above. A post-order traversal ensures the
190
440k
  // predecessor is always computed first.
191
440k
  unsigned PredNum = TBI->Pred->getNumber();
192
440k
  TraceBlockInfo *PredTBI = &BlockInfo[PredNum];
193
440k
  assert(PredTBI->hasValidDepth() && "Trace above has not been computed yet");
194
440k
  const FixedBlockInfo *PredFBI = MTM.getResources(TBI->Pred);
195
440k
  TBI->InstrDepth = PredTBI->InstrDepth + PredFBI->InstrCount;
196
440k
  TBI->Head = PredTBI->Head;
197
440k
198
440k
  // Compute per-resource depths.
199
440k
  ArrayRef<unsigned> PredPRDepths = getProcResourceDepths(PredNum);
200
440k
  ArrayRef<unsigned> PredPRCycles = MTM.getProcResourceCycles(PredNum);
201
6.60M
  for (unsigned K = 0; K != PRKinds; 
++K6.16M
)
202
6.16M
    ProcResourceDepths[PROffset + K] = PredPRDepths[K] + PredPRCycles[K];
203
440k
}
204
205
// Update resource-related information in the TraceBlockInfo for MBB.
206
// Only update resources related to the trace below MBB.
207
void MachineTraceMetrics::Ensemble::
208
529k
computeHeightResources(const MachineBasicBlock *MBB) {
209
529k
  TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
210
529k
  unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
211
529k
  unsigned PROffset = MBB->getNumber() * PRKinds;
212
529k
213
529k
  // Compute resources for the current block.
214
529k
  TBI->InstrHeight = MTM.getResources(MBB)->InstrCount;
215
529k
  ArrayRef<unsigned> PRCycles = MTM.getProcResourceCycles(MBB->getNumber());
216
529k
217
529k
  // The trace tail is done.
218
529k
  if (!TBI->Succ) {
219
127k
    TBI->Tail = MBB->getNumber();
220
127k
    llvm::copy(PRCycles, ProcResourceHeights.begin() + PROffset);
221
127k
    return;
222
127k
  }
223
401k
224
401k
  // Compute from the block below. A post-order traversal ensures the
225
401k
  // predecessor is always computed first.
226
401k
  unsigned SuccNum = TBI->Succ->getNumber();
227
401k
  TraceBlockInfo *SuccTBI = &BlockInfo[SuccNum];
228
401k
  assert(SuccTBI->hasValidHeight() && "Trace below has not been computed yet");
229
401k
  TBI->InstrHeight += SuccTBI->InstrHeight;
230
401k
  TBI->Tail = SuccTBI->Tail;
231
401k
232
401k
  // Compute per-resource heights.
233
401k
  ArrayRef<unsigned> SuccPRHeights = getProcResourceHeights(SuccNum);
234
6.02M
  for (unsigned K = 0; K != PRKinds; 
++K5.61M
)
235
5.61M
    ProcResourceHeights[PROffset + K] = SuccPRHeights[K] + PRCycles[K];
236
401k
}
237
238
// Check if depth resources for MBB are valid and return the TBI.
239
// Return NULL if the resources have been invalidated.
240
const MachineTraceMetrics::TraceBlockInfo*
241
MachineTraceMetrics::Ensemble::
242
644k
getDepthResources(const MachineBasicBlock *MBB) const {
243
644k
  const TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
244
644k
  return TBI->hasValidDepth() ? 
TBI641k
:
nullptr3.04k
;
245
644k
}
246
247
// Check if height resources for MBB are valid and return the TBI.
248
// Return NULL if the resources have been invalidated.
249
const MachineTraceMetrics::TraceBlockInfo*
250
MachineTraceMetrics::Ensemble::
251
610k
getHeightResources(const MachineBasicBlock *MBB) const {
252
610k
  const TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
253
610k
  return TBI->hasValidHeight() ? 
TBI599k
:
nullptr11.1k
;
254
610k
}
255
256
/// Get an array of processor resource depths for MBB. Indexed by processor
257
/// resource kind, this array contains the scaled processor resources consumed
258
/// by all blocks preceding MBB in its trace. It does not include instructions
259
/// in MBB.
260
///
261
/// Compare TraceBlockInfo::InstrDepth.
262
ArrayRef<unsigned>
263
MachineTraceMetrics::Ensemble::
264
637k
getProcResourceDepths(unsigned MBBNum) const {
265
637k
  unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
266
637k
  assert((MBBNum+1) * PRKinds <= ProcResourceDepths.size());
267
637k
  return makeArrayRef(ProcResourceDepths.data() + MBBNum * PRKinds, PRKinds);
268
637k
}
269
270
/// Get an array of processor resource heights for MBB. Indexed by processor
271
/// resource kind, this array contains the scaled processor resources consumed
272
/// by this block and all blocks following it in its trace.
273
///
274
/// Compare TraceBlockInfo::InstrHeight.
275
ArrayRef<unsigned>
276
MachineTraceMetrics::Ensemble::
277
583k
getProcResourceHeights(unsigned MBBNum) const {
278
583k
  unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
279
583k
  assert((MBBNum+1) * PRKinds <= ProcResourceHeights.size());
280
583k
  return makeArrayRef(ProcResourceHeights.data() + MBBNum * PRKinds, PRKinds);
281
583k
}
282
283
//===----------------------------------------------------------------------===//
284
//                         Trace Selection Strategies
285
//===----------------------------------------------------------------------===//
286
//
287
// A trace selection strategy is implemented as a sub-class of Ensemble. The
288
// trace through a block B is computed by two DFS traversals of the CFG
289
// starting from B. One upwards, and one downwards. During the upwards DFS,
290
// pickTracePred() is called on the post-ordered blocks. During the downwards
291
// DFS, pickTraceSucc() is called in a post-order.
292
//
293
294
// We never allow traces that leave loops, but we do allow traces to enter
295
// nested loops. We also never allow traces to contain back-edges.
296
//
297
// This means that a loop header can never appear above the center block of a
298
// trace, except as the trace head. Below the center block, loop exiting edges
299
// are banned.
300
//
301
// Return true if an edge from the From loop to the To loop is leaving a loop.
302
// Either of To and From can be null.
303
1.08M
static bool isExitingLoop(const MachineLoop *From, const MachineLoop *To) {
304
1.08M
  return From && 
!From->contains(To)717k
;
305
1.08M
}
306
307
// MinInstrCountEnsemble - Pick the trace that executes the least number of
308
// instructions.
309
namespace {
310
311
class MinInstrCountEnsemble : public MachineTraceMetrics::Ensemble {
312
0
  const char *getName() const override { return "MinInstr"; }
313
  const MachineBasicBlock *pickTracePred(const MachineBasicBlock*) override;
314
  const MachineBasicBlock *pickTraceSucc(const MachineBasicBlock*) override;
315
316
public:
317
  MinInstrCountEnsemble(MachineTraceMetrics *mtm)
318
409k
    : MachineTraceMetrics::Ensemble(mtm) {}
319
};
320
321
} // end anonymous namespace
322
323
// Select the preferred predecessor for MBB.
324
const MachineBasicBlock*
325
541k
MinInstrCountEnsemble::pickTracePred(const MachineBasicBlock *MBB) {
326
541k
  if (MBB->pred_empty())
327
29.2k
    return nullptr;
328
512k
  const MachineLoop *CurLoop = getLoopFor(MBB);
329
512k
  // Don't leave loops, and never follow back-edges.
330
512k
  if (CurLoop && 
MBB == CurLoop->getHeader()206k
)
331
71.0k
    return nullptr;
332
441k
  unsigned CurCount = MTM.getResources(MBB)->InstrCount;
333
441k
  const MachineBasicBlock *Best = nullptr;
334
441k
  unsigned BestDepth = 0;
335
644k
  for (const MachineBasicBlock *Pred : MBB->predecessors()) {
336
644k
    const MachineTraceMetrics::TraceBlockInfo *PredTBI =
337
644k
      getDepthResources(Pred);
338
644k
    // Ignore cycles that aren't natural loops.
339
644k
    if (!PredTBI)
340
3.04k
      continue;
341
641k
    // Pick the predecessor that would give this block the smallest InstrDepth.
342
641k
    unsigned Depth = PredTBI->InstrDepth + CurCount;
343
641k
    if (!Best || 
Depth < BestDepth200k
) {
344
468k
      Best = Pred;
345
468k
      BestDepth = Depth;
346
468k
    }
347
641k
  }
348
441k
  return Best;
349
441k
}
350
351
// Select the preferred successor for MBB.
352
const MachineBasicBlock*
353
529k
MinInstrCountEnsemble::pickTraceSucc(const MachineBasicBlock *MBB) {
354
529k
  if (MBB->pred_empty())
355
11.1k
    return nullptr;
356
518k
  const MachineLoop *CurLoop = getLoopFor(MBB);
357
518k
  const MachineBasicBlock *Best = nullptr;
358
518k
  unsigned BestHeight = 0;
359
771k
  for (const MachineBasicBlock *Succ : MBB->successors()) {
360
771k
    // Don't consider back-edges.
361
771k
    if (CurLoop && 
Succ == CurLoop->getHeader()399k
)
362
70.7k
      continue;
363
700k
    // Don't consider successors exiting CurLoop.
364
700k
    if (isExitingLoop(CurLoop, getLoopFor(Succ)))
365
90.4k
      continue;
366
610k
    const MachineTraceMetrics::TraceBlockInfo *SuccTBI =
367
610k
      getHeightResources(Succ);
368
610k
    // Ignore cycles that aren't natural loops.
369
610k
    if (!SuccTBI)
370
11.1k
      continue;
371
599k
    // Pick the successor that would give this block the smallest InstrHeight.
372
599k
    unsigned Height = SuccTBI->InstrHeight;
373
599k
    if (!Best || 
Height < BestHeight197k
) {
374
486k
      Best = Succ;
375
486k
      BestHeight = Height;
376
486k
    }
377
599k
  }
378
518k
  return Best;
379
518k
}
380
381
// Get an Ensemble sub-class for the requested trace strategy.
382
MachineTraceMetrics::Ensemble *
383
416k
MachineTraceMetrics::getEnsemble(MachineTraceMetrics::Strategy strategy) {
384
416k
  assert(strategy < TS_NumStrategies && "Invalid trace strategy enum");
385
416k
  Ensemble *&E = Ensembles[strategy];
386
416k
  if (E)
387
6.83k
    return E;
388
409k
389
409k
  // Allocate new Ensemble on demand.
390
409k
  switch (strategy) {
391
409k
  case TS_MinInstrCount: return (E = new MinInstrCountEnsemble(this));
392
409k
  
default: 0
llvm_unreachable0
("Invalid trace strategy enum");
393
409k
  }
394
409k
}
395
396
29.4k
void MachineTraceMetrics::invalidate(const MachineBasicBlock *MBB) {
397
29.4k
  LLVM_DEBUG(dbgs() << "Invalidate traces through " << printMBBReference(*MBB)
398
29.4k
                    << '\n');
399
29.4k
  BlockInfo[MBB->getNumber()].invalidate();
400
58.9k
  for (unsigned i = 0; i != TS_NumStrategies; 
++i29.4k
)
401
29.4k
    if (Ensembles[i])
402
29.3k
      Ensembles[i]->invalidate(MBB);
403
29.4k
}
404
405
98.5k
void MachineTraceMetrics::verifyAnalysis() const {
406
98.5k
  if (!MF)
407
0
    return;
408
#ifndef NDEBUG
409
  assert(BlockInfo.size() == MF->getNumBlockIDs() && "Outdated BlockInfo size");
410
  for (unsigned i = 0; i != TS_NumStrategies; ++i)
411
    if (Ensembles[i])
412
      Ensembles[i]->verify();
413
#endif
414
}
415
416
//===----------------------------------------------------------------------===//
417
//                               Trace building
418
//===----------------------------------------------------------------------===//
419
//
420
// Traces are built by two CFG traversals. To avoid recomputing too much, use a
421
// set abstraction that confines the search to the current loop, and doesn't
422
// revisit blocks.
423
424
namespace {
425
426
struct LoopBounds {
427
  MutableArrayRef<MachineTraceMetrics::TraceBlockInfo> Blocks;
428
  SmallPtrSet<const MachineBasicBlock*, 8> Visited;
429
  const MachineLoopInfo *Loops;
430
  bool Downward = false;
431
432
  LoopBounds(MutableArrayRef<MachineTraceMetrics::TraceBlockInfo> blocks,
433
122k
             const MachineLoopInfo *loops) : Blocks(blocks), Loops(loops) {}
434
};
435
436
} // end anonymous namespace
437
438
// Specialize po_iterator_storage in order to prune the post-order traversal so
439
// it is limited to the current loop and doesn't traverse the loop back edges.
440
namespace llvm {
441
442
template<>
443
class po_iterator_storage<LoopBounds, true> {
444
  LoopBounds &LB;
445
446
public:
447
490k
  po_iterator_storage(LoopBounds &lb) : LB(lb) {}
448
449
1.07M
  void finishPostorder(const MachineBasicBlock*) {}
450
451
  bool insertEdge(Optional<const MachineBasicBlock *> From,
452
1.80M
                  const MachineBasicBlock *To) {
453
1.80M
    // Skip already visited To blocks.
454
1.80M
    MachineTraceMetrics::TraceBlockInfo &TBI = LB.Blocks[To->getNumber()];
455
1.80M
    if (LB.Downward ? 
TBI.hasValidHeight()896k
:
TBI.hasValidDepth()910k
)
456
427k
      return false;
457
1.37M
    // From is null once when To is the trace center block.
458
1.37M
    if (From) {
459
1.18M
      if (const MachineLoop *FromLoop = LB.Loops->getLoopFor(*From)) {
460
601k
        // Don't follow backedges, don't leave FromLoop when going upwards.
461
601k
        if ((LB.Downward ? 
To330k
:
*From271k
) == FromLoop->getHeader())
462
212k
          return false;
463
389k
        // Don't leave FromLoop.
464
389k
        if (isExitingLoop(FromLoop, LB.Loops->getLoopFor(To)))
465
82.1k
          return false;
466
1.08M
      }
467
1.18M
    }
468
1.08M
    // To is a new block. Mark the block as visited in case the CFG has cycles
469
1.08M
    // that MachineLoopInfo didn't recognize as a natural loop.
470
1.08M
    return LB.Visited.insert(To).second;
471
1.08M
  }
472
};
473
474
} // end namespace llvm
475
476
/// Compute the trace through MBB.
477
122k
void MachineTraceMetrics::Ensemble::computeTrace(const MachineBasicBlock *MBB) {
478
122k
  LLVM_DEBUG(dbgs() << "Computing " << getName() << " trace through "
479
122k
                    << printMBBReference(*MBB) << '\n');
480
122k
  // Set up loop bounds for the backwards post-order traversal.
481
122k
  LoopBounds Bounds(BlockInfo, MTM.Loops);
482
122k
483
122k
  // Run an upwards post-order search for the trace start.
484
122k
  Bounds.Downward = false;
485
122k
  Bounds.Visited.clear();
486
541k
  for (auto I : inverse_post_order_ext(MBB, Bounds)) {
487
541k
    LLVM_DEBUG(dbgs() << "  pred for " << printMBBReference(*I) << ": ");
488
541k
    TraceBlockInfo &TBI = BlockInfo[I->getNumber()];
489
541k
    // All the predecessors have been visited, pick the preferred one.
490
541k
    TBI.Pred = pickTracePred(I);
491
541k
    LLVM_DEBUG({
492
541k
      if (TBI.Pred)
493
541k
        dbgs() << printMBBReference(*TBI.Pred) << '\n';
494
541k
      else
495
541k
        dbgs() << "null\n";
496
541k
    });
497
541k
    // The trace leading to I is now known, compute the depth resources.
498
541k
    computeDepthResources(I);
499
541k
  }
500
122k
501
122k
  // Run a downwards post-order search for the trace end.
502
122k
  Bounds.Downward = true;
503
122k
  Bounds.Visited.clear();
504
529k
  for (auto I : post_order_ext(MBB, Bounds)) {
505
529k
    LLVM_DEBUG(dbgs() << "  succ for " << printMBBReference(*I) << ": ");
506
529k
    TraceBlockInfo &TBI = BlockInfo[I->getNumber()];
507
529k
    // All the successors have been visited, pick the preferred one.
508
529k
    TBI.Succ = pickTraceSucc(I);
509
529k
    LLVM_DEBUG({
510
529k
      if (TBI.Succ)
511
529k
        dbgs() << printMBBReference(*TBI.Succ) << '\n';
512
529k
      else
513
529k
        dbgs() << "null\n";
514
529k
    });
515
529k
    // The trace leaving I is now known, compute the height resources.
516
529k
    computeHeightResources(I);
517
529k
  }
518
122k
}
519
520
/// Invalidate traces through BadMBB.
521
void
522
115k
MachineTraceMetrics::Ensemble::invalidate(const MachineBasicBlock *BadMBB) {
523
115k
  SmallVector<const MachineBasicBlock*, 16> WorkList;
524
115k
  TraceBlockInfo &BadTBI = BlockInfo[BadMBB->getNumber()];
525
115k
526
115k
  // Invalidate height resources of blocks above MBB.
527
115k
  if (BadTBI.hasValidHeight()) {
528
99.0k
    BadTBI.invalidateHeight();
529
99.0k
    WorkList.push_back(BadMBB);
530
132k
    do {
531
132k
      const MachineBasicBlock *MBB = WorkList.pop_back_val();
532
132k
      LLVM_DEBUG(dbgs() << "Invalidate " << printMBBReference(*MBB) << ' '
533
132k
                        << getName() << " height.\n");
534
132k
      // Find any MBB predecessors that have MBB as their preferred successor.
535
132k
      // They are the only ones that need to be invalidated.
536
200k
      for (const MachineBasicBlock *Pred : MBB->predecessors()) {
537
200k
        TraceBlockInfo &TBI = BlockInfo[Pred->getNumber()];
538
200k
        if (!TBI.hasValidHeight())
539
133k
          continue;
540
67.0k
        if (TBI.Succ == MBB) {
541
33.8k
          TBI.invalidateHeight();
542
33.8k
          WorkList.push_back(Pred);
543
33.8k
          continue;
544
33.8k
        }
545
33.2k
        // Verify that TBI.Succ is actually a *I successor.
546
33.2k
        assert((!TBI.Succ || Pred->isSuccessor(TBI.Succ)) && "CFG changed");
547
33.2k
      }
548
132k
    } while (!WorkList.empty());
549
99.0k
  }
550
115k
551
115k
  // Invalidate depth resources of blocks below MBB.
552
115k
  if (BadTBI.hasValidDepth()) {
553
94.3k
    BadTBI.invalidateDepth();
554
94.3k
    WorkList.push_back(BadMBB);
555
115k
    do {
556
115k
      const MachineBasicBlock *MBB = WorkList.pop_back_val();
557
115k
      LLVM_DEBUG(dbgs() << "Invalidate " << printMBBReference(*MBB) << ' '
558
115k
                        << getName() << " depth.\n");
559
115k
      // Find any MBB successors that have MBB as their preferred predecessor.
560
115k
      // They are the only ones that need to be invalidated.
561
165k
      for (const MachineBasicBlock *Succ : MBB->successors()) {
562
165k
        TraceBlockInfo &TBI = BlockInfo[Succ->getNumber()];
563
165k
        if (!TBI.hasValidDepth())
564
135k
          continue;
565
30.2k
        if (TBI.Pred == MBB) {
566
21.5k
          TBI.invalidateDepth();
567
21.5k
          WorkList.push_back(Succ);
568
21.5k
          continue;
569
21.5k
        }
570
8.69k
        // Verify that TBI.Pred is actually a *I predecessor.
571
8.69k
        assert((!TBI.Pred || Succ->isPredecessor(TBI.Pred)) && "CFG changed");
572
8.69k
      }
573
115k
    } while (!WorkList.empty());
574
94.3k
  }
575
115k
576
115k
  // Clear any per-instruction data. We only have to do this for BadMBB itself
577
115k
  // because the instructions in that block may change. Other blocks may be
578
115k
  // invalidated, but their instructions will stay the same, so there is no
579
115k
  // need to erase the Cycle entries. They will be overwritten when we
580
115k
  // recompute.
581
115k
  for (const auto &I : *BadMBB)
582
2.42M
    Cycles.erase(&I);
583
115k
}
584
585
0
void MachineTraceMetrics::Ensemble::verify() const {
586
#ifndef NDEBUG
587
  assert(BlockInfo.size() == MTM.MF->getNumBlockIDs() &&
588
         "Outdated BlockInfo size");
589
  for (unsigned Num = 0, e = BlockInfo.size(); Num != e; ++Num) {
590
    const TraceBlockInfo &TBI = BlockInfo[Num];
591
    if (TBI.hasValidDepth() && TBI.Pred) {
592
      const MachineBasicBlock *MBB = MTM.MF->getBlockNumbered(Num);
593
      assert(MBB->isPredecessor(TBI.Pred) && "CFG doesn't match trace");
594
      assert(BlockInfo[TBI.Pred->getNumber()].hasValidDepth() &&
595
             "Trace is broken, depth should have been invalidated.");
596
      const MachineLoop *Loop = getLoopFor(MBB);
597
      assert(!(Loop && MBB == Loop->getHeader()) && "Trace contains backedge");
598
    }
599
    if (TBI.hasValidHeight() && TBI.Succ) {
600
      const MachineBasicBlock *MBB = MTM.MF->getBlockNumbered(Num);
601
      assert(MBB->isSuccessor(TBI.Succ) && "CFG doesn't match trace");
602
      assert(BlockInfo[TBI.Succ->getNumber()].hasValidHeight() &&
603
             "Trace is broken, height should have been invalidated.");
604
      const MachineLoop *Loop = getLoopFor(MBB);
605
      const MachineLoop *SuccLoop = getLoopFor(TBI.Succ);
606
      assert(!(Loop && Loop == SuccLoop && TBI.Succ == Loop->getHeader()) &&
607
             "Trace contains backedge");
608
    }
609
  }
610
#endif
611
}
612
613
//===----------------------------------------------------------------------===//
614
//                             Data Dependencies
615
//===----------------------------------------------------------------------===//
616
//
617
// Compute the depth and height of each instruction based on data dependencies
618
// and instruction latencies. These cycle numbers assume that the CPU can issue
619
// an infinite number of instructions per cycle as long as their dependencies
620
// are ready.
621
622
// A data dependency is represented as a defining MI and operand numbers on the
623
// defining and using MI.
624
namespace {
625
626
struct DataDep {
627
  const MachineInstr *DefMI;
628
  unsigned DefOp;
629
  unsigned UseOp;
630
631
  DataDep(const MachineInstr *DefMI, unsigned DefOp, unsigned UseOp)
632
837k
    : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {}
633
634
  /// Create a DataDep from an SSA form virtual register.
635
  DataDep(const MachineRegisterInfo *MRI, unsigned VirtReg, unsigned UseOp)
636
8.77M
    : UseOp(UseOp) {
637
8.77M
    assert(TargetRegisterInfo::isVirtualRegister(VirtReg));
638
8.77M
    MachineRegisterInfo::def_iterator DefI = MRI->def_begin(VirtReg);
639
8.77M
    assert(!DefI.atEnd() && "Register has no defs");
640
8.77M
    DefMI = DefI->getParent();
641
8.77M
    DefOp = DefI.getOperandNo();
642
8.77M
    assert((++DefI).atEnd() && "Register has multiple defs");
643
8.77M
  }
644
};
645
646
} // end anonymous namespace
647
648
// Get the input data dependencies that must be ready before UseMI can issue.
649
// Return true if UseMI has any physreg operands.
650
static bool getDataDeps(const MachineInstr &UseMI,
651
                        SmallVectorImpl<DataDep> &Deps,
652
7.62M
                        const MachineRegisterInfo *MRI) {
653
7.62M
  // Debug values should not be included in any calculations.
654
7.62M
  if (UseMI.isDebugInstr())
655
12
    return false;
656
7.62M
657
7.62M
  bool HasPhysRegs = false;
658
7.62M
  for (MachineInstr::const_mop_iterator I = UseMI.operands_begin(),
659
31.3M
       E = UseMI.operands_end(); I != E; 
++I23.7M
) {
660
23.7M
    const MachineOperand &MO = *I;
661
23.7M
    if (!MO.isReg())
662
6.29M
      continue;
663
17.4M
    unsigned Reg = MO.getReg();
664
17.4M
    if (!Reg)
665
17.2k
      continue;
666
17.4M
    if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
667
3.93M
      HasPhysRegs = true;
668
3.93M
      continue;
669
3.93M
    }
670
13.5M
    // Collect virtual register reads.
671
13.5M
    if (MO.readsReg())
672
8.45M
      Deps.push_back(DataDep(MRI, Reg, UseMI.getOperandNo(I)));
673
13.5M
  }
674
7.62M
  return HasPhysRegs;
675
7.62M
}
676
677
// Get the input data dependencies of a PHI instruction, using Pred as the
678
// preferred predecessor.
679
// This will add at most one dependency to Deps.
680
static void getPHIDeps(const MachineInstr &UseMI,
681
                       SmallVectorImpl<DataDep> &Deps,
682
                       const MachineBasicBlock *Pred,
683
413k
                       const MachineRegisterInfo *MRI) {
684
413k
  // No predecessor at the beginning of a trace. Ignore dependencies.
685
413k
  if (!Pred)
686
92.4k
    return;
687
320k
  assert(UseMI.isPHI() && UseMI.getNumOperands() % 2 && "Bad PHI");
688
872k
  for (unsigned i = 1; i != UseMI.getNumOperands(); 
i += 2551k
) {
689
872k
    if (UseMI.getOperand(i + 1).getMBB() == Pred) {
690
320k
      unsigned Reg = UseMI.getOperand(i).getReg();
691
320k
      Deps.push_back(DataDep(MRI, Reg, i));
692
320k
      return;
693
320k
    }
694
872k
  }
695
320k
}
696
697
// Identify physreg dependencies for UseMI, and update the live regunit
698
// tracking set when scanning instructions downwards.
699
static void updatePhysDepsDownwards(const MachineInstr *UseMI,
700
                                    SmallVectorImpl<DataDep> &Deps,
701
                                    SparseSet<LiveRegUnit> &RegUnits,
702
1.36M
                                    const TargetRegisterInfo *TRI) {
703
1.36M
  SmallVector<unsigned, 8> Kills;
704
1.36M
  SmallVector<unsigned, 8> LiveDefOps;
705
1.36M
706
1.36M
  for (MachineInstr::const_mop_iterator MI = UseMI->operands_begin(),
707
6.43M
       ME = UseMI->operands_end(); MI != ME; 
++MI5.06M
) {
708
5.06M
    const MachineOperand &MO = *MI;
709
5.06M
    if (!MO.isReg())
710
1.08M
      continue;
711
3.98M
    unsigned Reg = MO.getReg();
712
3.98M
    if (!TargetRegisterInfo::isPhysicalRegister(Reg))
713
1.83M
      continue;
714
2.15M
    // Track live defs and kills for updating RegUnits.
715
2.15M
    if (MO.isDef()) {
716
981k
      if (MO.isDead())
717
63.3k
        Kills.push_back(Reg);
718
918k
      else
719
918k
        LiveDefOps.push_back(UseMI->getOperandNo(MI));
720
1.16M
    } else if (MO.isKill())
721
6
      Kills.push_back(Reg);
722
2.15M
    // Identify dependencies.
723
2.15M
    if (!MO.readsReg())
724
981k
      continue;
725
1.50M
    
for (MCRegUnitIterator Units(Reg, TRI); 1.16M
Units.isValid();
++Units339k
) {
726
1.17M
      SparseSet<LiveRegUnit>::iterator I = RegUnits.find(*Units);
727
1.17M
      if (I == RegUnits.end())
728
339k
        continue;
729
837k
      Deps.push_back(DataDep(I->MI, I->Op, UseMI->getOperandNo(MI)));
730
837k
      break;
731
837k
    }
732
1.16M
  }
733
1.36M
734
1.36M
  // Update RegUnits to reflect live registers after UseMI.
735
1.36M
  // First kills.
736
1.36M
  for (unsigned Kill : Kills)
737
131k
    
for (MCRegUnitIterator Units(Kill, TRI); 63.3k
Units.isValid();
++Units68.5k
)
738
68.5k
      RegUnits.erase(*Units);
739
1.36M
740
1.36M
  // Second, live defs.
741
1.36M
  for (unsigned DefOp : LiveDefOps) {
742
918k
    for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg(), TRI);
743
1.84M
         Units.isValid(); 
++Units929k
) {
744
929k
      LiveRegUnit &LRU = RegUnits[*Units];
745
929k
      LRU.MI = UseMI;
746
929k
      LRU.Op = DefOp;
747
929k
    }
748
918k
  }
749
1.36M
}
750
751
/// The length of the critical path through a trace is the maximum of two path
752
/// lengths:
753
///
754
/// 1. The maximum height+depth over all instructions in the trace center block.
755
///
756
/// 2. The longest cross-block dependency chain. For small blocks, it is
757
///    possible that the critical path through the trace doesn't include any
758
///    instructions in the block.
759
///
760
/// This function computes the second number from the live-in list of the
761
/// center block.
762
unsigned MachineTraceMetrics::Ensemble::
763
140k
computeCrossBlockCriticalPath(const TraceBlockInfo &TBI) {
764
140k
  assert(TBI.HasValidInstrDepths && "Missing depth info");
765
140k
  assert(TBI.HasValidInstrHeights && "Missing height info");
766
140k
  unsigned MaxLen = 0;
767
936k
  for (const LiveInReg &LIR : TBI.LiveIns) {
768
936k
    if (!TargetRegisterInfo::isVirtualRegister(LIR.Reg))
769
191k
      continue;
770
744k
    const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
771
744k
    // Ignore dependencies outside the current trace.
772
744k
    const TraceBlockInfo &DefTBI = BlockInfo[DefMI->getParent()->getNumber()];
773
744k
    if (!DefTBI.isUsefulDominator(TBI))
774
328k
      continue;
775
415k
    unsigned Len = LIR.Height + Cycles[DefMI].Depth;
776
415k
    MaxLen = std::max(MaxLen, Len);
777
415k
  }
778
140k
  return MaxLen;
779
140k
}
780
781
void MachineTraceMetrics::Ensemble::
782
updateDepth(MachineTraceMetrics::TraceBlockInfo &TBI, const MachineInstr &UseMI,
783
4.51M
            SparseSet<LiveRegUnit> &RegUnits) {
784
4.51M
  SmallVector<DataDep, 8> Deps;
785
4.51M
  // Collect all data dependencies.
786
4.51M
  if (UseMI.isPHI())
787
165k
    getPHIDeps(UseMI, Deps, TBI.Pred, MTM.MRI);
788
4.35M
  else if (getDataDeps(UseMI, Deps, MTM.MRI))
789
1.36M
    updatePhysDepsDownwards(&UseMI, Deps, RegUnits, MTM.TRI);
790
4.51M
791
4.51M
  // Filter and process dependencies, computing the earliest issue cycle.
792
4.51M
  unsigned Cycle = 0;
793
5.53M
  for (const DataDep &Dep : Deps) {
794
5.53M
    const TraceBlockInfo&DepTBI =
795
5.53M
      BlockInfo[Dep.DefMI->getParent()->getNumber()];
796
5.53M
    // Ignore dependencies from outside the current trace.
797
5.53M
    if (!DepTBI.isUsefulDominator(TBI))
798
519k
      continue;
799
5.01M
    assert(DepTBI.HasValidInstrDepths && "Inconsistent dependency");
800
5.01M
    unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth;
801
5.01M
    // Add latency if DefMI is a real instruction. Transients get latency 0.
802
5.01M
    if (!Dep.DefMI->isTransient())
803
3.73M
      DepCycle += MTM.SchedModel
804
3.73M
        .computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp);
805
5.01M
    Cycle = std::max(Cycle, DepCycle);
806
5.01M
  }
807
4.51M
  // Remember the instruction depth.
808
4.51M
  InstrCycles &MICycles = Cycles[&UseMI];
809
4.51M
  MICycles.Depth = Cycle;
810
4.51M
811
4.51M
  if (TBI.HasValidInstrHeights) {
812
335k
    // Update critical path length.
813
335k
    TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Height);
814
335k
    LLVM_DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << UseMI);
815
4.18M
  } else {
816
4.18M
    LLVM_DEBUG(dbgs() << Cycle << '\t' << UseMI);
817
4.18M
  }
818
4.51M
}
819
820
void MachineTraceMetrics::Ensemble::
821
updateDepth(const MachineBasicBlock *MBB, const MachineInstr &UseMI,
822
6.21k
            SparseSet<LiveRegUnit> &RegUnits) {
823
6.21k
  updateDepth(BlockInfo[MBB->getNumber()], UseMI, RegUnits);
824
6.21k
}
825
826
void MachineTraceMetrics::Ensemble::
827
updateDepths(MachineBasicBlock::iterator Start,
828
             MachineBasicBlock::iterator End,
829
588
             SparseSet<LiveRegUnit> &RegUnits) {
830
5.97k
    for (; Start != End; 
Start++5.38k
)
831
5.38k
      updateDepth(Start->getParent(), *Start, RegUnits);
832
588
}
833
834
/// Compute instruction depths for all instructions above or in MBB in its
835
/// trace. This assumes that the trace through MBB has already been computed.
836
void MachineTraceMetrics::Ensemble::
837
121k
computeInstrDepths(const MachineBasicBlock *MBB) {
838
121k
  // The top of the trace may already be computed, and HasValidInstrDepths
839
121k
  // implies Head->HasValidInstrDepths, so we only need to start from the first
840
121k
  // block in the trace that needs to be recomputed.
841
121k
  SmallVector<const MachineBasicBlock*, 8> Stack;
842
365k
  do {
843
365k
    TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
844
365k
    assert(TBI.hasValidDepth() && "Incomplete trace");
845
365k
    if (TBI.HasValidInstrDepths)
846
44.3k
      break;
847
320k
    Stack.push_back(MBB);
848
320k
    MBB = TBI.Pred;
849
320k
  } while (MBB);
850
121k
851
121k
  // FIXME: If MBB is non-null at this point, it is the last pre-computed block
852
121k
  // in the trace. We should track any live-out physregs that were defined in
853
121k
  // the trace. This is quite rare in SSA form, typically created by CSE
854
121k
  // hoisting a compare.
855
121k
  SparseSet<LiveRegUnit> RegUnits;
856
121k
  RegUnits.setUniverse(MTM.TRI->getNumRegUnits());
857
121k
858
121k
  // Go through trace blocks in top-down order, stopping after the center block.
859
441k
  while (!Stack.empty()) {
860
320k
    MBB = Stack.pop_back_val();
861
320k
    LLVM_DEBUG(dbgs() << "\nDepths for " << printMBBReference(*MBB) << ":\n");
862
320k
    TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
863
320k
    TBI.HasValidInstrDepths = true;
864
320k
    TBI.CriticalPath = 0;
865
320k
866
320k
    // Print out resource depths here as well.
867
320k
    LLVM_DEBUG({
868
320k
      dbgs() << format("%7u Instructions\n", TBI.InstrDepth);
869
320k
      ArrayRef<unsigned> PRDepths = getProcResourceDepths(MBB->getNumber());
870
320k
      for (unsigned K = 0; K != PRDepths.size(); ++K)
871
320k
        if (PRDepths[K]) {
872
320k
          unsigned Factor = MTM.SchedModel.getResourceFactor(K);
873
320k
          dbgs() << format("%6uc @ ", MTM.getCycles(PRDepths[K]))
874
320k
                 << MTM.SchedModel.getProcResource(K)->Name << " ("
875
320k
                 << PRDepths[K]/Factor << " ops x" << Factor << ")\n";
876
320k
        }
877
320k
    });
878
320k
879
320k
    // Also compute the critical path length through MBB when possible.
880
320k
    if (TBI.HasValidInstrHeights)
881
29.1k
      TBI.CriticalPath = computeCrossBlockCriticalPath(TBI);
882
320k
883
4.50M
    for (const auto &UseMI : *MBB) {
884
4.50M
      updateDepth(TBI, UseMI, RegUnits);
885
4.50M
    }
886
320k
  }
887
121k
}
888
889
// Identify physreg dependencies for MI when scanning instructions upwards.
890
// Return the issue height of MI after considering any live regunits.
891
// Height is the issue height computed from virtual register dependencies alone.
892
static unsigned updatePhysDepsUpwards(const MachineInstr &MI, unsigned Height,
893
                                      SparseSet<LiveRegUnit> &RegUnits,
894
                                      const TargetSchedModel &SchedModel,
895
                                      const TargetInstrInfo *TII,
896
1.12M
                                      const TargetRegisterInfo *TRI) {
897
1.12M
  SmallVector<unsigned, 8> ReadOps;
898
1.12M
899
1.12M
  for (MachineInstr::const_mop_iterator MOI = MI.operands_begin(),
900
1.12M
                                        MOE = MI.operands_end();
901
5.22M
       MOI != MOE; 
++MOI4.10M
) {
902
4.10M
    const MachineOperand &MO = *MOI;
903
4.10M
    if (!MO.isReg())
904
807k
      continue;
905
3.29M
    unsigned Reg = MO.getReg();
906
3.29M
    if (!TargetRegisterInfo::isPhysicalRegister(Reg))
907
1.51M
      continue;
908
1.78M
    if (MO.readsReg())
909
957k
      ReadOps.push_back(MI.getOperandNo(MOI));
910
1.78M
    if (!MO.isDef())
911
957k
      continue;
912
826k
    // This is a def of Reg. Remove corresponding entries from RegUnits, and
913
826k
    // update MI Height to consider the physreg dependencies.
914
1.66M
    
for (MCRegUnitIterator Units(Reg, TRI); 826k
Units.isValid();
++Units838k
) {
915
838k
      SparseSet<LiveRegUnit>::iterator I = RegUnits.find(*Units);
916
838k
      if (I == RegUnits.end())
917
243k
        continue;
918
595k
      unsigned DepHeight = I->Cycle;
919
595k
      if (!MI.isTransient()) {
920
352k
        // We may not know the UseMI of this dependency, if it came from the
921
352k
        // live-in list. SchedModel can handle a NULL UseMI.
922
352k
        DepHeight += SchedModel.computeOperandLatency(&MI, MI.getOperandNo(MOI),
923
352k
                                                      I->MI, I->Op);
924
352k
      }
925
595k
      Height = std::max(Height, DepHeight);
926
595k
      // This regunit is dead above MI.
927
595k
      RegUnits.erase(I);
928
595k
    }
929
826k
  }
930
1.12M
931
1.12M
  // Now we know the height of MI. Update any regunits read.
932
2.08M
  for (unsigned i = 0, e = ReadOps.size(); i != e; 
++i957k
) {
933
957k
    unsigned Reg = MI.getOperand(ReadOps[i]).getReg();
934
1.92M
    for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); 
++Units970k
) {
935
970k
      LiveRegUnit &LRU = RegUnits[*Units];
936
970k
      // Set the height to the highest reader of the unit.
937
970k
      if (LRU.Cycle <= Height && 
LRU.MI != &MI891k
) {
938
863k
        LRU.Cycle = Height;
939
863k
        LRU.MI = &MI;
940
863k
        LRU.Op = ReadOps[i];
941
863k
      }
942
970k
    }
943
957k
  }
944
1.12M
945
1.12M
  return Height;
946
1.12M
}
947
948
using MIHeightMap = DenseMap<const MachineInstr *, unsigned>;
949
950
// Push the height of DefMI upwards if required to match UseMI.
951
// Return true if this is the first time DefMI was seen.
952
static bool pushDepHeight(const DataDep &Dep, const MachineInstr &UseMI,
953
                          unsigned UseHeight, MIHeightMap &Heights,
954
                          const TargetSchedModel &SchedModel,
955
4.05M
                          const TargetInstrInfo *TII) {
956
4.05M
  // Adjust height by Dep.DefMI latency.
957
4.05M
  if (!Dep.DefMI->isTransient())
958
2.95M
    UseHeight += SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI,
959
2.95M
                                                  Dep.UseOp);
960
4.05M
961
4.05M
  // Update Heights[DefMI] to be the maximum height seen.
962
4.05M
  MIHeightMap::iterator I;
963
4.05M
  bool New;
964
4.05M
  std::tie(I, New) = Heights.insert(std::make_pair(Dep.DefMI, UseHeight));
965
4.05M
  if (New)
966
2.76M
    return true;
967
1.28M
968
1.28M
  // DefMI has been pushed before. Give it the max height.
969
1.28M
  if (I->second < UseHeight)
970
416k
    I->second = UseHeight;
971
1.28M
  return false;
972
1.28M
}
973
974
/// Assuming that the virtual register defined by DefMI:DefOp was used by
975
/// Trace.back(), add it to the live-in lists of all the blocks in Trace. Stop
976
/// when reaching the block that contains DefMI.
977
void MachineTraceMetrics::Ensemble::
978
addLiveIns(const MachineInstr *DefMI, unsigned DefOp,
979
2.76M
           ArrayRef<const MachineBasicBlock*> Trace) {
980
2.76M
  assert(!Trace.empty() && "Trace should contain at least one block");
981
2.76M
  unsigned Reg = DefMI->getOperand(DefOp).getReg();
982
2.76M
  assert(TargetRegisterInfo::isVirtualRegister(Reg));
983
2.76M
  const MachineBasicBlock *DefMBB = DefMI->getParent();
984
2.76M
985
2.76M
  // Reg is live-in to all blocks in Trace that follow DefMBB.
986
3.81M
  for (unsigned i = Trace.size(); i; 
--i1.04M
) {
987
3.22M
    const MachineBasicBlock *MBB = Trace[i-1];
988
3.22M
    if (MBB == DefMBB)
989
2.17M
      return;
990
1.04M
    TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
991
1.04M
    // Just add the register. The height will be updated later.
992
1.04M
    TBI.LiveIns.push_back(Reg);
993
1.04M
  }
994
2.76M
}
995
996
/// Compute instruction heights in the trace through MBB. This updates MBB and
997
/// the blocks below it in the trace. It is assumed that the trace has already
998
/// been computed.
999
void MachineTraceMetrics::Ensemble::
1000
109k
computeInstrHeights(const MachineBasicBlock *MBB) {
1001
109k
  // The bottom of the trace may already be computed.
1002
109k
  // Find the blocks that need updating.
1003
109k
  SmallVector<const MachineBasicBlock*, 8> Stack;
1004
275k
  do {
1005
275k
    TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
1006
275k
    assert(TBI.hasValidHeight() && "Incomplete trace");
1007
275k
    if (TBI.HasValidInstrHeights)
1008
32.5k
      break;
1009
243k
    Stack.push_back(MBB);
1010
243k
    TBI.LiveIns.clear();
1011
243k
    MBB = TBI.Succ;
1012
243k
  } while (MBB);
1013
109k
1014
109k
  // As we move upwards in the trace, keep track of instructions that are
1015
109k
  // required by deeper trace instructions. Map MI -> height required so far.
1016
109k
  MIHeightMap Heights;
1017
109k
1018
109k
  // For physregs, the def isn't known when we see the use.
1019
109k
  // Instead, keep track of the highest use of each regunit.
1020
109k
  SparseSet<LiveRegUnit> RegUnits;
1021
109k
  RegUnits.setUniverse(MTM.TRI->getNumRegUnits());
1022
109k
1023
109k
  // If the bottom of the trace was already precomputed, initialize heights
1024
109k
  // from its live-in list.
1025
109k
  // MBB is the highest precomputed block in the trace.
1026
109k
  if (MBB) {
1027
32.5k
    TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
1028
148k
    for (LiveInReg &LI : TBI.LiveIns) {
1029
148k
      if (TargetRegisterInfo::isVirtualRegister(LI.Reg)) {
1030
130k
        // For virtual registers, the def latency is included.
1031
130k
        unsigned &Height = Heights[MTM.MRI->getVRegDef(LI.Reg)];
1032
130k
        if (Height < LI.Height)
1033
115k
          Height = LI.Height;
1034
130k
      } else {
1035
17.7k
        // For register units, the def latency is not included because we don't
1036
17.7k
        // know the def yet.
1037
17.7k
        RegUnits[LI.Reg].Cycle = LI.Height;
1038
17.7k
      }
1039
148k
    }
1040
32.5k
  }
1041
109k
1042
109k
  // Go through the trace blocks in bottom-up order.
1043
109k
  SmallVector<DataDep, 8> Deps;
1044
353k
  for (;!Stack.empty(); 
Stack.pop_back()243k
) {
1045
243k
    MBB = Stack.back();
1046
243k
    LLVM_DEBUG(dbgs() << "Heights for " << printMBBReference(*MBB) << ":\n");
1047
243k
    TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
1048
243k
    TBI.HasValidInstrHeights = true;
1049
243k
    TBI.CriticalPath = 0;
1050
243k
1051
243k
    LLVM_DEBUG({
1052
243k
      dbgs() << format("%7u Instructions\n", TBI.InstrHeight);
1053
243k
      ArrayRef<unsigned> PRHeights = getProcResourceHeights(MBB->getNumber());
1054
243k
      for (unsigned K = 0; K != PRHeights.size(); ++K)
1055
243k
        if (PRHeights[K]) {
1056
243k
          unsigned Factor = MTM.SchedModel.getResourceFactor(K);
1057
243k
          dbgs() << format("%6uc @ ", MTM.getCycles(PRHeights[K]))
1058
243k
                 << MTM.SchedModel.getProcResource(K)->Name << " ("
1059
243k
                 << PRHeights[K]/Factor << " ops x" << Factor << ")\n";
1060
243k
        }
1061
243k
    });
1062
243k
1063
243k
    // Get dependencies from PHIs in the trace successor.
1064
243k
    const MachineBasicBlock *Succ = TBI.Succ;
1065
243k
    // If MBB is the last block in the trace, and it has a back-edge to the
1066
243k
    // loop header, get loop-carried dependencies from PHIs in the header. For
1067
243k
    // that purpose, pretend that all the loop header PHIs have height 0.
1068
243k
    if (!Succ)
1069
77.2k
      if (const MachineLoop *Loop = getLoopFor(MBB))
1070
43.7k
        if (MBB->isSuccessor(Loop->getHeader()))
1071
43.7k
          Succ = Loop->getHeader();
1072
243k
1073
243k
    if (Succ) {
1074
425k
      for (const auto &PHI : *Succ) {
1075
425k
        if (!PHI.isPHI())
1076
201k
          break;
1077
224k
        Deps.clear();
1078
224k
        getPHIDeps(PHI, Deps, MBB, MTM.MRI);
1079
224k
        if (!Deps.empty()) {
1080
224k
          // Loop header PHI heights are all 0.
1081
224k
          unsigned Height = TBI.Succ ? 
Cycles.lookup(&PHI).Height148k
:
075.6k
;
1082
224k
          LLVM_DEBUG(dbgs() << "pred\t" << Height << '\t' << PHI);
1083
224k
          if (pushDepHeight(Deps.front(), PHI, Height, Heights, MTM.SchedModel,
1084
224k
                            MTM.TII))
1085
216k
            addLiveIns(Deps.front().DefMI, Deps.front().DefOp, Stack);
1086
224k
        }
1087
224k
      }
1088
210k
    }
1089
243k
1090
243k
    // Go through the block backwards.
1091
243k
    for (MachineBasicBlock::const_iterator BI = MBB->end(), BB = MBB->begin();
1092
3.67M
         BI != BB;) {
1093
3.43M
      const MachineInstr &MI = *--BI;
1094
3.43M
1095
3.43M
      // Find the MI height as determined by virtual register uses in the
1096
3.43M
      // trace below.
1097
3.43M
      unsigned Cycle = 0;
1098
3.43M
      MIHeightMap::iterator HeightI = Heights.find(&MI);
1099
3.43M
      if (HeightI != Heights.end()) {
1100
2.18M
        Cycle = HeightI->second;
1101
2.18M
        // We won't be seeing any more MI uses.
1102
2.18M
        Heights.erase(HeightI);
1103
2.18M
      }
1104
3.43M
1105
3.43M
      // Don't process PHI deps. They depend on the specific predecessor, and
1106
3.43M
      // we'll get them when visiting the predecessor.
1107
3.43M
      Deps.clear();
1108
3.43M
      bool HasPhysRegs = !MI.isPHI() && 
getDataDeps(MI, Deps, MTM.MRI)3.27M
;
1109
3.43M
1110
3.43M
      // There may also be regunit dependencies to include in the height.
1111
3.43M
      if (HasPhysRegs)
1112
1.12M
        Cycle = updatePhysDepsUpwards(MI, Cycle, RegUnits, MTM.SchedModel,
1113
1.12M
                                      MTM.TII, MTM.TRI);
1114
3.43M
1115
3.43M
      // Update the required height of any virtual registers read by MI.
1116
3.43M
      for (const DataDep &Dep : Deps)
1117
3.82M
        if (pushDepHeight(Dep, MI, Cycle, Heights, MTM.SchedModel, MTM.TII))
1118
2.54M
          addLiveIns(Dep.DefMI, Dep.DefOp, Stack);
1119
3.43M
1120
3.43M
      InstrCycles &MICycles = Cycles[&MI];
1121
3.43M
      MICycles.Height = Cycle;
1122
3.43M
      if (!TBI.HasValidInstrDepths) {
1123
1.03M
        LLVM_DEBUG(dbgs() << Cycle << '\t' << MI);
1124
1.03M
        continue;
1125
1.03M
      }
1126
2.39M
      // Update critical path length.
1127
2.39M
      TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Depth);
1128
2.39M
      LLVM_DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << MI);
1129
2.39M
    }
1130
243k
1131
243k
    // Update virtual live-in heights. They were added by addLiveIns() with a 0
1132
243k
    // height because the final height isn't known until now.
1133
243k
    LLVM_DEBUG(dbgs() << printMBBReference(*MBB) << " Live-ins:");
1134
1.04M
    for (LiveInReg &LIR : TBI.LiveIns) {
1135
1.04M
      const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
1136
1.04M
      LIR.Height = Heights.lookup(DefMI);
1137
1.04M
      LLVM_DEBUG(dbgs() << ' ' << printReg(LIR.Reg) << '@' << LIR.Height);
1138
1.04M
    }
1139
243k
1140
243k
    // Transfer the live regunits to the live-in list.
1141
243k
    for (SparseSet<LiveRegUnit>::const_iterator
1142
489k
         RI = RegUnits.begin(), RE = RegUnits.end(); RI != RE; 
++RI246k
) {
1143
246k
      TBI.LiveIns.push_back(LiveInReg(RI->RegUnit, RI->Cycle));
1144
246k
      LLVM_DEBUG(dbgs() << ' ' << printRegUnit(RI->RegUnit, MTM.TRI) << '@'
1145
246k
                        << RI->Cycle);
1146
246k
    }
1147
243k
    LLVM_DEBUG(dbgs() << '\n');
1148
243k
1149
243k
    if (!TBI.HasValidInstrDepths)
1150
131k
      continue;
1151
111k
    // Add live-ins to the critical path length.
1152
111k
    TBI.CriticalPath = std::max(TBI.CriticalPath,
1153
111k
                                computeCrossBlockCriticalPath(TBI));
1154
111k
    LLVM_DEBUG(dbgs() << "Critical path: " << TBI.CriticalPath << '\n');
1155
111k
  }
1156
109k
}
1157
1158
MachineTraceMetrics::Trace
1159
134k
MachineTraceMetrics::Ensemble::getTrace(const MachineBasicBlock *MBB) {
1160
134k
  TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
1161
134k
1162
134k
  if (!TBI.hasValidDepth() || 
!TBI.hasValidHeight()16.7k
)
1163
122k
    computeTrace(MBB);
1164
134k
  if (!TBI.HasValidInstrDepths)
1165
121k
    computeInstrDepths(MBB);
1166
134k
  if (!TBI.HasValidInstrHeights)
1167
109k
    computeInstrHeights(MBB);
1168
134k
1169
134k
  return Trace(*this, TBI);
1170
134k
}
1171
1172
unsigned
1173
95.5k
MachineTraceMetrics::Trace::getInstrSlack(const MachineInstr &MI) const {
1174
95.5k
  assert(getBlockNum() == unsigned(MI.getParent()->getNumber()) &&
1175
95.5k
         "MI must be in the trace center block");
1176
95.5k
  InstrCycles Cyc = getInstrCycles(MI);
1177
95.5k
  return getCriticalPath() - (Cyc.Depth + Cyc.Height);
1178
95.5k
}
1179
1180
unsigned
1181
23.5k
MachineTraceMetrics::Trace::getPHIDepth(const MachineInstr &PHI) const {
1182
23.5k
  const MachineBasicBlock *MBB = TE.MTM.MF->getBlockNumbered(getBlockNum());
1183
23.5k
  SmallVector<DataDep, 1> Deps;
1184
23.5k
  getPHIDeps(PHI, Deps, MBB, TE.MTM.MRI);
1185
23.5k
  assert(Deps.size() == 1 && "PHI doesn't have MBB as a predecessor");
1186
23.5k
  DataDep &Dep = Deps.front();
1187
23.5k
  unsigned DepCycle = getInstrCycles(*Dep.DefMI).Depth;
1188
23.5k
  // Add latency if DefMI is a real instruction. Transients get latency 0.
1189
23.5k
  if (!Dep.DefMI->isTransient())
1190
10.7k
    DepCycle += TE.MTM.SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp,
1191
10.7k
                                                        &PHI, Dep.UseOp);
1192
23.5k
  return DepCycle;
1193
23.5k
}
1194
1195
/// When bottom is set include instructions in current block in estimate.
1196
15.3k
unsigned MachineTraceMetrics::Trace::getResourceDepth(bool Bottom) const {
1197
15.3k
  // Find the limiting processor resource.
1198
15.3k
  // Numbers have been pre-scaled to be comparable.
1199
15.3k
  unsigned PRMax = 0;
1200
15.3k
  ArrayRef<unsigned> PRDepths = TE.getProcResourceDepths(getBlockNum());
1201
15.3k
  if (Bottom) {
1202
15.3k
    ArrayRef<unsigned> PRCycles = TE.MTM.getProcResourceCycles(getBlockNum());
1203
229k
    for (unsigned K = 0; K != PRDepths.size(); 
++K214k
)
1204
214k
      PRMax = std::max(PRMax, PRDepths[K] + PRCycles[K]);
1205
15.3k
  } else {
1206
0
    for (unsigned K = 0; K != PRDepths.size(); ++K)
1207
0
      PRMax = std::max(PRMax, PRDepths[K]);
1208
0
  }
1209
15.3k
  // Convert to cycle count.
1210
15.3k
  PRMax = TE.MTM.getCycles(PRMax);
1211
15.3k
1212
15.3k
  /// All instructions before current block
1213
15.3k
  unsigned Instrs = TBI.InstrDepth;
1214
15.3k
  // plus instructions in current block
1215
15.3k
  if (Bottom)
1216
15.3k
    Instrs += TE.MTM.BlockInfo[getBlockNum()].InstrCount;
1217
15.3k
  if (unsigned IW = TE.MTM.SchedModel.getIssueWidth())
1218
15.3k
    Instrs /= IW;
1219
15.3k
  // Assume issue width 1 without a schedule model.
1220
15.3k
  return std::max(Instrs, PRMax);
1221
15.3k
}
1222
1223
unsigned MachineTraceMetrics::Trace::getResourceLength(
1224
    ArrayRef<const MachineBasicBlock *> Extrablocks,
1225
    ArrayRef<const MCSchedClassDesc *> ExtraInstrs,
1226
181k
    ArrayRef<const MCSchedClassDesc *> RemoveInstrs) const {
1227
181k
  // Add up resources above and below the center block.
1228
181k
  ArrayRef<unsigned> PRDepths = TE.getProcResourceDepths(getBlockNum());
1229
181k
  ArrayRef<unsigned> PRHeights = TE.getProcResourceHeights(getBlockNum());
1230
181k
  unsigned PRMax = 0;
1231
181k
1232
181k
  // Capture computing cycles from extra instructions
1233
181k
  auto extraCycles = [this](ArrayRef<const MCSchedClassDesc *> Instrs,
1234
181k
                            unsigned ResourceIdx)
1235
5.09M
                         ->unsigned {
1236
5.09M
    unsigned Cycles = 0;
1237
5.09M
    for (const MCSchedClassDesc *SC : Instrs) {
1238
3.59M
      if (!SC->isValid())
1239
0
        continue;
1240
3.59M
      for (TargetSchedModel::ProcResIter
1241
3.59M
               PI = TE.MTM.SchedModel.getWriteProcResBegin(SC),
1242
3.59M
               PE = TE.MTM.SchedModel.getWriteProcResEnd(SC);
1243
13.3M
           PI != PE; 
++PI9.72M
) {
1244
9.72M
        if (PI->ProcResourceIdx != ResourceIdx)
1245
9.03M
          continue;
1246
694k
        Cycles +=
1247
694k
            (PI->Cycles * TE.MTM.SchedModel.getResourceFactor(ResourceIdx));
1248
694k
      }
1249
3.59M
    }
1250
5.09M
    return Cycles;
1251
5.09M
  };
1252
181k
1253
2.72M
  for (unsigned K = 0; K != PRDepths.size(); 
++K2.54M
) {
1254
2.54M
    unsigned PRCycles = PRDepths[K] + PRHeights[K];
1255
2.54M
    for (const MachineBasicBlock *MBB : Extrablocks)
1256
2.37M
      PRCycles += TE.MTM.getProcResourceCycles(MBB->getNumber())[K];
1257
2.54M
    PRCycles += extraCycles(ExtraInstrs, K);
1258
2.54M
    PRCycles -= extraCycles(RemoveInstrs, K);
1259
2.54M
    PRMax = std::max(PRMax, PRCycles);
1260
2.54M
  }
1261
181k
  // Convert to cycle count.
1262
181k
  PRMax = TE.MTM.getCycles(PRMax);
1263
181k
1264
181k
  // Instrs: #instructions in current trace outside current block.
1265
181k
  unsigned Instrs = TBI.InstrDepth + TBI.InstrHeight;
1266
181k
  // Add instruction count from the extra blocks.
1267
181k
  for (const MachineBasicBlock *MBB : Extrablocks)
1268
169k
    Instrs += TE.MTM.getResources(MBB)->InstrCount;
1269
181k
  Instrs += ExtraInstrs.size();
1270
181k
  Instrs -= RemoveInstrs.size();
1271
181k
  if (unsigned IW = TE.MTM.SchedModel.getIssueWidth())
1272
181k
    Instrs /= IW;
1273
181k
  // Assume issue width 1 without a schedule model.
1274
181k
  return std::max(Instrs, PRMax);
1275
181k
}
1276
1277
bool MachineTraceMetrics::Trace::isDepInTrace(const MachineInstr &DefMI,
1278
84.1k
                                              const MachineInstr &UseMI) const {
1279
84.1k
  if (DefMI.getParent() == UseMI.getParent())
1280
70.8k
    return true;
1281
13.3k
1282
13.3k
  const TraceBlockInfo &DepTBI = TE.BlockInfo[DefMI.getParent()->getNumber()];
1283
13.3k
  const TraceBlockInfo &TBI = TE.BlockInfo[UseMI.getParent()->getNumber()];
1284
13.3k
1285
13.3k
  return DepTBI.isUsefulDominator(TBI);
1286
13.3k
}
1287
1288
0
void MachineTraceMetrics::Ensemble::print(raw_ostream &OS) const {
1289
0
  OS << getName() << " ensemble:\n";
1290
0
  for (unsigned i = 0, e = BlockInfo.size(); i != e; ++i) {
1291
0
    OS << "  %bb." << i << '\t';
1292
0
    BlockInfo[i].print(OS);
1293
0
    OS << '\n';
1294
0
  }
1295
0
}
1296
1297
0
void MachineTraceMetrics::TraceBlockInfo::print(raw_ostream &OS) const {
1298
0
  if (hasValidDepth()) {
1299
0
    OS << "depth=" << InstrDepth;
1300
0
    if (Pred)
1301
0
      OS << " pred=" << printMBBReference(*Pred);
1302
0
    else
1303
0
      OS << " pred=null";
1304
0
    OS << " head=%bb." << Head;
1305
0
    if (HasValidInstrDepths)
1306
0
      OS << " +instrs";
1307
0
  } else
1308
0
    OS << "depth invalid";
1309
0
  OS << ", ";
1310
0
  if (hasValidHeight()) {
1311
0
    OS << "height=" << InstrHeight;
1312
0
    if (Succ)
1313
0
      OS << " succ=" << printMBBReference(*Succ);
1314
0
    else
1315
0
      OS << " succ=null";
1316
0
    OS << " tail=%bb." << Tail;
1317
0
    if (HasValidInstrHeights)
1318
0
      OS << " +instrs";
1319
0
  } else
1320
0
    OS << "height invalid";
1321
0
  if (HasValidInstrDepths && HasValidInstrHeights)
1322
0
    OS << ", crit=" << CriticalPath;
1323
0
}
1324
1325
0
void MachineTraceMetrics::Trace::print(raw_ostream &OS) const {
1326
0
  unsigned MBBNum = &TBI - &TE.BlockInfo[0];
1327
0
1328
0
  OS << TE.getName() << " trace %bb." << TBI.Head << " --> %bb." << MBBNum
1329
0
     << " --> %bb." << TBI.Tail << ':';
1330
0
  if (TBI.hasValidHeight() && TBI.hasValidDepth())
1331
0
    OS << ' ' << getInstrCount() << " instrs.";
1332
0
  if (TBI.HasValidInstrDepths && TBI.HasValidInstrHeights)
1333
0
    OS << ' ' << TBI.CriticalPath << " cycles.";
1334
0
1335
0
  const MachineTraceMetrics::TraceBlockInfo *Block = &TBI;
1336
0
  OS << "\n%bb." << MBBNum;
1337
0
  while (Block->hasValidDepth() && Block->Pred) {
1338
0
    unsigned Num = Block->Pred->getNumber();
1339
0
    OS << " <- " << printMBBReference(*Block->Pred);
1340
0
    Block = &TE.BlockInfo[Num];
1341
0
  }
1342
0
1343
0
  Block = &TBI;
1344
0
  OS << "\n    ";
1345
0
  while (Block->hasValidHeight() && Block->Succ) {
1346
0
    unsigned Num = Block->Succ->getNumber();
1347
0
    OS << " -> " << printMBBReference(*Block->Succ);
1348
0
    Block = &TE.BlockInfo[Num];
1349
0
  }
1350
0
  OS << '\n';
1351
0
}