Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/PostRAHazardRecognizer.cpp
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//===----- PostRAHazardRecognizer.cpp - hazard recognizer -----------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// This runs the hazard recognizer and emits noops when necessary.  This
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/// gives targets a way to run the hazard recognizer without running one of
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/// the schedulers.  Example use cases for this pass would be:
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///
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/// - Targets that need the hazard recognizer to be run at -O0.
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/// - Targets that want to guarantee that hazards at the beginning of
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///   scheduling regions are handled correctly.  The post-RA scheduler is
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///   a top-down scheduler, but when there are multiple scheduling regions
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///   in a basic block, it visits the regions in bottom-up order.  This
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///   makes it impossible for the scheduler to gauranttee it can correctly
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///   handle hazards at the beginning of scheduling regions.
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///
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/// This pass traverses all the instructions in a program in top-down order.
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/// In contrast to the instruction scheduling passes, this pass never resets
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/// the hazard recognizer to ensure it can correctly handles noop hazards at
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/// the beginning of blocks.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "post-RA-hazard-rec"
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STATISTIC(NumNoops, "Number of noops inserted");
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namespace {
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  class PostRAHazardRecognizer : public MachineFunctionPass {
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  public:
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    static char ID;
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    PostRAHazardRecognizer() : MachineFunctionPass(ID) {}
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    void getAnalysisUsage(AnalysisUsage &AU) const override {
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      AU.setPreservesCFG();
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      MachineFunctionPass::getAnalysisUsage(AU);
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    }
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    bool runOnMachineFunction(MachineFunction &Fn) override;
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  };
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  char PostRAHazardRecognizer::ID = 0;
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}
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char &llvm::PostRAHazardRecognizerID = PostRAHazardRecognizer::ID;
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INITIALIZE_PASS(PostRAHazardRecognizer, DEBUG_TYPE,
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                "Post RA hazard recognizer", false, false)
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bool PostRAHazardRecognizer::runOnMachineFunction(MachineFunction &Fn) {
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  const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo();
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  std::unique_ptr<ScheduleHazardRecognizer> HazardRec(
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      TII->CreateTargetPostRAHazardRecognizer(Fn));
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  // Return if the target has not implemented a hazard recognizer.
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  if (!HazardRec.get())
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    return false;
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  // Loop over all of the basic blocks
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for (auto &MBB : Fn)25.8k
{
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    // We do not call HazardRec->reset() here to make sure we are handling noop
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    // hazards at the start of basic blocks.
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    for (MachineInstr &MI : MBB) {
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      // If we need to emit noops prior to this instruction, then do so.
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      unsigned NumPreNoops = HazardRec->PreEmitNoops(&MI);
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      for (unsigned i = 0; i != NumPreNoops; 
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) {
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        HazardRec->EmitNoop();
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        TII->insertNoop(MBB, MachineBasicBlock::iterator(MI));
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        ++NumNoops;
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      }
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      HazardRec->EmitInstruction(&MI);
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      if (HazardRec->atIssueLimit()) {
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        HazardRec->AdvanceCycle();
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      }
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    }
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  }
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  return true;
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}