Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
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//=--- RegUsageInfoPropagate.cpp - Register Usage Informartion Propagation --=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// This pass is required to take advantage of the interprocedural register
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/// allocation infrastructure.
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///
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/// This pass iterates through MachineInstrs in a given MachineFunction and at
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/// each callsite queries RegisterUsageInfo for RegMask (calculated based on
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/// actual register allocation) of the callee function, if the RegMask detail
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/// is available then this pass will update the RegMask of the call instruction.
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/// This updated RegMask will be used by the register allocator while allocating
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/// the current MachineFunction.
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///
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/RegisterUsageInfo.h"
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#include "llvm/IR/Module.h"
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#include "llvm/PassAnalysisSupport.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetMachine.h"
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#include <map>
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#include <string>
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using namespace llvm;
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#define DEBUG_TYPE "ip-regalloc"
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#define RUIP_NAME "Register Usage Information Propagation"
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namespace {
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class RegUsageInfoPropagation : public MachineFunctionPass {
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public:
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  RegUsageInfoPropagation() : MachineFunctionPass(ID) {
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    PassRegistry &Registry = *PassRegistry::getPassRegistry();
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    initializeRegUsageInfoPropagationPass(Registry);
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  }
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  StringRef getPassName() const override { return RUIP_NAME; }
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  bool runOnMachineFunction(MachineFunction &MF) override;
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  void getAnalysisUsage(AnalysisUsage &AU) const override {
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    AU.addRequired<PhysicalRegisterUsageInfo>();
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    AU.setPreservesAll();
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    MachineFunctionPass::getAnalysisUsage(AU);
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  }
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  static char ID;
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private:
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  static void setRegMask(MachineInstr &MI, ArrayRef<uint32_t> RegMask) {
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    assert(RegMask.size() ==
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           MachineOperand::getRegMaskSize(MI.getParent()->getParent()
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                                          ->getRegInfo().getTargetRegisterInfo()
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                                          ->getNumRegs())
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           && "expected register mask size");
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    for (MachineOperand &MO : MI.operands()) {
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      if (MO.isRegMask())
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        MO.setRegMask(RegMask.data());
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    }
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  }
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};
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} // end of anonymous namespace
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INITIALIZE_PASS_BEGIN(RegUsageInfoPropagation, "reg-usage-propagation",
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                      RUIP_NAME, false, false)
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INITIALIZE_PASS_DEPENDENCY(PhysicalRegisterUsageInfo)
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INITIALIZE_PASS_END(RegUsageInfoPropagation, "reg-usage-propagation",
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                    RUIP_NAME, false, false)
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char RegUsageInfoPropagation::ID = 0;
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// Assumes call instructions have a single reference to a function.
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static const Function *findCalledFunction(const Module &M,
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                                          const MachineInstr &MI) {
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  for (const MachineOperand &MO : MI.operands()) {
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    if (MO.isGlobal())
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      return dyn_cast<const Function>(MO.getGlobal());
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    if (MO.isSymbol())
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      return M.getFunction(MO.getSymbolName());
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  }
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return nullptr0
;
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}
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bool RegUsageInfoPropagation::runOnMachineFunction(MachineFunction &MF) {
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  const Module &M = *MF.getFunction().getParent();
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  PhysicalRegisterUsageInfo *PRUI = &getAnalysis<PhysicalRegisterUsageInfo>();
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  LLVM_DEBUG(dbgs() << " ++++++++++++++++++++ " << getPassName()
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                    << " ++++++++++++++++++++  \n");
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  LLVM_DEBUG(dbgs() << "MachineFunction : " << MF.getName() << "\n");
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  const MachineFrameInfo &MFI = MF.getFrameInfo();
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  if (!MFI.hasCalls() && 
!MFI.hasTailCall()24.7k
)
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    return false;
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  bool Changed = false;
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  for (MachineBasicBlock &MBB : MF) {
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    for (MachineInstr &MI : MBB) {
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      if (!MI.isCall())
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        continue;
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      LLVM_DEBUG(
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          dbgs()
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          << "Call Instruction Before Register Usage Info Propagation : \n");
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      LLVM_DEBUG(dbgs() << MI << "\n");
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      auto UpdateRegMask = [&](const Function &F) {
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        const ArrayRef<uint32_t> RegMask = PRUI->getRegUsageInfo(F);
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        if (RegMask.empty())
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          return;
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        setRegMask(MI, RegMask);
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        Changed = true;
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      };
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      if (const Function *F = findCalledFunction(M, MI)) {
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        if (F->isDefinitionExact()) {
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          UpdateRegMask(*F);
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        } else {
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          LLVM_DEBUG(dbgs() << "Function definition is not exact\n");
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        }
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      } else {
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        LLVM_DEBUG(dbgs() << "Failed to find call target function\n");
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      }
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      LLVM_DEBUG(
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          dbgs() << "Call Instruction After Register Usage Info Propagation : "
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                 << MI << '\n');
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    }
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  }
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  LLVM_DEBUG(
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      dbgs() << " +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"
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                "++++++ \n");
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  return Changed;
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}
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FunctionPass *llvm::createRegUsageInfoPropPass() {
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  return new RegUsageInfoPropagation();
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}