Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/RegisterCoalescer.h
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//===- RegisterCoalescer.h - Register Coalescing Interface ------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the abstract interface for register coalescers,
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// allowing them to interact with and query register allocators.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
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#define LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
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namespace llvm {
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class MachineInstr;
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class TargetRegisterClass;
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class TargetRegisterInfo;
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  /// A helper class for register coalescers. When deciding if
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  /// two registers can be coalesced, CoalescerPair can determine if a copy
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  /// instruction would become an identity copy after coalescing.
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  class CoalescerPair {
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    const TargetRegisterInfo &TRI;
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    /// The register that will be left after coalescing. It can be a
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    /// virtual or physical register.
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    unsigned DstReg = 0;
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    /// The virtual register that will be coalesced into dstReg.
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    unsigned SrcReg = 0;
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    /// The sub-register index of the old DstReg in the new coalesced register.
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    unsigned DstIdx = 0;
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    /// The sub-register index of the old SrcReg in the new coalesced register.
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    unsigned SrcIdx = 0;
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    /// True when the original copy was a partial subregister copy.
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    bool Partial = false;
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    /// True when both regs are virtual and newRC is constrained.
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    bool CrossClass = false;
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    /// True when DstReg and SrcReg are reversed from the original
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    /// copy instruction.
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    bool Flipped = false;
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    /// The register class of the coalesced register, or NULL if DstReg
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    /// is a physreg. This register class may be a super-register of both
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    /// SrcReg and DstReg.
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    const TargetRegisterClass *NewRC = nullptr;
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  public:
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11.3M
    CoalescerPair(const TargetRegisterInfo &tri) : TRI(tri) {}
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    /// Create a CoalescerPair representing a virtreg-to-physreg copy.
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    /// No need to call setRegisters().
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    CoalescerPair(unsigned VirtReg, unsigned PhysReg,
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                  const TargetRegisterInfo &tri)
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      : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg) {}
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    /// Set registers to match the copy instruction MI. Return
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    /// false if MI is not a coalescable copy instruction.
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    bool setRegisters(const MachineInstr*);
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    /// Swap SrcReg and DstReg. Return false if swapping is impossible
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    /// because DstReg is a physical register, or SubIdx is set.
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    bool flip();
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    /// Return true if MI is a copy instruction that will become
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    /// an identity copy after coalescing.
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    bool isCoalescable(const MachineInstr*) const;
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    /// Return true if DstReg is a physical register.
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    bool isPhys() const { return !NewRC; }
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    /// Return true if the original copy instruction did not copy
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    /// the full register, but was a subreg operation.
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    bool isPartial() const { return Partial; }
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    /// Return true if DstReg is virtual and NewRC is a smaller
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    /// register class than DstReg's.
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    bool isCrossClass() const { return CrossClass; }
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    /// Return true when getSrcReg is the register being defined by
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    /// the original copy instruction.
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    bool isFlipped() const { return Flipped; }
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    /// Return the register (virtual or physical) that will remain
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    /// after coalescing.
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    unsigned getDstReg() const { return DstReg; }
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    /// Return the virtual register that will be coalesced away.
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    unsigned getSrcReg() const { return SrcReg; }
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    /// Return the subregister index that DstReg will be coalesced into, or 0.
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    unsigned getDstIdx() const { return DstIdx; }
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    /// Return the subregister index that SrcReg will be coalesced into, or 0.
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    unsigned getSrcIdx() const { return SrcIdx; }
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    /// Return the register class of the coalesced register.
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    const TargetRegisterClass *getNewRC() const { return NewRC; }
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  };
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} // end namespace llvm
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#endif // LLVM_LIB_CODEGEN_REGISTERCOALESCER_H