Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
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Count
Source (jump to first uncovered line)
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//===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
//
9
// This file implements float type expansion and softening for LegalizeTypes.
10
// Softening is the act of turning a computation in an illegal floating point
11
// type into a computation in an integer type of the same size; also known as
12
// "soft float".  For example, turning f32 arithmetic into operations using i32.
13
// The resulting integer value is the same as what you would get by performing
14
// the floating point operation and bitcasting the result to the integer type.
15
// Expansion is the act of changing a computation in an illegal type to be a
16
// computation in two identical registers of a smaller type.  For example,
17
// implementing ppcf128 arithmetic in two f64 registers.
18
//
19
//===----------------------------------------------------------------------===//
20
21
#include "LegalizeTypes.h"
22
#include "llvm/Support/ErrorHandling.h"
23
#include "llvm/Support/raw_ostream.h"
24
using namespace llvm;
25
26
#define DEBUG_TYPE "legalize-types"
27
28
/// GetFPLibCall - Return the right libcall for the given floating point type.
29
static RTLIB::Libcall GetFPLibCall(EVT VT,
30
                                   RTLIB::Libcall Call_F32,
31
                                   RTLIB::Libcall Call_F64,
32
                                   RTLIB::Libcall Call_F80,
33
                                   RTLIB::Libcall Call_F128,
34
1.59k
                                   RTLIB::Libcall Call_PPCF128) {
35
1.59k
  return
36
1.59k
    VT == MVT::f32 ? 
Call_F32638
:
37
1.59k
    
VT == MVT::f64 952
?
Call_F64704
:
38
952
    
VT == MVT::f80 248
?
Call_F800
:
39
248
    VT == MVT::f128 ? 
Call_F128192
:
40
248
    
VT == MVT::ppcf128 56
?
Call_PPCF12856
:
41
56
    
RTLIB::UNKNOWN_LIBCALL0
;
42
1.59k
}
43
44
//===----------------------------------------------------------------------===//
45
//  Convert Float Results to Integer for Non-HW-supported Operations.
46
//===----------------------------------------------------------------------===//
47
48
7.54k
bool DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
49
7.54k
  LLVM_DEBUG(dbgs() << "Soften float result " << ResNo << ": "; N->dump(&DAG);
50
7.54k
             dbgs() << "\n");
51
7.54k
  SDValue R = SDValue();
52
7.54k
53
7.54k
  switch (N->getOpcode()) {
54
7.54k
  default:
55
#ifndef NDEBUG
56
    dbgs() << "SoftenFloatResult #" << ResNo << ": ";
57
    N->dump(&DAG); dbgs() << "\n";
58
#endif
59
0
    llvm_unreachable("Do not know how to soften the result of this operator!");
60
7.54k
61
7.54k
    case ISD::Register:
62
250
    case ISD::CopyFromReg:
63
250
    case ISD::CopyToReg:
64
250
      assert(isLegalInHWReg(N->getValueType(ResNo)) &&
65
250
             "Unsupported SoftenFloatRes opcode!");
66
250
      // Only when isLegalInHWReg, we can skip check of the operands.
67
250
      R = SDValue(N, ResNo);
68
250
      break;
69
250
    
case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break0
;
70
2.45k
    case ISD::BITCAST:     R = SoftenFloatRes_BITCAST(N, ResNo); break;
71
250
    
case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break0
;
72
818
    case ISD::ConstantFP:  R = SoftenFloatRes_ConstantFP(N, ResNo); break;
73
250
    case ISD::EXTRACT_VECTOR_ELT:
74
45
      R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N, ResNo); break;
75
250
    
case ISD::FABS: R = SoftenFloatRes_FABS(N, ResNo); break18
;
76
250
    
case ISD::FMINNUM: R = SoftenFloatRes_FMINNUM(N); break2
;
77
250
    
case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break19
;
78
376
    case ISD::FADD:        R = SoftenFloatRes_FADD(N); break;
79
250
    
case ISD::FCEIL: R = SoftenFloatRes_FCEIL(N); break11
;
80
296
    case ISD::FCOPYSIGN:   R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break;
81
250
    
case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break6
;
82
250
    
case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break148
;
83
250
    
case ISD::FEXP: R = SoftenFloatRes_FEXP(N); break5
;
84
250
    
case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break5
;
85
250
    
case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break13
;
86
250
    
case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break5
;
87
250
    
case ISD::FLOG2: R = SoftenFloatRes_FLOG2(N); break5
;
88
250
    
case ISD::FLOG10: R = SoftenFloatRes_FLOG10(N); break5
;
89
250
    
case ISD::FMA: R = SoftenFloatRes_FMA(N); break7
;
90
664
    case ISD::FMUL:        R = SoftenFloatRes_FMUL(N); break;
91
250
    
case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break12
;
92
250
    
case ISD::FNEG: R = SoftenFloatRes_FNEG(N, ResNo); break34
;
93
250
    
case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break175
;
94
250
    
case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break30
;
95
250
    
case ISD::FP16_TO_FP: R = SoftenFloatRes_FP16_TO_FP(N); break245
;
96
250
    
case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break24
;
97
250
    
case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break12
;
98
250
    
case ISD::FREM: R = SoftenFloatRes_FREM(N); break3
;
99
250
    
case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break10
;
100
250
    
case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break12
;
101
250
    
case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break7
;
102
250
    
case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break8
;
103
250
    
case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break140
;
104
250
    
case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break7
;
105
894
    case ISD::LOAD:        R = SoftenFloatRes_LOAD(N, ResNo); break;
106
250
    
case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break0
;
107
351
    case ISD::SELECT:      R = SoftenFloatRes_SELECT(N, ResNo); break;
108
250
    
case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N, ResNo); break19
;
109
391
    case ISD::SINT_TO_FP:
110
391
    case ISD::UINT_TO_FP:  R = SoftenFloatRes_XINT_TO_FP(N); break;
111
391
    
case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break3
;
112
391
    
case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break9
;
113
7.54k
  }
114
7.54k
115
7.54k
  if (R.getNode() && R.getNode() != N) {
116
7.06k
    SetSoftenedFloat(SDValue(N, ResNo), R);
117
7.06k
    // Return true only if the node is changed, assuming that the operands
118
7.06k
    // are also converted when necessary.
119
7.06k
    return true;
120
7.06k
  }
121
478
122
478
  // Otherwise, return false to tell caller to scan operands.
123
478
  return false;
124
478
}
125
126
2.45k
SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo) {
127
2.45k
  if (isLegalInHWReg(N->getValueType(ResNo)))
128
38
    return SDValue(N, ResNo);
129
2.42k
  return BitConvertToInteger(N->getOperand(0));
130
2.42k
}
131
132
SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N,
133
0
                                                      unsigned ResNo) {
134
0
  SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
135
0
  return BitConvertToInteger(Op);
136
0
}
137
138
0
SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
139
0
  // Convert the inputs to integers, and build a new pair out of them.
140
0
  return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N),
141
0
                     TLI.getTypeToTransformTo(*DAG.getContext(),
142
0
                                              N->getValueType(0)),
143
0
                     BitConvertToInteger(N->getOperand(0)),
144
0
                     BitConvertToInteger(N->getOperand(1)));
145
0
}
146
147
818
SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo) {
148
818
  // When LegalInHWReg, we can load better from the constant pool.
149
818
  if (isLegalInHWReg(N->getValueType(ResNo)))
150
29
    return SDValue(N, ResNo);
151
789
  ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);
152
789
  // In ppcf128, the high 64 bits are always first in memory regardless
153
789
  // of Endianness. LLVM's APFloat representation is not Endian sensitive,
154
789
  // and so always converts into a 128-bit APInt in a non-Endian-sensitive
155
789
  // way. However, APInt's are serialized in an Endian-sensitive fashion,
156
789
  // so on big-Endian targets, the two doubles are output in the wrong
157
789
  // order. Fix this by manually flipping the order of the high 64 bits
158
789
  // and the low 64 bits here.
159
789
  if (DAG.getDataLayout().isBigEndian() &&
160
789
      
CN->getValueType(0).getSimpleVT() == llvm::MVT::ppcf1285
) {
161
1
    uint64_t words[2] = { CN->getValueAPF().bitcastToAPInt().getRawData()[1],
162
1
                          CN->getValueAPF().bitcastToAPInt().getRawData()[0] };
163
1
    APInt Val(128, words);
164
1
    return DAG.getConstant(Val, SDLoc(CN),
165
1
                           TLI.getTypeToTransformTo(*DAG.getContext(),
166
1
                                                    CN->getValueType(0)));
167
788
  } else {
168
788
    return DAG.getConstant(CN->getValueAPF().bitcastToAPInt(), SDLoc(CN),
169
788
                           TLI.getTypeToTransformTo(*DAG.getContext(),
170
788
                                                    CN->getValueType(0)));
171
788
  }
172
789
}
173
174
45
SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) {
175
45
  // When LegalInHWReg, keep the extracted value in register.
176
45
  if (isLegalInHWReg(N->getValueType(ResNo)))
177
8
    return SDValue(N, ResNo);
178
37
  SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
179
37
  return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
180
37
                     NewOp.getValueType().getVectorElementType(),
181
37
                     NewOp, N->getOperand(1));
182
37
}
183
184
18
SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N, unsigned ResNo) {
185
18
  // When LegalInHWReg, FABS can be implemented as native bitwise operations.
186
18
  if (isLegalInHWReg(N->getValueType(ResNo)))
187
13
    return SDValue(N, ResNo);
188
5
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
189
5
  unsigned Size = NVT.getSizeInBits();
190
5
191
5
  // Mask = ~(1 << (Size-1))
192
5
  APInt API = APInt::getAllOnesValue(Size);
193
5
  API.clearBit(Size - 1);
194
5
  SDValue Mask = DAG.getConstant(API, SDLoc(N), NVT);
195
5
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
196
5
  return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask);
197
5
}
198
199
2
SDValue DAGTypeLegalizer::SoftenFloatRes_FMINNUM(SDNode *N) {
200
2
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
201
2
  SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
202
2
                     GetSoftenedFloat(N->getOperand(1)) };
203
2
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
204
2
                                           RTLIB::FMIN_F32,
205
2
                                           RTLIB::FMIN_F64,
206
2
                                           RTLIB::FMIN_F80,
207
2
                                           RTLIB::FMIN_F128,
208
2
                                           RTLIB::FMIN_PPCF128),
209
2
                         NVT, Ops, false, SDLoc(N)).first;
210
2
}
211
212
19
SDValue DAGTypeLegalizer::SoftenFloatRes_FMAXNUM(SDNode *N) {
213
19
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
214
19
  SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
215
19
                     GetSoftenedFloat(N->getOperand(1)) };
216
19
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
217
19
                                           RTLIB::FMAX_F32,
218
19
                                           RTLIB::FMAX_F64,
219
19
                                           RTLIB::FMAX_F80,
220
19
                                           RTLIB::FMAX_F128,
221
19
                                           RTLIB::FMAX_PPCF128),
222
19
                         NVT, Ops, false, SDLoc(N)).first;
223
19
}
224
225
376
SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
226
376
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
227
376
  SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
228
376
                     GetSoftenedFloat(N->getOperand(1)) };
229
376
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
230
376
                                           RTLIB::ADD_F32,
231
376
                                           RTLIB::ADD_F64,
232
376
                                           RTLIB::ADD_F80,
233
376
                                           RTLIB::ADD_F128,
234
376
                                           RTLIB::ADD_PPCF128),
235
376
                         NVT, Ops, false, SDLoc(N)).first;
236
376
}
237
238
11
SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) {
239
11
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
240
11
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
241
11
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
242
11
                                           RTLIB::CEIL_F32,
243
11
                                           RTLIB::CEIL_F64,
244
11
                                           RTLIB::CEIL_F80,
245
11
                                           RTLIB::CEIL_F128,
246
11
                                           RTLIB::CEIL_PPCF128),
247
11
                         NVT, Op, false, SDLoc(N)).first;
248
11
}
249
250
296
SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo) {
251
296
  // When LegalInHWReg, FCOPYSIGN can be implemented as native bitwise operations.
252
296
  if (isLegalInHWReg(N->getValueType(ResNo)))
253
7
    return SDValue(N, ResNo);
254
289
  SDValue LHS = GetSoftenedFloat(N->getOperand(0));
255
289
  SDValue RHS = BitConvertToInteger(N->getOperand(1));
256
289
  SDLoc dl(N);
257
289
258
289
  EVT LVT = LHS.getValueType();
259
289
  EVT RVT = RHS.getValueType();
260
289
261
289
  unsigned LSize = LVT.getSizeInBits();
262
289
  unsigned RSize = RVT.getSizeInBits();
263
289
264
289
  // First get the sign bit of second operand.
265
289
  SDValue SignBit = DAG.getNode(
266
289
      ISD::SHL, dl, RVT, DAG.getConstant(1, dl, RVT),
267
289
      DAG.getConstant(RSize - 1, dl,
268
289
                      TLI.getShiftAmountTy(RVT, DAG.getDataLayout())));
269
289
  SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
270
289
271
289
  // Shift right or sign-extend it if the two operands have different types.
272
289
  int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
273
289
  if (SizeDiff > 0) {
274
0
    SignBit =
275
0
        DAG.getNode(ISD::SRL, dl, RVT, SignBit,
276
0
                    DAG.getConstant(SizeDiff, dl,
277
0
                                    TLI.getShiftAmountTy(SignBit.getValueType(),
278
0
                                                         DAG.getDataLayout())));
279
0
    SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
280
289
  } else if (SizeDiff < 0) {
281
2
    SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
282
2
    SignBit =
283
2
        DAG.getNode(ISD::SHL, dl, LVT, SignBit,
284
2
                    DAG.getConstant(-SizeDiff, dl,
285
2
                                    TLI.getShiftAmountTy(SignBit.getValueType(),
286
2
                                                         DAG.getDataLayout())));
287
2
  }
288
289
289
289
  // Clear the sign bit of the first operand.
290
289
  SDValue Mask = DAG.getNode(
291
289
      ISD::SHL, dl, LVT, DAG.getConstant(1, dl, LVT),
292
289
      DAG.getConstant(LSize - 1, dl,
293
289
                      TLI.getShiftAmountTy(LVT, DAG.getDataLayout())));
294
289
  Mask = DAG.getNode(ISD::SUB, dl, LVT, Mask, DAG.getConstant(1, dl, LVT));
295
289
  LHS = DAG.getNode(ISD::AND, dl, LVT, LHS, Mask);
296
289
297
289
  // Or the value with the sign bit.
298
289
  return DAG.getNode(ISD::OR, dl, LVT, LHS, SignBit);
299
289
}
300
301
6
SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) {
302
6
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
303
6
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
304
6
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
305
6
                                           RTLIB::COS_F32,
306
6
                                           RTLIB::COS_F64,
307
6
                                           RTLIB::COS_F80,
308
6
                                           RTLIB::COS_F128,
309
6
                                           RTLIB::COS_PPCF128),
310
6
                         NVT, Op, false, SDLoc(N)).first;
311
6
}
312
313
148
SDValue DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) {
314
148
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
315
148
  SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
316
148
                     GetSoftenedFloat(N->getOperand(1)) };
317
148
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
318
148
                                           RTLIB::DIV_F32,
319
148
                                           RTLIB::DIV_F64,
320
148
                                           RTLIB::DIV_F80,
321
148
                                           RTLIB::DIV_F128,
322
148
                                           RTLIB::DIV_PPCF128),
323
148
                         NVT, Ops, false, SDLoc(N)).first;
324
148
}
325
326
5
SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP(SDNode *N) {
327
5
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
328
5
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
329
5
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
330
5
                                           RTLIB::EXP_F32,
331
5
                                           RTLIB::EXP_F64,
332
5
                                           RTLIB::EXP_F80,
333
5
                                           RTLIB::EXP_F128,
334
5
                                           RTLIB::EXP_PPCF128),
335
5
                         NVT, Op, false, SDLoc(N)).first;
336
5
}
337
338
5
SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP2(SDNode *N) {
339
5
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
340
5
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
341
5
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
342
5
                                           RTLIB::EXP2_F32,
343
5
                                           RTLIB::EXP2_F64,
344
5
                                           RTLIB::EXP2_F80,
345
5
                                           RTLIB::EXP2_F128,
346
5
                                           RTLIB::EXP2_PPCF128),
347
5
                         NVT, Op, false, SDLoc(N)).first;
348
5
}
349
350
13
SDValue DAGTypeLegalizer::SoftenFloatRes_FFLOOR(SDNode *N) {
351
13
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
352
13
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
353
13
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
354
13
                                           RTLIB::FLOOR_F32,
355
13
                                           RTLIB::FLOOR_F64,
356
13
                                           RTLIB::FLOOR_F80,
357
13
                                           RTLIB::FLOOR_F128,
358
13
                                           RTLIB::FLOOR_PPCF128),
359
13
                         NVT, Op, false, SDLoc(N)).first;
360
13
}
361
362
5
SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG(SDNode *N) {
363
5
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
364
5
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
365
5
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
366
5
                                           RTLIB::LOG_F32,
367
5
                                           RTLIB::LOG_F64,
368
5
                                           RTLIB::LOG_F80,
369
5
                                           RTLIB::LOG_F128,
370
5
                                           RTLIB::LOG_PPCF128),
371
5
                         NVT, Op, false, SDLoc(N)).first;
372
5
}
373
374
5
SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG2(SDNode *N) {
375
5
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
376
5
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
377
5
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
378
5
                                           RTLIB::LOG2_F32,
379
5
                                           RTLIB::LOG2_F64,
380
5
                                           RTLIB::LOG2_F80,
381
5
                                           RTLIB::LOG2_F128,
382
5
                                           RTLIB::LOG2_PPCF128),
383
5
                         NVT, Op, false, SDLoc(N)).first;
384
5
}
385
386
5
SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG10(SDNode *N) {
387
5
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
388
5
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
389
5
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
390
5
                                           RTLIB::LOG10_F32,
391
5
                                           RTLIB::LOG10_F64,
392
5
                                           RTLIB::LOG10_F80,
393
5
                                           RTLIB::LOG10_F128,
394
5
                                           RTLIB::LOG10_PPCF128),
395
5
                         NVT, Op, false, SDLoc(N)).first;
396
5
}
397
398
7
SDValue DAGTypeLegalizer::SoftenFloatRes_FMA(SDNode *N) {
399
7
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
400
7
  SDValue Ops[3] = { GetSoftenedFloat(N->getOperand(0)),
401
7
                     GetSoftenedFloat(N->getOperand(1)),
402
7
                     GetSoftenedFloat(N->getOperand(2)) };
403
7
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
404
7
                                           RTLIB::FMA_F32,
405
7
                                           RTLIB::FMA_F64,
406
7
                                           RTLIB::FMA_F80,
407
7
                                           RTLIB::FMA_F128,
408
7
                                           RTLIB::FMA_PPCF128),
409
7
                         NVT, Ops, false, SDLoc(N)).first;
410
7
}
411
412
664
SDValue DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
413
664
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
414
664
  SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
415
664
                     GetSoftenedFloat(N->getOperand(1)) };
416
664
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
417
664
                                           RTLIB::MUL_F32,
418
664
                                           RTLIB::MUL_F64,
419
664
                                           RTLIB::MUL_F80,
420
664
                                           RTLIB::MUL_F128,
421
664
                                           RTLIB::MUL_PPCF128),
422
664
                         NVT, Ops, false, SDLoc(N)).first;
423
664
}
424
425
12
SDValue DAGTypeLegalizer::SoftenFloatRes_FNEARBYINT(SDNode *N) {
426
12
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
427
12
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
428
12
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
429
12
                                           RTLIB::NEARBYINT_F32,
430
12
                                           RTLIB::NEARBYINT_F64,
431
12
                                           RTLIB::NEARBYINT_F80,
432
12
                                           RTLIB::NEARBYINT_F128,
433
12
                                           RTLIB::NEARBYINT_PPCF128),
434
12
                         NVT, Op, false, SDLoc(N)).first;
435
12
}
436
437
34
SDValue DAGTypeLegalizer::SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo) {
438
34
  // When LegalInHWReg, FNEG can be implemented as native bitwise operations.
439
34
  if (isLegalInHWReg(N->getValueType(ResNo)))
440
2
    return SDValue(N, ResNo);
441
32
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
442
32
  SDLoc dl(N);
443
32
444
32
  EVT FloatVT = N->getValueType(ResNo);
445
32
  if (FloatVT == MVT::f32 || 
FloatVT == MVT::f6416
||
FloatVT == MVT::f1284
) {
446
32
    // Expand Y = FNEG(X) -> Y = X ^ sign mask
447
32
    APInt SignMask = APInt::getSignMask(NVT.getSizeInBits());
448
32
    return DAG.getNode(ISD::XOR, dl, NVT, GetSoftenedFloat(N->getOperand(0)),
449
32
                       DAG.getConstant(SignMask, dl, NVT));
450
32
  }
451
0
452
0
  // Expand Y = FNEG(X) -> Y = SUB -0.0, X
453
0
  SDValue Ops[2] = { DAG.getConstantFP(-0.0, dl, N->getValueType(0)),
454
0
                     GetSoftenedFloat(N->getOperand(0)) };
455
0
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
456
0
                                           RTLIB::SUB_F32,
457
0
                                           RTLIB::SUB_F64,
458
0
                                           RTLIB::SUB_F80,
459
0
                                           RTLIB::SUB_F128,
460
0
                                           RTLIB::SUB_PPCF128),
461
0
                         NVT, Ops, false, dl).first;
462
0
}
463
464
175
SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
465
175
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
466
175
  SDValue Op = N->getOperand(0);
467
175
468
175
  // There's only a libcall for f16 -> f32, so proceed in two stages. Also, it's
469
175
  // entirely possible for both f16 and f32 to be legal, so use the fully
470
175
  // hard-float FP_EXTEND rather than FP16_TO_FP.
471
175
  if (Op.getValueType() == MVT::f16 && 
N->getValueType(0) != MVT::f3242
) {
472
9
    Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op);
473
9
    if (getTypeAction(MVT::f32) == TargetLowering::TypeSoftenFloat)
474
9
      AddToWorklist(Op.getNode());
475
9
  }
476
175
477
175
  if (getTypeAction(Op.getValueType()) == TargetLowering::TypePromoteFloat) {
478
33
    Op = GetPromotedFloat(Op);
479
33
    // If the promotion did the FP_EXTEND to the destination type for us,
480
33
    // there's nothing left to do here.
481
33
    if (Op.getValueType() == N->getValueType(0)) {
482
33
      return BitConvertToInteger(Op);
483
33
    }
484
142
  }
485
142
486
142
  RTLIB::Libcall LC = RTLIB::getFPEXT(Op.getValueType(), N->getValueType(0));
487
142
  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
488
142
  return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
489
142
}
490
491
// FIXME: Should we just use 'normal' FP_EXTEND / FP_TRUNC instead of special
492
// nodes?
493
245
SDValue DAGTypeLegalizer::SoftenFloatRes_FP16_TO_FP(SDNode *N) {
494
245
  EVT MidVT = TLI.getTypeToTransformTo(*DAG.getContext(), MVT::f32);
495
245
  SDValue Op = N->getOperand(0);
496
245
  SDValue Res32 = TLI.makeLibCall(DAG, RTLIB::FPEXT_F16_F32, MidVT, Op,
497
245
                                  false, SDLoc(N)).first;
498
245
  if (N->getValueType(0) == MVT::f32)
499
245
    return Res32;
500
0
501
0
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
502
0
  RTLIB::Libcall LC = RTLIB::getFPEXT(MVT::f32, N->getValueType(0));
503
0
  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
504
0
  return TLI.makeLibCall(DAG, LC, NVT, Res32, false, SDLoc(N)).first;
505
0
}
506
507
30
SDValue DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
508
30
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
509
30
  SDValue Op = N->getOperand(0);
510
30
  if (N->getValueType(0) == MVT::f16) {
511
0
    // Semi-soften first, to FP_TO_FP16, so that targets which support f16 as a
512
0
    // storage-only type get a chance to select things.
513
0
    return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, Op);
514
0
  }
515
30
516
30
  RTLIB::Libcall LC = RTLIB::getFPROUND(Op.getValueType(), N->getValueType(0));
517
30
  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND!");
518
30
  return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
519
30
}
520
521
24
SDValue DAGTypeLegalizer::SoftenFloatRes_FPOW(SDNode *N) {
522
24
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
523
24
  SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
524
24
                     GetSoftenedFloat(N->getOperand(1)) };
525
24
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
526
24
                                           RTLIB::POW_F32,
527
24
                                           RTLIB::POW_F64,
528
24
                                           RTLIB::POW_F80,
529
24
                                           RTLIB::POW_F128,
530
24
                                           RTLIB::POW_PPCF128),
531
24
                         NVT, Ops, false, SDLoc(N)).first;
532
24
}
533
534
12
SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
535
12
  assert(N->getOperand(1).getValueType() == MVT::i32 &&
536
12
         "Unsupported power type!");
537
12
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
538
12
  SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
539
12
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
540
12
                                           RTLIB::POWI_F32,
541
12
                                           RTLIB::POWI_F64,
542
12
                                           RTLIB::POWI_F80,
543
12
                                           RTLIB::POWI_F128,
544
12
                                           RTLIB::POWI_PPCF128),
545
12
                         NVT, Ops, false, SDLoc(N)).first;
546
12
}
547
548
3
SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
549
3
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
550
3
  SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
551
3
                     GetSoftenedFloat(N->getOperand(1)) };
552
3
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
553
3
                                           RTLIB::REM_F32,
554
3
                                           RTLIB::REM_F64,
555
3
                                           RTLIB::REM_F80,
556
3
                                           RTLIB::REM_F128,
557
3
                                           RTLIB::REM_PPCF128),
558
3
                         NVT, Ops, false, SDLoc(N)).first;
559
3
}
560
561
10
SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) {
562
10
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
563
10
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
564
10
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
565
10
                                           RTLIB::RINT_F32,
566
10
                                           RTLIB::RINT_F64,
567
10
                                           RTLIB::RINT_F80,
568
10
                                           RTLIB::RINT_F128,
569
10
                                           RTLIB::RINT_PPCF128),
570
10
                         NVT, Op, false, SDLoc(N)).first;
571
10
}
572
573
12
SDValue DAGTypeLegalizer::SoftenFloatRes_FROUND(SDNode *N) {
574
12
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
575
12
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
576
12
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
577
12
                                           RTLIB::ROUND_F32,
578
12
                                           RTLIB::ROUND_F64,
579
12
                                           RTLIB::ROUND_F80,
580
12
                                           RTLIB::ROUND_F128,
581
12
                                           RTLIB::ROUND_PPCF128),
582
12
                         NVT, Op, false, SDLoc(N)).first;
583
12
}
584
585
7
SDValue DAGTypeLegalizer::SoftenFloatRes_FSIN(SDNode *N) {
586
7
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
587
7
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
588
7
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
589
7
                                           RTLIB::SIN_F32,
590
7
                                           RTLIB::SIN_F64,
591
7
                                           RTLIB::SIN_F80,
592
7
                                           RTLIB::SIN_F128,
593
7
                                           RTLIB::SIN_PPCF128),
594
7
                         NVT, Op, false, SDLoc(N)).first;
595
7
}
596
597
8
SDValue DAGTypeLegalizer::SoftenFloatRes_FSQRT(SDNode *N) {
598
8
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
599
8
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
600
8
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
601
8
                                           RTLIB::SQRT_F32,
602
8
                                           RTLIB::SQRT_F64,
603
8
                                           RTLIB::SQRT_F80,
604
8
                                           RTLIB::SQRT_F128,
605
8
                                           RTLIB::SQRT_PPCF128),
606
8
                         NVT, Op, false, SDLoc(N)).first;
607
8
}
608
609
140
SDValue DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
610
140
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
611
140
  SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
612
140
                     GetSoftenedFloat(N->getOperand(1)) };
613
140
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
614
140
                                           RTLIB::SUB_F32,
615
140
                                           RTLIB::SUB_F64,
616
140
                                           RTLIB::SUB_F80,
617
140
                                           RTLIB::SUB_F128,
618
140
                                           RTLIB::SUB_PPCF128),
619
140
                         NVT, Ops, false, SDLoc(N)).first;
620
140
}
621
622
7
SDValue DAGTypeLegalizer::SoftenFloatRes_FTRUNC(SDNode *N) {
623
7
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
624
7
  if (N->getValueType(0) == MVT::f16)
625
0
    return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, N->getOperand(0));
626
7
627
7
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
628
7
  return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
629
7
                                           RTLIB::TRUNC_F32,
630
7
                                           RTLIB::TRUNC_F64,
631
7
                                           RTLIB::TRUNC_F80,
632
7
                                           RTLIB::TRUNC_F128,
633
7
                                           RTLIB::TRUNC_PPCF128),
634
7
                         NVT, Op, false, SDLoc(N)).first;
635
7
}
636
637
894
SDValue DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo) {
638
894
  bool LegalInHWReg = isLegalInHWReg(N->getValueType(ResNo));
639
894
  LoadSDNode *L = cast<LoadSDNode>(N);
640
894
  EVT VT = N->getValueType(0);
641
894
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
642
894
  SDLoc dl(N);
643
894
644
894
  auto MMOFlags =
645
894
      L->getMemOperand()->getFlags() &
646
894
      ~(MachineMemOperand::MOInvariant | MachineMemOperand::MODereferenceable);
647
894
  SDValue NewL;
648
894
  if (L->getExtensionType() == ISD::NON_EXTLOAD) {
649
874
    NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), NVT, dl,
650
874
                       L->getChain(), L->getBasePtr(), L->getOffset(),
651
874
                       L->getPointerInfo(), NVT, L->getAlignment(), MMOFlags,
652
874
                       L->getAAInfo());
653
874
    // Legalized the chain result - switch anything that used the old chain to
654
874
    // use the new one.
655
874
    if (N != NewL.getValue(1).getNode())
656
786
      ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
657
874
    return NewL;
658
874
  }
659
20
660
20
  // Do a non-extending load followed by FP_EXTEND.
661
20
  NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD, L->getMemoryVT(),
662
20
                     dl, L->getChain(), L->getBasePtr(), L->getOffset(),
663
20
                     L->getPointerInfo(), L->getMemoryVT(), L->getAlignment(),
664
20
                     MMOFlags, L->getAAInfo());
665
20
  // Legalized the chain result - switch anything that used the old chain to
666
20
  // use the new one.
667
20
  ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
668
20
  auto ExtendNode = DAG.getNode(ISD::FP_EXTEND, dl, VT, NewL);
669
20
  if (LegalInHWReg)
670
8
    return ExtendNode;
671
12
  return BitConvertToInteger(ExtendNode);
672
12
}
673
674
351
SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo) {
675
351
  if (isLegalInHWReg(N->getValueType(ResNo)))
676
43
    return SDValue(N, ResNo);
677
308
  SDValue LHS = GetSoftenedFloat(N->getOperand(1));
678
308
  SDValue RHS = GetSoftenedFloat(N->getOperand(2));
679
308
  return DAG.getSelect(SDLoc(N),
680
308
                       LHS.getValueType(), N->getOperand(0), LHS, RHS);
681
308
}
682
683
19
SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo) {
684
19
  if (isLegalInHWReg(N->getValueType(ResNo)))
685
0
    return SDValue(N, ResNo);
686
19
  SDValue LHS = GetSoftenedFloat(N->getOperand(2));
687
19
  SDValue RHS = GetSoftenedFloat(N->getOperand(3));
688
19
  return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
689
19
                     LHS.getValueType(), N->getOperand(0),
690
19
                     N->getOperand(1), LHS, RHS, N->getOperand(4));
691
19
}
692
693
3
SDValue DAGTypeLegalizer::SoftenFloatRes_UNDEF(SDNode *N) {
694
3
  return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
695
3
                                               N->getValueType(0)));
696
3
}
697
698
9
SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) {
699
9
  SDValue Chain = N->getOperand(0); // Get the chain.
700
9
  SDValue Ptr = N->getOperand(1); // Get the pointer.
701
9
  EVT VT = N->getValueType(0);
702
9
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
703
9
  SDLoc dl(N);
704
9
705
9
  SDValue NewVAARG;
706
9
  NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2),
707
9
                          N->getConstantOperandVal(3));
708
9
709
9
  // Legalized the chain result - switch anything that used the old chain to
710
9
  // use the new one.
711
9
  if (N != NewVAARG.getValue(1).getNode())
712
9
    ReplaceValueWith(SDValue(N, 1), NewVAARG.getValue(1));
713
9
  return NewVAARG;
714
9
}
715
716
391
SDValue DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
717
391
  bool Signed = N->getOpcode() == ISD::SINT_TO_FP;
718
391
  EVT SVT = N->getOperand(0).getValueType();
719
391
  EVT RVT = N->getValueType(0);
720
391
  EVT NVT = EVT();
721
391
  SDLoc dl(N);
722
391
723
391
  // If the input is not legal, eg: i1 -> fp, then it needs to be promoted to
724
391
  // a larger type, eg: i8 -> fp.  Even if it is legal, no libcall may exactly
725
391
  // match.  Look for an appropriate libcall.
726
391
  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
727
391
  for (unsigned t = MVT::FIRST_INTEGER_VALUETYPE;
728
2.06k
       t <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; 
++t1.67k
) {
729
1.67k
    NVT = (MVT::SimpleValueType)t;
730
1.67k
    // The source needs to big enough to hold the operand.
731
1.67k
    if (NVT.bitsGE(SVT))
732
661
      LC = Signed ? 
RTLIB::getSINTTOFP(NVT, RVT)183
:
RTLIB::getUINTTOFP (NVT, RVT)478
;
733
1.67k
  }
734
391
  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
735
391
736
391
  // Sign/zero extend the argument if the libcall takes a larger type.
737
391
  SDValue Op = DAG.getNode(Signed ? 
ISD::SIGN_EXTEND171
:
ISD::ZERO_EXTEND220
, dl,
738
391
                           NVT, N->getOperand(0));
739
391
  return TLI.makeLibCall(DAG, LC,
740
391
                         TLI.getTypeToTransformTo(*DAG.getContext(), RVT),
741
391
                         Op, Signed, dl).first;
742
391
}
743
744
745
//===----------------------------------------------------------------------===//
746
//  Convert Float Operand to Integer for Non-HW-supported Operations.
747
//===----------------------------------------------------------------------===//
748
749
3.17k
bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
750
3.17k
  LLVM_DEBUG(dbgs() << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
751
3.17k
             dbgs() << "\n");
752
3.17k
  SDValue Res = SDValue();
753
3.17k
754
3.17k
  switch (N->getOpcode()) {
755
3.17k
  default:
756
0
    if (CanSkipSoftenFloatOperand(N, OpNo))
757
0
      return false;
758
#ifndef NDEBUG
759
    dbgs() << "SoftenFloatOperand Op #" << OpNo << ": ";
760
    N->dump(&DAG); dbgs() << "\n";
761
#endif
762
0
    llvm_unreachable("Do not know how to soften this operator's operand!");
763
0
764
709
  case ISD::BITCAST:     Res = SoftenFloatOp_BITCAST(N); break;
765
332
  case ISD::CopyToReg:   Res = SoftenFloatOp_COPY_TO_REG(N); break;
766
0
  case ISD::BR_CC:       Res = SoftenFloatOp_BR_CC(N); break;
767
13
  case ISD::FABS:        Res = SoftenFloatOp_FABS(N); break;
768
7
  case ISD::FCOPYSIGN:   Res = SoftenFloatOp_FCOPYSIGN(N); break;
769
2
  case ISD::FNEG:        Res = SoftenFloatOp_FNEG(N); break;
770
0
  case ISD::FP_EXTEND:   Res = SoftenFloatOp_FP_EXTEND(N); break;
771
188
  case ISD::FP_TO_FP16:  // Same as FP_ROUND for softening purposes
772
188
  case ISD::FP_ROUND:    Res = SoftenFloatOp_FP_ROUND(N); break;
773
278
  case ISD::FP_TO_SINT:
774
278
  case ISD::FP_TO_UINT:  Res = SoftenFloatOp_FP_TO_XINT(N); break;
775
278
  
case ISD::LROUND: Res = SoftenFloatOp_LROUND(N); break10
;
776
278
  
case ISD::LLROUND: Res = SoftenFloatOp_LLROUND(N); break6
;
777
278
  
case ISD::LRINT: Res = SoftenFloatOp_LRINT(N); break10
;
778
278
  
case ISD::LLRINT: Res = SoftenFloatOp_LLRINT(N); break6
;
779
278
  
case ISD::SELECT: Res = SoftenFloatOp_SELECT(N); break22
;
780
278
  
case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break24
;
781
928
  case ISD::SETCC:       Res = SoftenFloatOp_SETCC(N); break;
782
636
  case ISD::STORE:
783
636
    Res = SoftenFloatOp_STORE(N, OpNo);
784
636
    // Do not try to analyze or soften this node again if the value is
785
636
    // or can be held in a register. In that case, Res.getNode() should
786
636
    // be equal to N.
787
636
    if (Res.getNode() == N &&
788
636
        
isLegalInHWReg(N->getOperand(OpNo).getValueType())110
)
789
110
      return false;
790
526
    // Otherwise, we need to reanalyze and lower the new Res nodes.
791
526
    break;
792
3.06k
  }
793
3.06k
794
3.06k
  // If the result is null, the sub-method took care of registering results etc.
795
3.06k
  if (!Res.getNode()) 
return false330
;
796
2.73k
797
2.73k
  // If the result is N, the sub-method updated N in place.  Tell the legalizer
798
2.73k
  // core about this to re-analyze.
799
2.73k
  if (Res.getNode() == N)
800
909
    return true;
801
1.82k
802
1.82k
  assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
803
1.82k
         "Invalid operand expansion");
804
1.82k
805
1.82k
  ReplaceValueWith(SDValue(N, 0), Res);
806
1.82k
  return false;
807
1.82k
}
808
809
0
bool DAGTypeLegalizer::CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo) {
810
0
  if (!isLegalInHWReg(N->getOperand(OpNo).getValueType()))
811
0
    return false;
812
0
813
0
  // When the operand type can be kept in registers there is nothing to do for
814
0
  // the following opcodes.
815
0
  switch (N->getOperand(OpNo).getOpcode()) {
816
0
    case ISD::BITCAST:
817
0
    case ISD::ConstantFP:
818
0
    case ISD::CopyFromReg:
819
0
    case ISD::CopyToReg:
820
0
    case ISD::FABS:
821
0
    case ISD::FCOPYSIGN:
822
0
    case ISD::FNEG:
823
0
    case ISD::Register:
824
0
    case ISD::SELECT:
825
0
    case ISD::SELECT_CC:
826
0
      return true;
827
0
  }
828
0
829
0
  switch (N->getOpcode()) {
830
0
    case ISD::ConstantFP:  // Leaf node.
831
0
    case ISD::CopyFromReg: // Operand is a register that we know to be left
832
0
                           // unchanged by SoftenFloatResult().
833
0
    case ISD::Register:    // Leaf node.
834
0
      return true;
835
0
  }
836
0
  return false;
837
0
}
838
839
709
SDValue DAGTypeLegalizer::SoftenFloatOp_BITCAST(SDNode *N) {
840
709
  return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
841
709
                     GetSoftenedFloat(N->getOperand(0)));
842
709
}
843
844
332
SDValue DAGTypeLegalizer::SoftenFloatOp_COPY_TO_REG(SDNode *N) {
845
332
  SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
846
332
  SDValue Op2 = GetSoftenedFloat(N->getOperand(2));
847
332
848
332
  if (Op1 == N->getOperand(1) && Op2 == N->getOperand(2))
849
288
    return SDValue();
850
44
851
44
  if (N->getNumOperands() == 3)
852
44
    return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2), 0);
853
0
854
0
  return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2,
855
0
                                        N->getOperand(3)),
856
0
                 0);
857
0
}
858
859
0
SDValue DAGTypeLegalizer::SoftenFloatOp_FP_EXTEND(SDNode *N) {
860
0
  // If we get here, the result must be legal but the source illegal.
861
0
  EVT SVT = N->getOperand(0).getValueType();
862
0
  EVT RVT = N->getValueType(0);
863
0
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
864
0
865
0
  if (SVT == MVT::f16)
866
0
    return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), RVT, Op);
867
0
868
0
  RTLIB::Libcall LC = RTLIB::getFPEXT(SVT, RVT);
869
0
  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND libcall");
870
0
871
0
  return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
872
0
}
873
874
875
188
SDValue DAGTypeLegalizer::SoftenFloatOp_FP_ROUND(SDNode *N) {
876
188
  // We actually deal with the partially-softened FP_TO_FP16 node too, which
877
188
  // returns an i16 so doesn't meet the constraints necessary for FP_ROUND.
878
188
  assert(N->getOpcode() == ISD::FP_ROUND || N->getOpcode() == ISD::FP_TO_FP16);
879
188
880
188
  EVT SVT = N->getOperand(0).getValueType();
881
188
  EVT RVT = N->getValueType(0);
882
188
  EVT FloatRVT = N->getOpcode() == ISD::FP_TO_FP16 ? 
MVT::f16163
:
RVT25
;
883
188
884
188
  RTLIB::Libcall LC = RTLIB::getFPROUND(SVT, FloatRVT);
885
188
  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND libcall");
886
188
887
188
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
888
188
  return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
889
188
}
890
891
0
SDValue DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
892
0
  SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
893
0
  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
894
0
895
0
  EVT VT = NewLHS.getValueType();
896
0
  NewLHS = GetSoftenedFloat(NewLHS);
897
0
  NewRHS = GetSoftenedFloat(NewRHS);
898
0
  TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
899
0
900
0
  // If softenSetCCOperands returned a scalar, we need to compare the result
901
0
  // against zero to select between true and false values.
902
0
  if (!NewRHS.getNode()) {
903
0
    NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
904
0
    CCCode = ISD::SETNE;
905
0
  }
906
0
907
0
  // Update N to have the operands specified.
908
0
  return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
909
0
                                DAG.getCondCode(CCCode), NewLHS, NewRHS,
910
0
                                N->getOperand(4)),
911
0
                 0);
912
0
}
913
914
13
SDValue DAGTypeLegalizer::SoftenFloatOp_FABS(SDNode *N) {
915
13
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
916
13
917
13
  if (Op == N->getOperand(0))
918
13
    return SDValue();
919
0
920
0
  return SDValue(DAG.UpdateNodeOperands(N, Op), 0);
921
0
}
922
923
7
SDValue DAGTypeLegalizer::SoftenFloatOp_FCOPYSIGN(SDNode *N) {
924
7
  SDValue Op0 = GetSoftenedFloat(N->getOperand(0));
925
7
  SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
926
7
927
7
  if (Op0 == N->getOperand(0) && Op1 == N->getOperand(1))
928
7
    return SDValue();
929
0
930
0
  return SDValue(DAG.UpdateNodeOperands(N, Op0, Op1), 0);
931
0
}
932
933
2
SDValue DAGTypeLegalizer::SoftenFloatOp_FNEG(SDNode *N) {
934
2
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
935
2
936
2
  if (Op == N->getOperand(0))
937
1
    return SDValue();
938
1
939
1
  return SDValue(DAG.UpdateNodeOperands(N, Op), 0);
940
1
}
941
942
278
SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT(SDNode *N) {
943
278
  bool Signed = N->getOpcode() == ISD::FP_TO_SINT;
944
278
  EVT SVT = N->getOperand(0).getValueType();
945
278
  EVT RVT = N->getValueType(0);
946
278
  EVT NVT = EVT();
947
278
  SDLoc dl(N);
948
278
949
278
  // If the result is not legal, eg: fp -> i1, then it needs to be promoted to
950
278
  // a larger type, eg: fp -> i32. Even if it is legal, no libcall may exactly
951
278
  // match, eg. we don't have fp -> i8 conversions.
952
278
  // Look for an appropriate libcall.
953
278
  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
954
278
  for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
955
1.44k
       IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
956
1.16k
       ++IntVT) {
957
1.16k
    NVT = (MVT::SimpleValueType)IntVT;
958
1.16k
    // The type needs to big enough to hold the result.
959
1.16k
    if (NVT.bitsGE(RVT))
960
290
      LC = Signed ? 
RTLIB::getFPTOSINT(SVT, NVT)175
:
RTLIB::getFPTOUINT(SVT, NVT)115
;
961
1.16k
  }
962
278
  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_XINT!");
963
278
964
278
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
965
278
  SDValue Res = TLI.makeLibCall(DAG, LC, NVT, Op, false, dl).first;
966
278
967
278
  // Truncate the result if the libcall returns a larger type.
968
278
  return DAG.getNode(ISD::TRUNCATE, dl, RVT, Res);
969
278
}
970
971
22
SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT(SDNode *N) {
972
22
  SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
973
22
  SDValue Op2 = GetSoftenedFloat(N->getOperand(2));
974
22
975
22
  if (Op1 == N->getOperand(1) && 
Op2 == N->getOperand(2)21
)
976
21
    return SDValue();
977
1
978
1
  return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2),
979
1
                 0);
980
1
}
981
982
24
SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
983
24
  SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
984
24
  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
985
24
986
24
  EVT VT = NewLHS.getValueType();
987
24
  NewLHS = GetSoftenedFloat(NewLHS);
988
24
  NewRHS = GetSoftenedFloat(NewRHS);
989
24
  TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
990
24
991
24
  // If softenSetCCOperands returned a scalar, we need to compare the result
992
24
  // against zero to select between true and false values.
993
24
  if (!NewRHS.getNode()) {
994
3
    NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
995
3
    CCCode = ISD::SETNE;
996
3
  }
997
24
998
24
  // Update N to have the operands specified.
999
24
  return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1000
24
                                N->getOperand(2), N->getOperand(3),
1001
24
                                DAG.getCondCode(CCCode)),
1002
24
                 0);
1003
24
}
1004
1005
928
SDValue DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
1006
928
  SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1007
928
  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1008
928
1009
928
  EVT VT = NewLHS.getValueType();
1010
928
  NewLHS = GetSoftenedFloat(NewLHS);
1011
928
  NewRHS = GetSoftenedFloat(NewRHS);
1012
928
  TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
1013
928
1014
928
  // If softenSetCCOperands returned a scalar, use it.
1015
928
  if (!NewRHS.getNode()) {
1016
89
    assert(NewLHS.getValueType() == N->getValueType(0) &&
1017
89
           "Unexpected setcc expansion!");
1018
89
    return NewLHS;
1019
89
  }
1020
839
1021
839
  // Otherwise, update N to have the operands specified.
1022
839
  return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1023
839
                                DAG.getCondCode(CCCode)),
1024
839
                 0);
1025
839
}
1026
1027
636
SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
1028
636
  assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1029
636
  assert(OpNo == 1 && "Can only soften the stored value!");
1030
636
  StoreSDNode *ST = cast<StoreSDNode>(N);
1031
636
  SDValue Val = ST->getValue();
1032
636
  SDLoc dl(N);
1033
636
1034
636
  if (ST->isTruncatingStore())
1035
6
    // Do an FP_ROUND followed by a non-truncating store.
1036
6
    Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, dl, ST->getMemoryVT(),
1037
6
                                          Val, DAG.getIntPtrConstant(0, dl)));
1038
630
  else
1039
630
    Val = GetSoftenedFloat(Val);
1040
636
1041
636
  return DAG.getStore(ST->getChain(), dl, Val, ST->getBasePtr(),
1042
636
                      ST->getMemOperand());
1043
636
}
1044
1045
10
SDValue DAGTypeLegalizer::SoftenFloatOp_LROUND(SDNode *N) {
1046
10
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1047
10
1048
10
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
1049
10
  EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1050
10
  return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1051
10
                                           RTLIB::LROUND_F32,
1052
10
                                           RTLIB::LROUND_F64,
1053
10
                                           RTLIB::LROUND_F80,
1054
10
                                           RTLIB::LROUND_F128,
1055
10
                                           RTLIB::LROUND_PPCF128),
1056
10
                         NVT, Op, false, SDLoc(N)).first;
1057
10
}
1058
1059
6
SDValue DAGTypeLegalizer::SoftenFloatOp_LLROUND(SDNode *N) {
1060
6
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1061
6
1062
6
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
1063
6
  EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1064
6
  return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1065
6
                                           RTLIB::LLROUND_F32,
1066
6
                                           RTLIB::LLROUND_F64,
1067
6
                                           RTLIB::LLROUND_F80,
1068
6
                                           RTLIB::LLROUND_F128,
1069
6
                                           RTLIB::LLROUND_PPCF128),
1070
6
                         NVT, Op, false, SDLoc(N)).first;
1071
6
}
1072
1073
10
SDValue DAGTypeLegalizer::SoftenFloatOp_LRINT(SDNode *N) {
1074
10
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1075
10
1076
10
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
1077
10
  EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1078
10
  return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1079
10
                                           RTLIB::LRINT_F32,
1080
10
                                           RTLIB::LRINT_F64,
1081
10
                                           RTLIB::LRINT_F80,
1082
10
                                           RTLIB::LRINT_F128,
1083
10
                                           RTLIB::LRINT_PPCF128),
1084
10
                         NVT, Op, false, SDLoc(N)).first;
1085
10
}
1086
1087
6
SDValue DAGTypeLegalizer::SoftenFloatOp_LLRINT(SDNode *N) {
1088
6
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1089
6
1090
6
  SDValue Op = GetSoftenedFloat(N->getOperand(0));
1091
6
  EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1092
6
  return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1093
6
                                           RTLIB::LLRINT_F32,
1094
6
                                           RTLIB::LLRINT_F64,
1095
6
                                           RTLIB::LLRINT_F80,
1096
6
                                           RTLIB::LLRINT_F128,
1097
6
                                           RTLIB::LLRINT_PPCF128),
1098
6
                         NVT, Op, false, SDLoc(N)).first;
1099
6
}
1100
1101
//===----------------------------------------------------------------------===//
1102
//  Float Result Expansion
1103
//===----------------------------------------------------------------------===//
1104
1105
/// ExpandFloatResult - This method is called when the specified result of the
1106
/// specified node is found to need expansion.  At this point, the node may also
1107
/// have invalid operands or may have other results that need promotion, we just
1108
/// know that (at least) one result needs expansion.
1109
250
void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
1110
250
  LLVM_DEBUG(dbgs() << "Expand float result: "; N->dump(&DAG); dbgs() << "\n");
1111
250
  SDValue Lo, Hi;
1112
250
  Lo = Hi = SDValue();
1113
250
1114
250
  // See if the target wants to custom expand this node.
1115
250
  if (CustomLowerNode(N, N->getValueType(ResNo), true))
1116
0
    return;
1117
250
1118
250
  switch (N->getOpcode()) {
1119
250
  default:
1120
#ifndef NDEBUG
1121
    dbgs() << "ExpandFloatResult #" << ResNo << ": ";
1122
    N->dump(&DAG); dbgs() << "\n";
1123
#endif
1124
0
    llvm_unreachable("Do not know how to expand the result of this operator!");
1125
250
1126
250
  
case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break0
;
1127
250
  
case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break3
;
1128
250
  
case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break4
;
1129
250
1130
250
  
case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break0
;
1131
250
  
case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break1
;
1132
250
  
case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break130
;
1133
250
  
case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break0
;
1134
250
  
case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break4
;
1135
250
  
case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break1
;
1136
250
1137
250
  
case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break33
;
1138
250
  
case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break1
;
1139
250
  
case ISD::FMINNUM: ExpandFloatRes_FMINNUM(N, Lo, Hi); break2
;
1140
250
  
case ISD::FMAXNUM: ExpandFloatRes_FMAXNUM(N, Lo, Hi); break2
;
1141
250
  
case ISD::FADD: ExpandFloatRes_FADD(N, Lo, Hi); break13
;
1142
250
  
case ISD::FCEIL: ExpandFloatRes_FCEIL(N, Lo, Hi); break0
;
1143
250
  
case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break7
;
1144
250
  
case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break0
;
1145
250
  
case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break5
;
1146
250
  
case ISD::FEXP: ExpandFloatRes_FEXP(N, Lo, Hi); break0
;
1147
250
  
case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break0
;
1148
250
  
case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break0
;
1149
250
  
case ISD::FLOG: ExpandFloatRes_FLOG(N, Lo, Hi); break0
;
1150
250
  
case ISD::FLOG2: ExpandFloatRes_FLOG2(N, Lo, Hi); break0
;
1151
250
  
case ISD::FLOG10: ExpandFloatRes_FLOG10(N, Lo, Hi); break0
;
1152
250
  
case ISD::FMA: ExpandFloatRes_FMA(N, Lo, Hi); break0
;
1153
250
  
case ISD::FMUL: ExpandFloatRes_FMUL(N, Lo, Hi); break4
;
1154
250
  
case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break0
;
1155
250
  
case ISD::FNEG: ExpandFloatRes_FNEG(N, Lo, Hi); break1
;
1156
250
  
case ISD::FP_EXTEND: ExpandFloatRes_FP_EXTEND(N, Lo, Hi); break10
;
1157
250
  
case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break1
;
1158
250
  
case ISD::FPOWI: ExpandFloatRes_FPOWI(N, Lo, Hi); break0
;
1159
250
  
case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break0
;
1160
250
  
case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break0
;
1161
250
  
case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break0
;
1162
250
  
case ISD::FSQRT: ExpandFloatRes_FSQRT(N, Lo, Hi); break1
;
1163
250
  
case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break8
;
1164
250
  
case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break0
;
1165
250
  
case ISD::LOAD: ExpandFloatRes_LOAD(N, Lo, Hi); break11
;
1166
250
  case ISD::SINT_TO_FP:
1167
7
  case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
1168
7
  
case ISD::FREM: ExpandFloatRes_FREM(N, Lo, Hi); break1
;
1169
250
  }
1170
250
1171
250
  // If Lo/Hi is null, the sub-method took care of registering results etc.
1172
250
  if (Lo.getNode())
1173
250
    SetExpandedFloat(SDValue(N, ResNo), Lo, Hi);
1174
250
}
1175
1176
void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo,
1177
33
                                                 SDValue &Hi) {
1178
33
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1179
33
  assert(NVT.getSizeInBits() == 64 &&
1180
33
         "Do not know how to expand this float constant!");
1181
33
  APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().bitcastToAPInt();
1182
33
  SDLoc dl(N);
1183
33
  Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1184
33
                                 APInt(64, C.getRawData()[1])),
1185
33
                         dl, NVT);
1186
33
  Hi = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1187
33
                                 APInt(64, C.getRawData()[0])),
1188
33
                         dl, NVT);
1189
33
}
1190
1191
void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDValue &Lo,
1192
1
                                           SDValue &Hi) {
1193
1
  assert(N->getValueType(0) == MVT::ppcf128 &&
1194
1
         "Logic only correct for ppcf128!");
1195
1
  SDLoc dl(N);
1196
1
  SDValue Tmp;
1197
1
  GetExpandedFloat(N->getOperand(0), Lo, Tmp);
1198
1
  Hi = DAG.getNode(ISD::FABS, dl, Tmp.getValueType(), Tmp);
1199
1
  // Lo = Hi==fabs(Hi) ? Lo : -Lo;
1200
1
  Lo = DAG.getSelectCC(dl, Tmp, Hi, Lo,
1201
1
                   DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo),
1202
1
                   ISD::SETEQ);
1203
1
}
1204
1205
void DAGTypeLegalizer::ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo,
1206
2
                                              SDValue &Hi) {
1207
2
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1208
2
                                         RTLIB::FMIN_F32, RTLIB::FMIN_F64,
1209
2
                                         RTLIB::FMIN_F80, RTLIB::FMIN_F128,
1210
2
                                         RTLIB::FMIN_PPCF128),
1211
2
                            N, false);
1212
2
  GetPairElements(Call, Lo, Hi);
1213
2
}
1214
1215
void DAGTypeLegalizer::ExpandFloatRes_FMAXNUM(SDNode *N, SDValue &Lo,
1216
2
                                              SDValue &Hi) {
1217
2
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1218
2
                                         RTLIB::FMAX_F32, RTLIB::FMAX_F64,
1219
2
                                         RTLIB::FMAX_F80, RTLIB::FMAX_F128,
1220
2
                                         RTLIB::FMAX_PPCF128),
1221
2
                            N, false);
1222
2
  GetPairElements(Call, Lo, Hi);
1223
2
}
1224
1225
void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDValue &Lo,
1226
13
                                           SDValue &Hi) {
1227
13
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1228
13
                                         RTLIB::ADD_F32, RTLIB::ADD_F64,
1229
13
                                         RTLIB::ADD_F80, RTLIB::ADD_F128,
1230
13
                                         RTLIB::ADD_PPCF128),
1231
13
                            N, false);
1232
13
  GetPairElements(Call, Lo, Hi);
1233
13
}
1234
1235
void DAGTypeLegalizer::ExpandFloatRes_FCEIL(SDNode *N,
1236
0
                                            SDValue &Lo, SDValue &Hi) {
1237
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1238
0
                                         RTLIB::CEIL_F32, RTLIB::CEIL_F64,
1239
0
                                         RTLIB::CEIL_F80, RTLIB::CEIL_F128,
1240
0
                                         RTLIB::CEIL_PPCF128),
1241
0
                            N, false);
1242
0
  GetPairElements(Call, Lo, Hi);
1243
0
}
1244
1245
void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(SDNode *N,
1246
7
                                                SDValue &Lo, SDValue &Hi) {
1247
7
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1248
7
                                         RTLIB::COPYSIGN_F32,
1249
7
                                         RTLIB::COPYSIGN_F64,
1250
7
                                         RTLIB::COPYSIGN_F80,
1251
7
                                         RTLIB::COPYSIGN_F128,
1252
7
                                         RTLIB::COPYSIGN_PPCF128),
1253
7
                            N, false);
1254
7
  GetPairElements(Call, Lo, Hi);
1255
7
}
1256
1257
void DAGTypeLegalizer::ExpandFloatRes_FCOS(SDNode *N,
1258
0
                                           SDValue &Lo, SDValue &Hi) {
1259
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1260
0
                                         RTLIB::COS_F32, RTLIB::COS_F64,
1261
0
                                         RTLIB::COS_F80, RTLIB::COS_F128,
1262
0
                                         RTLIB::COS_PPCF128),
1263
0
                            N, false);
1264
0
  GetPairElements(Call, Lo, Hi);
1265
0
}
1266
1267
void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo,
1268
5
                                           SDValue &Hi) {
1269
5
  SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1270
5
  SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1271
5
                                                   RTLIB::DIV_F32,
1272
5
                                                   RTLIB::DIV_F64,
1273
5
                                                   RTLIB::DIV_F80,
1274
5
                                                   RTLIB::DIV_F128,
1275
5
                                                   RTLIB::DIV_PPCF128),
1276
5
                                 N->getValueType(0), Ops, false,
1277
5
                                 SDLoc(N)).first;
1278
5
  GetPairElements(Call, Lo, Hi);
1279
5
}
1280
1281
void DAGTypeLegalizer::ExpandFloatRes_FEXP(SDNode *N,
1282
0
                                           SDValue &Lo, SDValue &Hi) {
1283
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1284
0
                                         RTLIB::EXP_F32, RTLIB::EXP_F64,
1285
0
                                         RTLIB::EXP_F80, RTLIB::EXP_F128,
1286
0
                                         RTLIB::EXP_PPCF128),
1287
0
                            N, false);
1288
0
  GetPairElements(Call, Lo, Hi);
1289
0
}
1290
1291
void DAGTypeLegalizer::ExpandFloatRes_FEXP2(SDNode *N,
1292
0
                                            SDValue &Lo, SDValue &Hi) {
1293
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1294
0
                                         RTLIB::EXP2_F32, RTLIB::EXP2_F64,
1295
0
                                         RTLIB::EXP2_F80, RTLIB::EXP2_F128,
1296
0
                                         RTLIB::EXP2_PPCF128),
1297
0
                            N, false);
1298
0
  GetPairElements(Call, Lo, Hi);
1299
0
}
1300
1301
void DAGTypeLegalizer::ExpandFloatRes_FFLOOR(SDNode *N,
1302
0
                                             SDValue &Lo, SDValue &Hi) {
1303
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1304
0
                                         RTLIB::FLOOR_F32, RTLIB::FLOOR_F64,
1305
0
                                         RTLIB::FLOOR_F80, RTLIB::FLOOR_F128,
1306
0
                                         RTLIB::FLOOR_PPCF128),
1307
0
                            N, false);
1308
0
  GetPairElements(Call, Lo, Hi);
1309
0
}
1310
1311
void DAGTypeLegalizer::ExpandFloatRes_FLOG(SDNode *N,
1312
0
                                           SDValue &Lo, SDValue &Hi) {
1313
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1314
0
                                         RTLIB::LOG_F32, RTLIB::LOG_F64,
1315
0
                                         RTLIB::LOG_F80, RTLIB::LOG_F128,
1316
0
                                         RTLIB::LOG_PPCF128),
1317
0
                            N, false);
1318
0
  GetPairElements(Call, Lo, Hi);
1319
0
}
1320
1321
void DAGTypeLegalizer::ExpandFloatRes_FLOG2(SDNode *N,
1322
0
                                            SDValue &Lo, SDValue &Hi) {
1323
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1324
0
                                         RTLIB::LOG2_F32, RTLIB::LOG2_F64,
1325
0
                                         RTLIB::LOG2_F80, RTLIB::LOG2_F128,
1326
0
                                         RTLIB::LOG2_PPCF128),
1327
0
                            N, false);
1328
0
  GetPairElements(Call, Lo, Hi);
1329
0
}
1330
1331
void DAGTypeLegalizer::ExpandFloatRes_FLOG10(SDNode *N,
1332
0
                                             SDValue &Lo, SDValue &Hi) {
1333
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1334
0
                                         RTLIB::LOG10_F32, RTLIB::LOG10_F64,
1335
0
                                         RTLIB::LOG10_F80, RTLIB::LOG10_F128,
1336
0
                                         RTLIB::LOG10_PPCF128),
1337
0
                            N, false);
1338
0
  GetPairElements(Call, Lo, Hi);
1339
0
}
1340
1341
void DAGTypeLegalizer::ExpandFloatRes_FMA(SDNode *N, SDValue &Lo,
1342
0
                                          SDValue &Hi) {
1343
0
  SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1344
0
  SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1345
0
                                                   RTLIB::FMA_F32,
1346
0
                                                   RTLIB::FMA_F64,
1347
0
                                                   RTLIB::FMA_F80,
1348
0
                                                   RTLIB::FMA_F128,
1349
0
                                                   RTLIB::FMA_PPCF128),
1350
0
                                 N->getValueType(0), Ops, false,
1351
0
                                 SDLoc(N)).first;
1352
0
  GetPairElements(Call, Lo, Hi);
1353
0
}
1354
1355
void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo,
1356
4
                                           SDValue &Hi) {
1357
4
  SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1358
4
  SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1359
4
                                                   RTLIB::MUL_F32,
1360
4
                                                   RTLIB::MUL_F64,
1361
4
                                                   RTLIB::MUL_F80,
1362
4
                                                   RTLIB::MUL_F128,
1363
4
                                                   RTLIB::MUL_PPCF128),
1364
4
                                 N->getValueType(0), Ops, false,
1365
4
                                 SDLoc(N)).first;
1366
4
  GetPairElements(Call, Lo, Hi);
1367
4
}
1368
1369
void DAGTypeLegalizer::ExpandFloatRes_FNEARBYINT(SDNode *N,
1370
0
                                                 SDValue &Lo, SDValue &Hi) {
1371
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1372
0
                                         RTLIB::NEARBYINT_F32,
1373
0
                                         RTLIB::NEARBYINT_F64,
1374
0
                                         RTLIB::NEARBYINT_F80,
1375
0
                                         RTLIB::NEARBYINT_F128,
1376
0
                                         RTLIB::NEARBYINT_PPCF128),
1377
0
                            N, false);
1378
0
  GetPairElements(Call, Lo, Hi);
1379
0
}
1380
1381
void DAGTypeLegalizer::ExpandFloatRes_FNEG(SDNode *N, SDValue &Lo,
1382
1
                                           SDValue &Hi) {
1383
1
  SDLoc dl(N);
1384
1
  GetExpandedFloat(N->getOperand(0), Lo, Hi);
1385
1
  Lo = DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo);
1386
1
  Hi = DAG.getNode(ISD::FNEG, dl, Hi.getValueType(), Hi);
1387
1
}
1388
1389
void DAGTypeLegalizer::ExpandFloatRes_FP_EXTEND(SDNode *N, SDValue &Lo,
1390
10
                                                SDValue &Hi) {
1391
10
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1392
10
  SDLoc dl(N);
1393
10
  Hi = DAG.getNode(ISD::FP_EXTEND, dl, NVT, N->getOperand(0));
1394
10
  Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1395
10
                                 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1396
10
}
1397
1398
void DAGTypeLegalizer::ExpandFloatRes_FPOW(SDNode *N,
1399
1
                                           SDValue &Lo, SDValue &Hi) {
1400
1
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1401
1
                                         RTLIB::POW_F32, RTLIB::POW_F64,
1402
1
                                         RTLIB::POW_F80, RTLIB::POW_F128,
1403
1
                                         RTLIB::POW_PPCF128),
1404
1
                            N, false);
1405
1
  GetPairElements(Call, Lo, Hi);
1406
1
}
1407
1408
void DAGTypeLegalizer::ExpandFloatRes_FPOWI(SDNode *N,
1409
0
                                            SDValue &Lo, SDValue &Hi) {
1410
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1411
0
                                         RTLIB::POWI_F32, RTLIB::POWI_F64,
1412
0
                                         RTLIB::POWI_F80, RTLIB::POWI_F128,
1413
0
                                         RTLIB::POWI_PPCF128),
1414
0
                            N, false);
1415
0
  GetPairElements(Call, Lo, Hi);
1416
0
}
1417
1418
void DAGTypeLegalizer::ExpandFloatRes_FREM(SDNode *N,
1419
1
                                           SDValue &Lo, SDValue &Hi) {
1420
1
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1421
1
                                         RTLIB::REM_F32, RTLIB::REM_F64,
1422
1
                                         RTLIB::REM_F80, RTLIB::REM_F128,
1423
1
                                         RTLIB::REM_PPCF128),
1424
1
                            N, false);
1425
1
  GetPairElements(Call, Lo, Hi);
1426
1
}
1427
1428
void DAGTypeLegalizer::ExpandFloatRes_FRINT(SDNode *N,
1429
0
                                            SDValue &Lo, SDValue &Hi) {
1430
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1431
0
                                         RTLIB::RINT_F32, RTLIB::RINT_F64,
1432
0
                                         RTLIB::RINT_F80, RTLIB::RINT_F128,
1433
0
                                         RTLIB::RINT_PPCF128),
1434
0
                            N, false);
1435
0
  GetPairElements(Call, Lo, Hi);
1436
0
}
1437
1438
void DAGTypeLegalizer::ExpandFloatRes_FROUND(SDNode *N,
1439
0
                                             SDValue &Lo, SDValue &Hi) {
1440
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1441
0
                                         RTLIB::ROUND_F32,
1442
0
                                         RTLIB::ROUND_F64,
1443
0
                                         RTLIB::ROUND_F80,
1444
0
                                         RTLIB::ROUND_F128,
1445
0
                                         RTLIB::ROUND_PPCF128),
1446
0
                            N, false);
1447
0
  GetPairElements(Call, Lo, Hi);
1448
0
}
1449
1450
void DAGTypeLegalizer::ExpandFloatRes_FSIN(SDNode *N,
1451
0
                                           SDValue &Lo, SDValue &Hi) {
1452
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1453
0
                                         RTLIB::SIN_F32, RTLIB::SIN_F64,
1454
0
                                         RTLIB::SIN_F80, RTLIB::SIN_F128,
1455
0
                                         RTLIB::SIN_PPCF128),
1456
0
                            N, false);
1457
0
  GetPairElements(Call, Lo, Hi);
1458
0
}
1459
1460
void DAGTypeLegalizer::ExpandFloatRes_FSQRT(SDNode *N,
1461
1
                                            SDValue &Lo, SDValue &Hi) {
1462
1
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1463
1
                                         RTLIB::SQRT_F32, RTLIB::SQRT_F64,
1464
1
                                         RTLIB::SQRT_F80, RTLIB::SQRT_F128,
1465
1
                                         RTLIB::SQRT_PPCF128),
1466
1
                            N, false);
1467
1
  GetPairElements(Call, Lo, Hi);
1468
1
}
1469
1470
void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo,
1471
8
                                           SDValue &Hi) {
1472
8
  SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1473
8
  SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1474
8
                                                   RTLIB::SUB_F32,
1475
8
                                                   RTLIB::SUB_F64,
1476
8
                                                   RTLIB::SUB_F80,
1477
8
                                                   RTLIB::SUB_F128,
1478
8
                                                   RTLIB::SUB_PPCF128),
1479
8
                                 N->getValueType(0), Ops, false,
1480
8
                                 SDLoc(N)).first;
1481
8
  GetPairElements(Call, Lo, Hi);
1482
8
}
1483
1484
void DAGTypeLegalizer::ExpandFloatRes_FTRUNC(SDNode *N,
1485
0
                                             SDValue &Lo, SDValue &Hi) {
1486
0
  SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1487
0
                                         RTLIB::TRUNC_F32, RTLIB::TRUNC_F64,
1488
0
                                         RTLIB::TRUNC_F80, RTLIB::TRUNC_F128,
1489
0
                                         RTLIB::TRUNC_PPCF128),
1490
0
                            N, false);
1491
0
  GetPairElements(Call, Lo, Hi);
1492
0
}
1493
1494
void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDValue &Lo,
1495
11
                                           SDValue &Hi) {
1496
11
  if (ISD::isNormalLoad(N)) {
1497
10
    ExpandRes_NormalLoad(N, Lo, Hi);
1498
10
    return;
1499
10
  }
1500
1
1501
1
  assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
1502
1
  LoadSDNode *LD = cast<LoadSDNode>(N);
1503
1
  SDValue Chain = LD->getChain();
1504
1
  SDValue Ptr = LD->getBasePtr();
1505
1
  SDLoc dl(N);
1506
1
1507
1
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
1508
1
  assert(NVT.isByteSized() && "Expanded type not byte sized!");
1509
1
  assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1510
1
1511
1
  Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr,
1512
1
                      LD->getMemoryVT(), LD->getMemOperand());
1513
1
1514
1
  // Remember the chain.
1515
1
  Chain = Hi.getValue(1);
1516
1
1517
1
  // The low part is zero.
1518
1
  Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1519
1
                                 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1520
1
1521
1
  // Modified the chain - switch anything that used the old chain to use the
1522
1
  // new one.
1523
1
  ReplaceValueWith(SDValue(LD, 1), Chain);
1524
1
}
1525
1526
void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
1527
7
                                                 SDValue &Hi) {
1528
7
  assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
1529
7
  EVT VT = N->getValueType(0);
1530
7
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1531
7
  SDValue Src = N->getOperand(0);
1532
7
  EVT SrcVT = Src.getValueType();
1533
7
  bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
1534
7
  SDLoc dl(N);
1535
7
1536
7
  // First do an SINT_TO_FP, whether the original was signed or unsigned.
1537
7
  // When promoting partial word types to i32 we must honor the signedness,
1538
7
  // though.
1539
7
  if (SrcVT.bitsLE(MVT::i32)) {
1540
2
    // The integer can be represented exactly in an f64.
1541
2
    Src = DAG.getNode(isSigned ? 
ISD::SIGN_EXTEND0
: ISD::ZERO_EXTEND, dl,
1542
2
                      MVT::i32, Src);
1543
2
    Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1544
2
                                   APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1545
2
    Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src);
1546
5
  } else {
1547
5
    RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1548
5
    if (SrcVT.bitsLE(MVT::i64)) {
1549
4
      Src = DAG.getNode(isSigned ? 
ISD::SIGN_EXTEND3
:
ISD::ZERO_EXTEND1
, dl,
1550
4
                        MVT::i64, Src);
1551
4
      LC = RTLIB::SINTTOFP_I64_PPCF128;
1552
4
    } else 
if (1
SrcVT.bitsLE(MVT::i128)1
) {
1553
1
      Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src);
1554
1
      LC = RTLIB::SINTTOFP_I128_PPCF128;
1555
1
    }
1556
5
    assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
1557
5
1558
5
    Hi = TLI.makeLibCall(DAG, LC, VT, Src, true, dl).first;
1559
5
    GetPairElements(Hi, Lo, Hi);
1560
5
  }
1561
7
1562
7
  if (isSigned)
1563
3
    return;
1564
4
1565
4
  // Unsigned - fix up the SINT_TO_FP value just calculated.
1566
4
  Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
1567
4
  SrcVT = Src.getValueType();
1568
4
1569
4
  // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
1570
4
  static const uint64_t TwoE32[]  = { 0x41f0000000000000LL, 0 };
1571
4
  static const uint64_t TwoE64[]  = { 0x43f0000000000000LL, 0 };
1572
4
  static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
1573
4
  ArrayRef<uint64_t> Parts;
1574
4
1575
4
  switch (SrcVT.getSimpleVT().SimpleTy) {
1576
4
  default:
1577
0
    llvm_unreachable("Unsupported UINT_TO_FP!");
1578
4
  case MVT::i32:
1579
2
    Parts = TwoE32;
1580
2
    break;
1581
4
  case MVT::i64:
1582
1
    Parts = TwoE64;
1583
1
    break;
1584
4
  case MVT::i128:
1585
1
    Parts = TwoE128;
1586
1
    break;
1587
4
  }
1588
4
1589
4
  // TODO: Are there fast-math-flags to propagate to this FADD?
1590
4
  Lo = DAG.getNode(ISD::FADD, dl, VT, Hi,
1591
4
                   DAG.getConstantFP(APFloat(APFloat::PPCDoubleDouble(),
1592
4
                                             APInt(128, Parts)),
1593
4
                                     dl, MVT::ppcf128));
1594
4
  Lo = DAG.getSelectCC(dl, Src, DAG.getConstant(0, dl, SrcVT),
1595
4
                       Lo, Hi, ISD::SETLT);
1596
4
  GetPairElements(Lo, Lo, Hi);
1597
4
}
1598
1599
1600
//===----------------------------------------------------------------------===//
1601
//  Float Operand Expansion
1602
//===----------------------------------------------------------------------===//
1603
1604
/// ExpandFloatOperand - This method is called when the specified operand of the
1605
/// specified node is found to need expansion.  At this point, all of the result
1606
/// types of the node are known to be legal, but other operands of the node may
1607
/// need promotion or expansion as well as the specified one.
1608
94
bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
1609
94
  LLVM_DEBUG(dbgs() << "Expand float operand: "; N->dump(&DAG); dbgs() << "\n");
1610
94
  SDValue Res = SDValue();
1611
94
1612
94
  // See if the target wants to custom expand this node.
1613
94
  if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1614
12
    return false;
1615
82
1616
82
  switch (N->getOpcode()) {
1617
82
  default:
1618
#ifndef NDEBUG
1619
    dbgs() << "ExpandFloatOperand Op #" << OpNo << ": ";
1620
    N->dump(&DAG); dbgs() << "\n";
1621
#endif
1622
0
    llvm_unreachable("Do not know how to expand this operator's operand!");
1623
82
1624
82
  
case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break4
;
1625
82
  
case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break0
;
1626
82
  
case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break20
;
1627
82
1628
82
  
case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break0
;
1629
82
  
case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break4
;
1630
82
  
case ISD::FP_ROUND: Res = ExpandFloatOp_FP_ROUND(N); break10
;
1631
82
  
case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break1
;
1632
82
  
case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break1
;
1633
82
  
case ISD::LROUND: Res = ExpandFloatOp_LROUND(N); break2
;
1634
82
  
case ISD::LLROUND: Res = ExpandFloatOp_LLROUND(N); break2
;
1635
82
  
case ISD::LRINT: Res = ExpandFloatOp_LRINT(N); break2
;
1636
82
  
case ISD::LLRINT: Res = ExpandFloatOp_LLRINT(N); break2
;
1637
82
  
case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break6
;
1638
82
  
case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break7
;
1639
82
  case ISD::STORE:      Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N),
1640
21
                                                  OpNo); break;
1641
82
  }
1642
82
1643
82
  // If the result is null, the sub-method took care of registering results etc.
1644
82
  if (!Res.getNode()) 
return false0
;
1645
82
1646
82
  // If the result is N, the sub-method updated N in place.  Tell the legalizer
1647
82
  // core about this.
1648
82
  if (Res.getNode() == N)
1649
6
    return true;
1650
76
1651
76
  assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1652
76
         "Invalid operand expansion");
1653
76
1654
76
  ReplaceValueWith(SDValue(N, 0), Res);
1655
76
  return false;
1656
76
}
1657
1658
/// FloatExpandSetCCOperands - Expand the operands of a comparison.  This code
1659
/// is shared among BR_CC, SELECT_CC, and SETCC handlers.
1660
void DAGTypeLegalizer::FloatExpandSetCCOperands(SDValue &NewLHS,
1661
                                                SDValue &NewRHS,
1662
                                                ISD::CondCode &CCCode,
1663
13
                                                const SDLoc &dl) {
1664
13
  SDValue LHSLo, LHSHi, RHSLo, RHSHi;
1665
13
  GetExpandedFloat(NewLHS, LHSLo, LHSHi);
1666
13
  GetExpandedFloat(NewRHS, RHSLo, RHSHi);
1667
13
1668
13
  assert(NewLHS.getValueType() == MVT::ppcf128 && "Unsupported setcc type!");
1669
13
1670
13
  // FIXME:  This generated code sucks.  We want to generate
1671
13
  //         FCMPU crN, hi1, hi2
1672
13
  //         BNE crN, L:
1673
13
  //         FCMPU crN, lo1, lo2
1674
13
  // The following can be improved, but not that much.
1675
13
  SDValue Tmp1, Tmp2, Tmp3;
1676
13
  Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1677
13
                      LHSHi, RHSHi, ISD::SETOEQ);
1678
13
  Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()),
1679
13
                      LHSLo, RHSLo, CCCode);
1680
13
  Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1681
13
  Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1682
13
                      LHSHi, RHSHi, ISD::SETUNE);
1683
13
  Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1684
13
                      LHSHi, RHSHi, CCCode);
1685
13
  Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1686
13
  NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3);
1687
13
  NewRHS = SDValue();   // LHS is the result, not a compare.
1688
13
}
1689
1690
0
SDValue DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
1691
0
  SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1692
0
  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1693
0
  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1694
0
1695
0
  // If ExpandSetCCOperands returned a scalar, we need to compare the result
1696
0
  // against zero to select between true and false values.
1697
0
  if (!NewRHS.getNode()) {
1698
0
    NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1699
0
    CCCode = ISD::SETNE;
1700
0
  }
1701
0
1702
0
  // Update N to have the operands specified.
1703
0
  return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1704
0
                                DAG.getCondCode(CCCode), NewLHS, NewRHS,
1705
0
                                N->getOperand(4)), 0);
1706
0
}
1707
1708
4
SDValue DAGTypeLegalizer::ExpandFloatOp_FCOPYSIGN(SDNode *N) {
1709
4
  assert(N->getOperand(1).getValueType() == MVT::ppcf128 &&
1710
4
         "Logic only correct for ppcf128!");
1711
4
  SDValue Lo, Hi;
1712
4
  GetExpandedFloat(N->getOperand(1), Lo, Hi);
1713
4
  // The ppcf128 value is providing only the sign; take it from the
1714
4
  // higher-order double (which must have the larger magnitude).
1715
4
  return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N),
1716
4
                     N->getValueType(0), N->getOperand(0), Hi);
1717
4
}
1718
1719
10
SDValue DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
1720
10
  assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1721
10
         "Logic only correct for ppcf128!");
1722
10
  SDValue Lo, Hi;
1723
10
  GetExpandedFloat(N->getOperand(0), Lo, Hi);
1724
10
  // Round it the rest of the way (e.g. to f32) if needed.
1725
10
  return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
1726
10
                     N->getValueType(0), Hi, N->getOperand(1));
1727
10
}
1728
1729
1
SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
1730
1
  EVT RVT = N->getValueType(0);
1731
1
  SDLoc dl(N);
1732
1
1733
1
  RTLIB::Libcall LC = RTLIB::getFPTOSINT(N->getOperand(0).getValueType(), RVT);
1734
1
  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!");
1735
1
  return TLI.makeLibCall(DAG, LC, RVT, N->getOperand(0), false, dl).first;
1736
1
}
1737
1738
1
SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
1739
1
  EVT RVT = N->getValueType(0);
1740
1
  SDLoc dl(N);
1741
1
1742
1
  RTLIB::Libcall LC = RTLIB::getFPTOUINT(N->getOperand(0).getValueType(), RVT);
1743
1
  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
1744
1
  return TLI.makeLibCall(DAG, LC, N->getValueType(0), N->getOperand(0),
1745
1
                         false, dl).first;
1746
1
}
1747
1748
6
SDValue DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
1749
6
  SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1750
6
  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1751
6
  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1752
6
1753
6
  // If ExpandSetCCOperands returned a scalar, we need to compare the result
1754
6
  // against zero to select between true and false values.
1755
6
  if (!NewRHS.getNode()) {
1756
6
    NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1757
6
    CCCode = ISD::SETNE;
1758
6
  }
1759
6
1760
6
  // Update N to have the operands specified.
1761
6
  return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1762
6
                                N->getOperand(2), N->getOperand(3),
1763
6
                                DAG.getCondCode(CCCode)), 0);
1764
6
}
1765
1766
7
SDValue DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
1767
7
  SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1768
7
  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1769
7
  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1770
7
1771
7
  // If ExpandSetCCOperands returned a scalar, use it.
1772
7
  if (!NewRHS.getNode()) {
1773
7
    assert(NewLHS.getValueType() == N->getValueType(0) &&
1774
7
           "Unexpected setcc expansion!");
1775
7
    return NewLHS;
1776
7
  }
1777
0
1778
0
  // Otherwise, update N to have the operands specified.
1779
0
  return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1780
0
                                DAG.getCondCode(CCCode)), 0);
1781
0
}
1782
1783
21
SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
1784
21
  if (ISD::isNormalStore(N))
1785
21
    return ExpandOp_NormalStore(N, OpNo);
1786
0
1787
0
  assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1788
0
  assert(OpNo == 1 && "Can only expand the stored value so far");
1789
0
  StoreSDNode *ST = cast<StoreSDNode>(N);
1790
0
1791
0
  SDValue Chain = ST->getChain();
1792
0
  SDValue Ptr = ST->getBasePtr();
1793
0
1794
0
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(),
1795
0
                                     ST->getValue().getValueType());
1796
0
  assert(NVT.isByteSized() && "Expanded type not byte sized!");
1797
0
  assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1798
0
  (void)NVT;
1799
0
1800
0
  SDValue Lo, Hi;
1801
0
  GetExpandedOp(ST->getValue(), Lo, Hi);
1802
0
1803
0
  return DAG.getTruncStore(Chain, SDLoc(N), Hi, Ptr,
1804
0
                           ST->getMemoryVT(), ST->getMemOperand());
1805
0
}
1806
1807
2
SDValue DAGTypeLegalizer::ExpandFloatOp_LROUND(SDNode *N) {
1808
2
  EVT RVT = N->getValueType(0);
1809
2
  EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1810
2
  return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1811
2
                                           RTLIB::LROUND_F32,
1812
2
                                           RTLIB::LROUND_F64,
1813
2
                                           RTLIB::LROUND_F80,
1814
2
                                           RTLIB::LROUND_F128,
1815
2
                                           RTLIB::LROUND_PPCF128),
1816
2
                         RVT, N->getOperand(0), false, SDLoc(N)).first;
1817
2
}
1818
1819
2
SDValue DAGTypeLegalizer::ExpandFloatOp_LLROUND(SDNode *N) {
1820
2
  EVT RVT = N->getValueType(0);
1821
2
  EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1822
2
  return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1823
2
                                           RTLIB::LLROUND_F32,
1824
2
                                           RTLIB::LLROUND_F64,
1825
2
                                           RTLIB::LLROUND_F80,
1826
2
                                           RTLIB::LLROUND_F128,
1827
2
                                           RTLIB::LLROUND_PPCF128),
1828
2
                         RVT, N->getOperand(0), false, SDLoc(N)).first;
1829
2
}
1830
1831
2
SDValue DAGTypeLegalizer::ExpandFloatOp_LRINT(SDNode *N) {
1832
2
  EVT RVT = N->getValueType(0);
1833
2
  EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1834
2
  return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1835
2
                                           RTLIB::LRINT_F32,
1836
2
                                           RTLIB::LRINT_F64,
1837
2
                                           RTLIB::LRINT_F80,
1838
2
                                           RTLIB::LRINT_F128,
1839
2
                                           RTLIB::LRINT_PPCF128),
1840
2
                         RVT, N->getOperand(0), false, SDLoc(N)).first;
1841
2
}
1842
1843
2
SDValue DAGTypeLegalizer::ExpandFloatOp_LLRINT(SDNode *N) {
1844
2
  EVT RVT = N->getValueType(0);
1845
2
  EVT RetVT = N->getOperand(0).getValueType().getSimpleVT().SimpleTy;
1846
2
  return TLI.makeLibCall(DAG, GetFPLibCall(RetVT,
1847
2
                                           RTLIB::LLRINT_F32,
1848
2
                                           RTLIB::LLRINT_F64,
1849
2
                                           RTLIB::LLRINT_F80,
1850
2
                                           RTLIB::LLRINT_F128,
1851
2
                                           RTLIB::LLRINT_PPCF128),
1852
2
                         RVT, N->getOperand(0), false, SDLoc(N)).first;
1853
2
}
1854
1855
//===----------------------------------------------------------------------===//
1856
//  Float Operand Promotion
1857
//===----------------------------------------------------------------------===//
1858
//
1859
1860
7.91k
static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT) {
1861
7.91k
  if (OpVT == MVT::f16) {
1862
5.20k
      return ISD::FP16_TO_FP;
1863
5.20k
  } else 
if (2.71k
RetVT == MVT::f162.71k
) {
1864
2.71k
      return ISD::FP_TO_FP16;
1865
2.71k
  }
1866
0
1867
0
  report_fatal_error("Attempt at an invalid promotion-related conversion");
1868
0
}
1869
1870
3.07k
bool DAGTypeLegalizer::PromoteFloatOperand(SDNode *N, unsigned OpNo) {
1871
3.07k
  LLVM_DEBUG(dbgs() << "Promote float operand " << OpNo << ": "; N->dump(&DAG);
1872
3.07k
             dbgs() << "\n");
1873
3.07k
  SDValue R = SDValue();
1874
3.07k
1875
3.07k
  if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) {
1876
33
    LLVM_DEBUG(dbgs() << "Node has been custom lowered, done\n");
1877
33
    return false;
1878
33
  }
1879
3.03k
1880
3.03k
  // Nodes that use a promotion-requiring floating point operand, but doesn't
1881
3.03k
  // produce a promotion-requiring floating point result, need to be legalized
1882
3.03k
  // to use the promoted float operand.  Nodes that produce at least one
1883
3.03k
  // promotion-requiring floating point result have their operands legalized as
1884
3.03k
  // a part of PromoteFloatResult.
1885
3.03k
  switch (N->getOpcode()) {
1886
3.03k
    default:
1887
  #ifndef NDEBUG
1888
      dbgs() << "PromoteFloatOperand Op #" << OpNo << ": ";
1889
      N->dump(&DAG); dbgs() << "\n";
1890
  #endif
1891
0
      llvm_unreachable("Do not know how to promote this operator's operand!");
1892
3.03k
1893
3.03k
    
case ISD::BITCAST: R = PromoteFloatOp_BITCAST(N, OpNo); break195
;
1894
3.03k
    
case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break16
;
1895
3.03k
    case ISD::FP_TO_SINT:
1896
92
    case ISD::FP_TO_UINT: R = PromoteFloatOp_FP_TO_XINT(N, OpNo); break;
1897
1.36k
    case ISD::FP_EXTEND:  R = PromoteFloatOp_FP_EXTEND(N, OpNo); break;
1898
92
    
case ISD::SELECT_CC: R = PromoteFloatOp_SELECT_CC(N, OpNo); break4
;
1899
334
    case ISD::SETCC:      R = PromoteFloatOp_SETCC(N, OpNo); break;
1900
1.03k
    case ISD::STORE:      R = PromoteFloatOp_STORE(N, OpNo); break;
1901
3.03k
  }
1902
3.03k
1903
3.03k
  if (R.getNode())
1904
3.03k
    ReplaceValueWith(SDValue(N, 0), R);
1905
3.03k
  return false;
1906
3.03k
}
1907
1908
195
SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo) {
1909
195
  SDValue Op = N->getOperand(0);
1910
195
  EVT OpVT = Op->getValueType(0);
1911
195
1912
195
  SDValue Promoted = GetPromotedFloat(N->getOperand(0));
1913
195
  EVT PromotedVT = Promoted->getValueType(0);
1914
195
1915
195
  // Convert the promoted float value to the desired IVT.
1916
195
  EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits());
1917
195
  SDValue Convert = DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N),
1918
195
                                IVT, Promoted);
1919
195
  // The final result type might not be an scalar so we need a bitcast. The
1920
195
  // bitcast will be further legalized if needed.
1921
195
  return DAG.getBitcast(N->getValueType(0), Convert);
1922
195
}
1923
1924
// Promote Operand 1 of FCOPYSIGN.  Operand 0 ought to be handled by
1925
// PromoteFloatRes_FCOPYSIGN.
1926
16
SDValue DAGTypeLegalizer::PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo) {
1927
16
  assert (OpNo == 1 && "Only Operand 1 must need promotion here");
1928
16
  SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1929
16
1930
16
  return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0),
1931
16
                     N->getOperand(0), Op1);
1932
16
}
1933
1934
// Convert the promoted float value to the desired integer type
1935
92
SDValue DAGTypeLegalizer::PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo) {
1936
92
  SDValue Op = GetPromotedFloat(N->getOperand(0));
1937
92
  return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), Op);
1938
92
}
1939
1940
1.36k
SDValue DAGTypeLegalizer::PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo) {
1941
1.36k
  SDValue Op = GetPromotedFloat(N->getOperand(0));
1942
1.36k
  EVT VT = N->getValueType(0);
1943
1.36k
1944
1.36k
  // Desired VT is same as promoted type.  Use promoted float directly.
1945
1.36k
  if (VT == Op->getValueType(0))
1946
1.04k
    return Op;
1947
316
1948
316
  // Else, extend the promoted float value to the desired VT.
1949
316
  return DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Op);
1950
316
}
1951
1952
// Promote the float operands used for comparison.  The true- and false-
1953
// operands have the same type as the result and are promoted, if needed, by
1954
// PromoteFloatRes_SELECT_CC
1955
4
SDValue DAGTypeLegalizer::PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo) {
1956
4
  SDValue LHS = GetPromotedFloat(N->getOperand(0));
1957
4
  SDValue RHS = GetPromotedFloat(N->getOperand(1));
1958
4
1959
4
  return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
1960
4
                     LHS, RHS, N->getOperand(2), N->getOperand(3),
1961
4
                     N->getOperand(4));
1962
4
}
1963
1964
// Construct a SETCC that compares the promoted values and sets the conditional
1965
// code.
1966
334
SDValue DAGTypeLegalizer::PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo) {
1967
334
  EVT VT = N->getValueType(0);
1968
334
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1969
334
  SDValue Op0 = GetPromotedFloat(N->getOperand(0));
1970
334
  SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1971
334
  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1972
334
1973
334
  return DAG.getSetCC(SDLoc(N), NVT, Op0, Op1, CCCode);
1974
334
1975
334
}
1976
1977
// Lower the promoted Float down to the integer value of same size and construct
1978
// a STORE of the integer value.
1979
1.03k
SDValue DAGTypeLegalizer::PromoteFloatOp_STORE(SDNode *N, unsigned OpNo) {
1980
1.03k
  StoreSDNode *ST = cast<StoreSDNode>(N);
1981
1.03k
  SDValue Val = ST->getValue();
1982
1.03k
  SDLoc DL(N);
1983
1.03k
1984
1.03k
  SDValue Promoted = GetPromotedFloat(Val);
1985
1.03k
  EVT VT = ST->getOperand(1).getValueType();
1986
1.03k
  EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
1987
1.03k
1988
1.03k
  SDValue NewVal;
1989
1.03k
  NewVal = DAG.getNode(GetPromotionOpcode(Promoted.getValueType(), VT), DL,
1990
1.03k
                       IVT, Promoted);
1991
1.03k
1992
1.03k
  return DAG.getStore(ST->getChain(), DL, NewVal, ST->getBasePtr(),
1993
1.03k
                      ST->getMemOperand());
1994
1.03k
}
1995
1996
//===----------------------------------------------------------------------===//
1997
//  Float Result Promotion
1998
//===----------------------------------------------------------------------===//
1999
2000
8.20k
void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
2001
8.20k
  LLVM_DEBUG(dbgs() << "Promote float result " << ResNo << ": "; N->dump(&DAG);
2002
8.20k
             dbgs() << "\n");
2003
8.20k
  SDValue R = SDValue();
2004
8.20k
2005
8.20k
  switch (N->getOpcode()) {
2006
8.20k
    // These opcodes cannot appear if promotion of FP16 is done in the backend
2007
8.20k
    // instead of Clang
2008
8.20k
    case ISD::FP16_TO_FP:
2009
0
    case ISD::FP_TO_FP16:
2010
0
    default:
2011
#ifndef NDEBUG
2012
      dbgs() << "PromoteFloatResult #" << ResNo << ": ";
2013
      N->dump(&DAG); dbgs() << "\n";
2014
#endif
2015
0
      llvm_unreachable("Do not know how to promote this operator's result!");
2016
0
2017
1.84k
    case ISD::BITCAST:    R = PromoteFloatRes_BITCAST(N); break;
2018
836
    case ISD::ConstantFP: R = PromoteFloatRes_ConstantFP(N); break;
2019
1.55k
    case ISD::EXTRACT_VECTOR_ELT:
2020
1.55k
                          R = PromoteFloatRes_EXTRACT_VECTOR_ELT(N); break;
2021
17
    case ISD::FCOPYSIGN:  R = PromoteFloatRes_FCOPYSIGN(N); break;
2022
0
2023
0
    // Unary FP Operations
2024
202
    case ISD::FABS:
2025
202
    case ISD::FCEIL:
2026
202
    case ISD::FCOS:
2027
202
    case ISD::FEXP:
2028
202
    case ISD::FEXP2:
2029
202
    case ISD::FFLOOR:
2030
202
    case ISD::FLOG:
2031
202
    case ISD::FLOG2:
2032
202
    case ISD::FLOG10:
2033
202
    case ISD::FNEARBYINT:
2034
202
    case ISD::FNEG:
2035
202
    case ISD::FRINT:
2036
202
    case ISD::FROUND:
2037
202
    case ISD::FSIN:
2038
202
    case ISD::FSQRT:
2039
202
    case ISD::FTRUNC:
2040
202
    case ISD::FCANONICALIZE: R = PromoteFloatRes_UnaryOp(N); break;
2041
202
2042
202
    // Binary FP Operations
2043
912
    case ISD::FADD:
2044
912
    case ISD::FDIV:
2045
912
    case ISD::FMAXIMUM:
2046
912
    case ISD::FMINIMUM:
2047
912
    case ISD::FMAXNUM:
2048
912
    case ISD::FMINNUM:
2049
912
    case ISD::FMUL:
2050
912
    case ISD::FPOW:
2051
912
    case ISD::FREM:
2052
912
    case ISD::FSUB:       R = PromoteFloatRes_BinOp(N); break;
2053
912
2054
912
    case ISD::FMA:        // FMA is same as FMAD
2055
15
    case ISD::FMAD:       R = PromoteFloatRes_FMAD(N); break;
2056
15
2057
15
    
case ISD::FPOWI: R = PromoteFloatRes_FPOWI(N); break3
;
2058
15
2059
1.48k
    case ISD::FP_ROUND:   R = PromoteFloatRes_FP_ROUND(N); break;
2060
999
    case ISD::LOAD:       R = PromoteFloatRes_LOAD(N); break;
2061
214
    case ISD::SELECT:     R = PromoteFloatRes_SELECT(N); break;
2062
15
    
case ISD::SELECT_CC: R = PromoteFloatRes_SELECT_CC(N); break4
;
2063
15
2064
85
    case ISD::SINT_TO_FP:
2065
85
    case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break;
2066
85
    
case ISD::UNDEF: R = PromoteFloatRes_UNDEF(N); break34
;
2067
85
    
case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break2
;
2068
8.20k
  }
2069
8.20k
2070
8.20k
  if (R.getNode())
2071
6.69k
    SetPromotedFloat(SDValue(N, ResNo), R);
2072
8.20k
}
2073
2074
// Bitcast from i16 to f16:  convert the i16 to a f32 value instead.
2075
// At this point, it is not possible to determine if the bitcast value is
2076
// eventually stored to memory or promoted to f32 or promoted to a floating
2077
// point at a higher precision.  Some of these cases are handled by FP_EXTEND,
2078
// STORE promotion handlers.
2079
1.84k
SDValue DAGTypeLegalizer::PromoteFloatRes_BITCAST(SDNode *N) {
2080
1.84k
  EVT VT = N->getValueType(0);
2081
1.84k
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2082
1.84k
  // Input type isn't guaranteed to be a scalar int so bitcast if not. The
2083
1.84k
  // bitcast will be legalized further if necessary.
2084
1.84k
  EVT IVT = EVT::getIntegerVT(*DAG.getContext(),
2085
1.84k
                              N->getOperand(0).getValueType().getSizeInBits());
2086
1.84k
  SDValue Cast = DAG.getBitcast(IVT, N->getOperand(0));
2087
1.84k
  return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, Cast);
2088
1.84k
}
2089
2090
836
SDValue DAGTypeLegalizer::PromoteFloatRes_ConstantFP(SDNode *N) {
2091
836
  ConstantFPSDNode *CFPNode = cast<ConstantFPSDNode>(N);
2092
836
  EVT VT = N->getValueType(0);
2093
836
  SDLoc DL(N);
2094
836
2095
836
  // Get the (bit-cast) APInt of the APFloat and build an integer constant
2096
836
  EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2097
836
  SDValue C = DAG.getConstant(CFPNode->getValueAPF().bitcastToAPInt(), DL,
2098
836
                              IVT);
2099
836
2100
836
  // Convert the Constant to the desired FP type
2101
836
  // FIXME We might be able to do the conversion during compilation and get rid
2102
836
  // of it from the object code
2103
836
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2104
836
  return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, C);
2105
836
}
2106
2107
// If the Index operand is a constant, try to redirect the extract operation to
2108
// the correct legalized vector.  If not, bit-convert the input vector to
2109
// equivalent integer vector.  Extract the element as an (bit-cast) integer
2110
// value and convert it to the promoted type.
2111
1.55k
SDValue DAGTypeLegalizer::PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
2112
1.55k
  SDLoc DL(N);
2113
1.55k
2114
1.55k
  // If the index is constant, try to extract the value from the legalized
2115
1.55k
  // vector type.
2116
1.55k
  if (isa<ConstantSDNode>(N->getOperand(1))) {
2117
1.54k
    SDValue Vec = N->getOperand(0);
2118
1.54k
    SDValue Idx = N->getOperand(1);
2119
1.54k
    EVT VecVT = Vec->getValueType(0);
2120
1.54k
    EVT EltVT = VecVT.getVectorElementType();
2121
1.54k
2122
1.54k
    uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
2123
1.54k
2124
1.54k
    switch (getTypeAction(VecVT)) {
2125
1.54k
    
default: break32
;
2126
1.54k
    case TargetLowering::TypeScalarizeVector: {
2127
536
      SDValue Res = GetScalarizedVector(N->getOperand(0));
2128
536
      ReplaceValueWith(SDValue(N, 0), Res);
2129
536
      return SDValue();
2130
1.54k
    }
2131
1.54k
    case TargetLowering::TypeWidenVector: {
2132
35
      Vec = GetWidenedVector(Vec);
2133
35
      SDValue Res = DAG.getNode(N->getOpcode(), DL, EltVT, Vec, Idx);
2134
35
      ReplaceValueWith(SDValue(N, 0), Res);
2135
35
      return SDValue();
2136
1.54k
    }
2137
1.54k
    case TargetLowering::TypeSplitVector: {
2138
944
      SDValue Lo, Hi;
2139
944
      GetSplitVector(Vec, Lo, Hi);
2140
944
2141
944
      uint64_t LoElts = Lo.getValueType().getVectorNumElements();
2142
944
      SDValue Res;
2143
944
      if (IdxVal < LoElts)
2144
483
        Res = DAG.getNode(N->getOpcode(), DL, EltVT, Lo, Idx);
2145
461
      else
2146
461
        Res = DAG.getNode(N->getOpcode(), DL, EltVT, Hi,
2147
461
                          DAG.getConstant(IdxVal - LoElts, DL,
2148
461
                                          Idx.getValueType()));
2149
944
      ReplaceValueWith(SDValue(N, 0), Res);
2150
944
      return SDValue();
2151
39
    }
2152
39
2153
39
    }
2154
39
  }
2155
39
2156
39
  // Bit-convert the input vector to the equivalent integer vector
2157
39
  SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
2158
39
  EVT IVT = NewOp.getValueType().getVectorElementType();
2159
39
2160
39
  // Extract the element as an (bit-cast) integer value
2161
39
  SDValue NewVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IVT,
2162
39
                               NewOp, N->getOperand(1));
2163
39
2164
39
  // Convert the element to the desired FP type
2165
39
  EVT VT = N->getValueType(0);
2166
39
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2167
39
  return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, NewVal);
2168
39
}
2169
2170
// FCOPYSIGN(X, Y) returns the value of X with the sign of Y.  If the result
2171
// needs promotion, so does the argument X.  Note that Y, if needed, will be
2172
// handled during operand promotion.
2173
17
SDValue DAGTypeLegalizer::PromoteFloatRes_FCOPYSIGN(SDNode *N) {
2174
17
  EVT VT = N->getValueType(0);
2175
17
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2176
17
  SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2177
17
2178
17
  SDValue Op1 = N->getOperand(1);
2179
17
2180
17
  return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2181
17
}
2182
2183
// Unary operation where the result and the operand have PromoteFloat type
2184
// action.  Construct a new SDNode with the promoted float value of the old
2185
// operand.
2186
202
SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryOp(SDNode *N) {
2187
202
  EVT VT = N->getValueType(0);
2188
202
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2189
202
  SDValue Op = GetPromotedFloat(N->getOperand(0));
2190
202
2191
202
  return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op);
2192
202
}
2193
2194
// Binary operations where the result and both operands have PromoteFloat type
2195
// action.  Construct a new SDNode with the promoted float values of the old
2196
// operands.
2197
912
SDValue DAGTypeLegalizer::PromoteFloatRes_BinOp(SDNode *N) {
2198
912
  EVT VT = N->getValueType(0);
2199
912
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2200
912
  SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2201
912
  SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2202
912
  return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, N->getFlags());
2203
912
}
2204
2205
15
SDValue DAGTypeLegalizer::PromoteFloatRes_FMAD(SDNode *N) {
2206
15
  EVT VT = N->getValueType(0);
2207
15
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2208
15
  SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2209
15
  SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2210
15
  SDValue Op2 = GetPromotedFloat(N->getOperand(2));
2211
15
2212
15
  return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, Op2);
2213
15
}
2214
2215
// Promote the Float (first) operand and retain the Integer (second) operand
2216
3
SDValue DAGTypeLegalizer::PromoteFloatRes_FPOWI(SDNode *N) {
2217
3
  EVT VT = N->getValueType(0);
2218
3
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2219
3
  SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2220
3
  SDValue Op1 = N->getOperand(1);
2221
3
2222
3
  return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2223
3
}
2224
2225
// Explicit operation to reduce precision.  Reduce the value to half precision
2226
// and promote it back to the legal type.
2227
1.48k
SDValue DAGTypeLegalizer::PromoteFloatRes_FP_ROUND(SDNode *N) {
2228
1.48k
  SDLoc DL(N);
2229
1.48k
2230
1.48k
  SDValue Op = N->getOperand(0);
2231
1.48k
  EVT VT = N->getValueType(0);
2232
1.48k
  EVT OpVT = Op->getValueType(0);
2233
1.48k
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2234
1.48k
  EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2235
1.48k
2236
1.48k
  // Round promoted float to desired precision
2237
1.48k
  SDValue Round = DAG.getNode(GetPromotionOpcode(OpVT, VT), DL, IVT, Op);
2238
1.48k
  // Promote it back to the legal output type
2239
1.48k
  return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, Round);
2240
1.48k
}
2241
2242
999
SDValue DAGTypeLegalizer::PromoteFloatRes_LOAD(SDNode *N) {
2243
999
  LoadSDNode *L = cast<LoadSDNode>(N);
2244
999
  EVT VT = N->getValueType(0);
2245
999
2246
999
  // Load the value as an integer value with the same number of bits.
2247
999
  EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2248
999
  SDValue newL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), IVT,
2249
999
                             SDLoc(N), L->getChain(), L->getBasePtr(),
2250
999
                             L->getOffset(), L->getPointerInfo(), IVT,
2251
999
                             L->getAlignment(),
2252
999
                             L->getMemOperand()->getFlags(),
2253
999
                             L->getAAInfo());
2254
999
  // Legalize the chain result by replacing uses of the old value chain with the
2255
999
  // new one
2256
999
  ReplaceValueWith(SDValue(N, 1), newL.getValue(1));
2257
999
2258
999
  // Convert the integer value to the desired FP type
2259
999
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2260
999
  return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, newL);
2261
999
}
2262
2263
// Construct a new SELECT node with the promoted true- and false- values.
2264
214
SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT(SDNode *N) {
2265
214
  SDValue TrueVal = GetPromotedFloat(N->getOperand(1));
2266
214
  SDValue FalseVal = GetPromotedFloat(N->getOperand(2));
2267
214
2268
214
  return DAG.getNode(ISD::SELECT, SDLoc(N), TrueVal->getValueType(0),
2269
214
                     N->getOperand(0), TrueVal, FalseVal);
2270
214
}
2271
2272
// Construct a new SELECT_CC node with the promoted true- and false- values.
2273
// The operands used for comparison are promoted by PromoteFloatOp_SELECT_CC.
2274
4
SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT_CC(SDNode *N) {
2275
4
  SDValue TrueVal = GetPromotedFloat(N->getOperand(2));
2276
4
  SDValue FalseVal = GetPromotedFloat(N->getOperand(3));
2277
4
2278
4
  return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
2279
4
                     TrueVal.getNode()->getValueType(0), N->getOperand(0),
2280
4
                     N->getOperand(1), TrueVal, FalseVal, N->getOperand(4));
2281
4
}
2282
2283
// Construct a SDNode that transforms the SINT or UINT operand to the promoted
2284
// float type.
2285
85
SDValue DAGTypeLegalizer::PromoteFloatRes_XINT_TO_FP(SDNode *N) {
2286
85
  SDLoc DL(N);
2287
85
  EVT VT = N->getValueType(0);
2288
85
  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2289
85
  SDValue NV = DAG.getNode(N->getOpcode(), DL, NVT, N->getOperand(0));
2290
85
  // Round the value to the desired precision (that of the source type).
2291
85
  return DAG.getNode(
2292
85
      ISD::FP_EXTEND, DL, NVT,
2293
85
      DAG.getNode(ISD::FP_ROUND, DL, VT, NV, DAG.getIntPtrConstant(0, DL)));
2294
85
}
2295
2296
34
SDValue DAGTypeLegalizer::PromoteFloatRes_UNDEF(SDNode *N) {
2297
34
  return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
2298
34
                                               N->getValueType(0)));
2299
34
}
2300
2301
2
SDValue DAGTypeLegalizer::BitcastToInt_ATOMIC_SWAP(SDNode *N) {
2302
2
  EVT VT = N->getValueType(0);
2303
2
  EVT NFPVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2304
2
2305
2
  AtomicSDNode *AM = cast<AtomicSDNode>(N);
2306
2
  SDLoc SL(N);
2307
2
2308
2
  SDValue CastVal = BitConvertToInteger(AM->getVal());
2309
2
  EVT CastVT = CastVal.getValueType();
2310
2
2311
2
  SDValue NewAtomic
2312
2
    = DAG.getAtomic(ISD::ATOMIC_SWAP, SL, CastVT,
2313
2
                    DAG.getVTList(CastVT, MVT::Other),
2314
2
                    { AM->getChain(), AM->getBasePtr(), CastVal },
2315
2
                    AM->getMemOperand());
2316
2
2317
2
  SDValue ResultCast = DAG.getNode(GetPromotionOpcode(VT, NFPVT), SL, NFPVT,
2318
2
                                   NewAtomic);
2319
2
  // Legalize the chain result by replacing uses of the old value chain with the
2320
2
  // new one
2321
2
  ReplaceValueWith(SDValue(N, 1), NewAtomic.getValue(1));
2322
2
2323
2
  return ResultCast;
2324
2
2325
2
}
2326