Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/StackMaps.cpp
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//===- StackMaps.cpp ------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
9
#include "llvm/CodeGen/StackMaps.h"
10
#include "llvm/ADT/DenseMapInfo.h"
11
#include "llvm/ADT/STLExtras.h"
12
#include "llvm/ADT/Twine.h"
13
#include "llvm/CodeGen/AsmPrinter.h"
14
#include "llvm/CodeGen/MachineFrameInfo.h"
15
#include "llvm/CodeGen/MachineFunction.h"
16
#include "llvm/CodeGen/MachineInstr.h"
17
#include "llvm/CodeGen/MachineOperand.h"
18
#include "llvm/CodeGen/TargetOpcodes.h"
19
#include "llvm/CodeGen/TargetRegisterInfo.h"
20
#include "llvm/CodeGen/TargetSubtargetInfo.h"
21
#include "llvm/IR/DataLayout.h"
22
#include "llvm/MC/MCContext.h"
23
#include "llvm/MC/MCExpr.h"
24
#include "llvm/MC/MCObjectFileInfo.h"
25
#include "llvm/MC/MCRegisterInfo.h"
26
#include "llvm/MC/MCStreamer.h"
27
#include "llvm/Support/CommandLine.h"
28
#include "llvm/Support/Debug.h"
29
#include "llvm/Support/ErrorHandling.h"
30
#include "llvm/Support/MathExtras.h"
31
#include "llvm/Support/raw_ostream.h"
32
#include <algorithm>
33
#include <cassert>
34
#include <cstdint>
35
#include <iterator>
36
#include <utility>
37
38
using namespace llvm;
39
40
#define DEBUG_TYPE "stackmaps"
41
42
static cl::opt<int> StackMapVersion(
43
    "stackmap-version", cl::init(3), cl::Hidden,
44
    cl::desc("Specify the stackmap encoding version (default = 3)"));
45
46
const char *StackMaps::WSMP = "Stack Maps: ";
47
48
StackMapOpers::StackMapOpers(const MachineInstr *MI)
49
277
  : MI(MI) {
50
277
  assert(getVarIdx() <= MI->getNumOperands() &&
51
277
         "invalid stackmap definition");
52
277
}
53
54
PatchPointOpers::PatchPointOpers(const MachineInstr *MI)
55
    : MI(MI), HasDef(MI->getOperand(0).isReg() && MI->getOperand(0).isDef() &&
56
759
                     !MI->getOperand(0).isImplicit()) {
57
#ifndef NDEBUG
58
  unsigned CheckStartIdx = 0, e = MI->getNumOperands();
59
  while (CheckStartIdx < e && MI->getOperand(CheckStartIdx).isReg() &&
60
         MI->getOperand(CheckStartIdx).isDef() &&
61
         !MI->getOperand(CheckStartIdx).isImplicit())
62
    ++CheckStartIdx;
63
64
  assert(getMetaIdx() == CheckStartIdx &&
65
         "Unexpected additional definition in Patchpoint intrinsic.");
66
#endif
67
}
68
69
152
unsigned PatchPointOpers::getNextScratchIdx(unsigned StartIdx) const {
70
152
  if (!StartIdx)
71
137
    StartIdx = getVarIdx();
72
152
73
152
  // Find the next scratch register (implicit def and early clobber)
74
152
  unsigned ScratchIdx = StartIdx, e = MI->getNumOperands();
75
719
  while (ScratchIdx < e &&
76
719
         !(MI->getOperand(ScratchIdx).isReg() &&
77
719
           
MI->getOperand(ScratchIdx).isDef()244
&&
78
719
           
MI->getOperand(ScratchIdx).isImplicit()152
&&
79
719
           
MI->getOperand(ScratchIdx).isEarlyClobber()152
))
80
567
    ++ScratchIdx;
81
152
82
152
  assert(ScratchIdx != e && "No scratch register available");
83
152
  return ScratchIdx;
84
152
}
85
86
23.8k
StackMaps::StackMaps(AsmPrinter &AP) : AP(AP) {
87
23.8k
  if (StackMapVersion != 3)
88
23.8k
    
llvm_unreachable0
("Unsupported stackmap version!");
89
23.8k
}
90
91
/// Go up the super-register chain until we hit a valid dwarf register number.
92
2.27k
static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) {
93
2.27k
  int RegNum = TRI->getDwarfRegNum(Reg, false);
94
3.75k
  for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && 
RegNum < 02.19k
;
++SR1.48k
)
95
1.48k
    RegNum = TRI->getDwarfRegNum(*SR, false);
96
2.27k
97
2.27k
  assert(RegNum >= 0 && "Invalid Dwarf register number.");
98
2.27k
  return (unsigned)RegNum;
99
2.27k
}
100
101
MachineInstr::const_mop_iterator
102
StackMaps::parseOperand(MachineInstr::const_mop_iterator MOI,
103
                        MachineInstr::const_mop_iterator MOE, LocationVec &Locs,
104
3.13k
                        LiveOutVec &LiveOuts) const {
105
3.13k
  const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo();
106
3.13k
  if (MOI->isImm()) {
107
825
    switch (MOI->getImm()) {
108
825
    default:
109
0
      llvm_unreachable("Unrecognized operand type.");
110
825
    case StackMaps::DirectMemRefOp: {
111
33
      auto &DL = AP.MF->getDataLayout();
112
33
113
33
      unsigned Size = DL.getPointerSizeInBits();
114
33
      assert((Size % 8) == 0 && "Need pointer size in bytes.");
115
33
      Size /= 8;
116
33
      unsigned Reg = (++MOI)->getReg();
117
33
      int64_t Imm = (++MOI)->getImm();
118
33
      Locs.emplace_back(StackMaps::Location::Direct, Size,
119
33
                        getDwarfRegNum(Reg, TRI), Imm);
120
33
      break;
121
825
    }
122
825
    case StackMaps::IndirectMemRefOp: {
123
378
      int64_t Size = (++MOI)->getImm();
124
378
      assert(Size > 0 && "Need a valid size for indirect memory locations.");
125
378
      unsigned Reg = (++MOI)->getReg();
126
378
      int64_t Imm = (++MOI)->getImm();
127
378
      Locs.emplace_back(StackMaps::Location::Indirect, Size,
128
378
                        getDwarfRegNum(Reg, TRI), Imm);
129
378
      break;
130
825
    }
131
825
    case StackMaps::ConstantOp: {
132
414
      ++MOI;
133
414
      assert(MOI->isImm() && "Expected constant operand.");
134
414
      int64_t Imm = MOI->getImm();
135
414
      Locs.emplace_back(Location::Constant, sizeof(int64_t), 0, Imm);
136
414
      break;
137
825
    }
138
825
    }
139
825
    return ++MOI;
140
825
  }
141
2.31k
142
2.31k
  // The physical register number will ultimately be encoded as a DWARF regno.
143
2.31k
  // The stack map also records the size of a spill slot that can hold the
144
2.31k
  // register content. (The runtime can track the actual size of the data type
145
2.31k
  // if it needs to.)
146
2.31k
  if (MOI->isReg()) {
147
1.85k
    // Skip implicit registers (this includes our scratch registers)
148
1.85k
    if (MOI->isImplicit())
149
1.17k
      return ++MOI;
150
679
151
679
    assert(TargetRegisterInfo::isPhysicalRegister(MOI->getReg()) &&
152
679
           "Virtreg operands should have been rewritten before now.");
153
679
    const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(MOI->getReg());
154
679
    assert(!MOI->getSubReg() && "Physical subreg still around.");
155
679
156
679
    unsigned Offset = 0;
157
679
    unsigned DwarfRegNum = getDwarfRegNum(MOI->getReg(), TRI);
158
679
    unsigned LLVMRegNum = TRI->getLLVMRegNum(DwarfRegNum, false);
159
679
    unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNum, MOI->getReg());
160
679
    if (SubRegIdx)
161
55
      Offset = TRI->getSubRegIdxOffset(SubRegIdx);
162
679
163
679
    Locs.emplace_back(Location::Register, TRI->getSpillSize(*RC),
164
679
                      DwarfRegNum, Offset);
165
679
    return ++MOI;
166
679
  }
167
454
168
454
  if (MOI->isRegLiveOut())
169
181
    LiveOuts = parseRegisterLiveOutMask(MOI->getRegLiveOut());
170
454
171
454
  return ++MOI;
172
454
}
173
174
0
void StackMaps::print(raw_ostream &OS) {
175
0
  const TargetRegisterInfo *TRI =
176
0
      AP.MF ? AP.MF->getSubtarget().getRegisterInfo() : nullptr;
177
0
  OS << WSMP << "callsites:\n";
178
0
  for (const auto &CSI : CSInfos) {
179
0
    const LocationVec &CSLocs = CSI.Locations;
180
0
    const LiveOutVec &LiveOuts = CSI.LiveOuts;
181
0
182
0
    OS << WSMP << "callsite " << CSI.ID << "\n";
183
0
    OS << WSMP << "  has " << CSLocs.size() << " locations\n";
184
0
185
0
    unsigned Idx = 0;
186
0
    for (const auto &Loc : CSLocs) {
187
0
      OS << WSMP << "\t\tLoc " << Idx << ": ";
188
0
      switch (Loc.Type) {
189
0
      case Location::Unprocessed:
190
0
        OS << "<Unprocessed operand>";
191
0
        break;
192
0
      case Location::Register:
193
0
        OS << "Register ";
194
0
        if (TRI)
195
0
          OS << printReg(Loc.Reg, TRI);
196
0
        else
197
0
          OS << Loc.Reg;
198
0
        break;
199
0
      case Location::Direct:
200
0
        OS << "Direct ";
201
0
        if (TRI)
202
0
          OS << printReg(Loc.Reg, TRI);
203
0
        else
204
0
          OS << Loc.Reg;
205
0
        if (Loc.Offset)
206
0
          OS << " + " << Loc.Offset;
207
0
        break;
208
0
      case Location::Indirect:
209
0
        OS << "Indirect ";
210
0
        if (TRI)
211
0
          OS << printReg(Loc.Reg, TRI);
212
0
        else
213
0
          OS << Loc.Reg;
214
0
        OS << "+" << Loc.Offset;
215
0
        break;
216
0
      case Location::Constant:
217
0
        OS << "Constant " << Loc.Offset;
218
0
        break;
219
0
      case Location::ConstantIndex:
220
0
        OS << "Constant Index " << Loc.Offset;
221
0
        break;
222
0
      }
223
0
      OS << "\t[encoding: .byte " << Loc.Type << ", .byte 0"
224
0
         << ", .short " << Loc.Size << ", .short " << Loc.Reg << ", .short 0"
225
0
         << ", .int " << Loc.Offset << "]\n";
226
0
      Idx++;
227
0
    }
228
0
229
0
    OS << WSMP << "\thas " << LiveOuts.size() << " live-out registers\n";
230
0
231
0
    Idx = 0;
232
0
    for (const auto &LO : LiveOuts) {
233
0
      OS << WSMP << "\t\tLO " << Idx << ": ";
234
0
      if (TRI)
235
0
        OS << printReg(LO.Reg, TRI);
236
0
      else
237
0
        OS << LO.Reg;
238
0
      OS << "\t[encoding: .short " << LO.DwarfRegNum << ", .byte 0, .byte "
239
0
         << LO.Size << "]\n";
240
0
      Idx++;
241
0
    }
242
0
  }
243
0
}
244
245
/// Create a live-out register record for the given register Reg.
246
StackMaps::LiveOutReg
247
1.18k
StackMaps::createLiveOutReg(unsigned Reg, const TargetRegisterInfo *TRI) const {
248
1.18k
  unsigned DwarfRegNum = getDwarfRegNum(Reg, TRI);
249
1.18k
  unsigned Size = TRI->getSpillSize(*TRI->getMinimalPhysRegClass(Reg));
250
1.18k
  return LiveOutReg(Reg, DwarfRegNum, Size);
251
1.18k
}
252
253
/// Parse the register live-out mask and return a vector of live-out registers
254
/// that need to be recorded in the stackmap.
255
StackMaps::LiveOutVec
256
181
StackMaps::parseRegisterLiveOutMask(const uint32_t *Mask) const {
257
181
  assert(Mask && "No register mask specified");
258
181
  const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo();
259
181
  LiveOutVec LiveOuts;
260
181
261
181
  // Create a LiveOutReg for each bit that is set in the register mask.
262
67.5k
  for (unsigned Reg = 0, NumRegs = TRI->getNumRegs(); Reg != NumRegs; 
++Reg67.3k
)
263
67.3k
    if ((Mask[Reg / 32] >> Reg % 32) & 1)
264
1.18k
      LiveOuts.push_back(createLiveOutReg(Reg, TRI));
265
181
266
181
  // We don't need to keep track of a register if its super-register is already
267
181
  // in the list. Merge entries that refer to the same dwarf register and use
268
181
  // the maximum size that needs to be spilled.
269
181
270
1.76k
  llvm::sort(LiveOuts, [](const LiveOutReg &LHS, const LiveOutReg &RHS) {
271
1.76k
    // Only sort by the dwarf register number.
272
1.76k
    return LHS.DwarfRegNum < RHS.DwarfRegNum;
273
1.76k
  });
274
181
275
1.02k
  for (auto I = LiveOuts.begin(), E = LiveOuts.end(); I != E; 
++I841
) {
276
2.21k
    for (auto II = std::next(I); II != E; 
++II1.36k
) {
277
1.63k
      if (I->DwarfRegNum != II->DwarfRegNum) {
278
267
        // Skip all the now invalid entries.
279
267
        I = --II;
280
267
        break;
281
267
      }
282
1.36k
      I->Size = std::max(I->Size, II->Size);
283
1.36k
      if (TRI->isSuperRegister(I->Reg, II->Reg))
284
243
        I->Reg = II->Reg;
285
1.36k
      II->Reg = 0; // mark for deletion.
286
1.36k
    }
287
841
  }
288
181
289
181
  LiveOuts.erase(
290
181
      llvm::remove_if(LiveOuts,
291
1.18k
                      [](const LiveOutReg &LO) { return LO.Reg == 0; }),
292
181
      LiveOuts.end());
293
181
294
181
  return LiveOuts;
295
181
}
296
297
void StackMaps::recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
298
                                    MachineInstr::const_mop_iterator MOI,
299
                                    MachineInstr::const_mop_iterator MOE,
300
433
                                    bool recordResult) {
301
433
  MCContext &OutContext = AP.OutStreamer->getContext();
302
433
  MCSymbol *MILabel = OutContext.createTempSymbol();
303
433
  AP.OutStreamer->EmitLabel(MILabel);
304
433
305
433
  LocationVec Locations;
306
433
  LiveOutVec LiveOuts;
307
433
308
433
  if (recordResult) {
309
47
    assert(PatchPointOpers(&MI).hasDef() && "Stackmap has no return value.");
310
47
    parseOperand(MI.operands_begin(), std::next(MI.operands_begin()), Locations,
311
47
                 LiveOuts);
312
47
  }
313
433
314
433
  // Parse operands.
315
3.52k
  while (MOI != MOE) {
316
3.08k
    MOI = parseOperand(MOI, MOE, Locations, LiveOuts);
317
3.08k
  }
318
433
319
433
  // Move large constants into the constant pool.
320
1.50k
  for (auto &Loc : Locations) {
321
1.50k
    // Constants are encoded as sign-extended integers.
322
1.50k
    // -1 is directly encoded as .long 0xFFFFFFFF with no constant pool.
323
1.50k
    if (Loc.Type == Location::Constant && 
!isInt<32>(Loc.Offset)414
) {
324
20
      Loc.Type = Location::ConstantIndex;
325
20
      // ConstPool is intentionally a MapVector of 'uint64_t's (as
326
20
      // opposed to 'int64_t's).  We should never be in a situation
327
20
      // where we have to insert either the tombstone or the empty
328
20
      // keys into a map, and for a DenseMap<uint64_t, T> these are
329
20
      // (uint64_t)0 and (uint64_t)-1.  They can be and are
330
20
      // represented using 32 bit integers.
331
20
      assert((uint64_t)Loc.Offset != DenseMapInfo<uint64_t>::getEmptyKey() &&
332
20
             (uint64_t)Loc.Offset !=
333
20
                 DenseMapInfo<uint64_t>::getTombstoneKey() &&
334
20
             "empty and tombstone keys should fit in 32 bits!");
335
20
      auto Result = ConstPool.insert(std::make_pair(Loc.Offset, Loc.Offset));
336
20
      Loc.Offset = Result.first - ConstPool.begin();
337
20
    }
338
1.50k
  }
339
433
340
433
  // Create an expression to calculate the offset of the callsite from function
341
433
  // entry.
342
433
  const MCExpr *CSOffsetExpr = MCBinaryExpr::createSub(
343
433
      MCSymbolRefExpr::create(MILabel, OutContext),
344
433
      MCSymbolRefExpr::create(AP.CurrentFnSymForSize, OutContext), OutContext);
345
433
346
433
  CSInfos.emplace_back(CSOffsetExpr, ID, std::move(Locations),
347
433
                       std::move(LiveOuts));
348
433
349
433
  // Record the stack size of the current function and update callsite count.
350
433
  const MachineFrameInfo &MFI = AP.MF->getFrameInfo();
351
433
  const TargetRegisterInfo *RegInfo = AP.MF->getSubtarget().getRegisterInfo();
352
433
  bool HasDynamicFrameSize =
353
433
      MFI.hasVarSizedObjects() || 
RegInfo->needsStackRealignment(*(AP.MF))432
;
354
433
  uint64_t FrameSize = HasDynamicFrameSize ? UINT64_MAX : 
MFI.getStackSize()426
;
355
433
356
433
  auto CurrentIt = FnInfos.find(AP.CurrentFnSym);
357
433
  if (CurrentIt != FnInfos.end())
358
152
    CurrentIt->second.RecordCount++;
359
281
  else
360
281
    FnInfos.insert(std::make_pair(AP.CurrentFnSym, FunctionInfo(FrameSize)));
361
433
}
362
363
160
void StackMaps::recordStackMap(const MachineInstr &MI) {
364
160
  assert(MI.getOpcode() == TargetOpcode::STACKMAP && "expected stackmap");
365
160
366
160
  StackMapOpers opers(&MI);
367
160
  const int64_t ID = MI.getOperand(PatchPointOpers::IDPos).getImm();
368
160
  recordStackMapOpers(MI, ID, std::next(MI.operands_begin(), opers.getVarIdx()),
369
160
                      MI.operands_end());
370
160
}
371
372
185
void StackMaps::recordPatchPoint(const MachineInstr &MI) {
373
185
  assert(MI.getOpcode() == TargetOpcode::PATCHPOINT && "expected patchpoint");
374
185
375
185
  PatchPointOpers opers(&MI);
376
185
  const int64_t ID = opers.getID();
377
185
  auto MOI = std::next(MI.operands_begin(), opers.getStackMapStartIdx());
378
185
  recordStackMapOpers(MI, ID, MOI, MI.operands_end(),
379
185
                      opers.isAnyReg() && 
opers.hasDef()67
);
380
185
381
#ifndef NDEBUG
382
  // verify anyregcc
383
  auto &Locations = CSInfos.back().Locations;
384
  if (opers.isAnyReg()) {
385
    unsigned NArgs = opers.getNumCallArgs();
386
    for (unsigned i = 0, e = (opers.hasDef() ? NArgs + 1 : NArgs); i != e; ++i)
387
      assert(Locations[i].Type == Location::Register &&
388
             "anyreg arg must be in reg.");
389
  }
390
#endif
391
}
392
393
88
void StackMaps::recordStatepoint(const MachineInstr &MI) {
394
88
  assert(MI.getOpcode() == TargetOpcode::STATEPOINT && "expected statepoint");
395
88
396
88
  StatepointOpers opers(&MI);
397
88
  // Record all the deopt and gc operands (they're contiguous and run from the
398
88
  // initial index to the end of the operand list)
399
88
  const unsigned StartIdx = opers.getVarIdx();
400
88
  recordStackMapOpers(MI, opers.getID(), MI.operands_begin() + StartIdx,
401
88
                      MI.operands_end(), false);
402
88
}
403
404
/// Emit the stackmap header.
405
///
406
/// Header {
407
///   uint8  : Stack Map Version (currently 2)
408
///   uint8  : Reserved (expected to be 0)
409
///   uint16 : Reserved (expected to be 0)
410
/// }
411
/// uint32 : NumFunctions
412
/// uint32 : NumConstants
413
/// uint32 : NumRecords
414
63
void StackMaps::emitStackmapHeader(MCStreamer &OS) {
415
63
  // Header.
416
63
  OS.EmitIntValue(StackMapVersion, 1); // Version.
417
63
  OS.EmitIntValue(0, 1);               // Reserved.
418
63
  OS.EmitIntValue(0, 2);               // Reserved.
419
63
420
63
  // Num functions.
421
63
  LLVM_DEBUG(dbgs() << WSMP << "#functions = " << FnInfos.size() << '\n');
422
63
  OS.EmitIntValue(FnInfos.size(), 4);
423
63
  // Num constants.
424
63
  LLVM_DEBUG(dbgs() << WSMP << "#constants = " << ConstPool.size() << '\n');
425
63
  OS.EmitIntValue(ConstPool.size(), 4);
426
63
  // Num callsites.
427
63
  LLVM_DEBUG(dbgs() << WSMP << "#callsites = " << CSInfos.size() << '\n');
428
63
  OS.EmitIntValue(CSInfos.size(), 4);
429
63
}
430
431
/// Emit the function frame record for each function.
432
///
433
/// StkSizeRecord[NumFunctions] {
434
///   uint64 : Function Address
435
///   uint64 : Stack Size
436
///   uint64 : Record Count
437
/// }
438
63
void StackMaps::emitFunctionFrameRecords(MCStreamer &OS) {
439
63
  // Function Frame records.
440
63
  LLVM_DEBUG(dbgs() << WSMP << "functions:\n");
441
281
  for (auto const &FR : FnInfos) {
442
281
    LLVM_DEBUG(dbgs() << WSMP << "function addr: " << FR.first
443
281
                      << " frame size: " << FR.second.StackSize
444
281
                      << " callsite count: " << FR.second.RecordCount << '\n');
445
281
    OS.EmitSymbolValue(FR.first, 8);
446
281
    OS.EmitIntValue(FR.second.StackSize, 8);
447
281
    OS.EmitIntValue(FR.second.RecordCount, 8);
448
281
  }
449
63
}
450
451
/// Emit the constant pool.
452
///
453
/// int64  : Constants[NumConstants]
454
63
void StackMaps::emitConstantPoolEntries(MCStreamer &OS) {
455
63
  // Constant pool entries.
456
63
  LLVM_DEBUG(dbgs() << WSMP << "constants:\n");
457
63
  for (const auto &ConstEntry : ConstPool) {
458
20
    LLVM_DEBUG(dbgs() << WSMP << ConstEntry.second << '\n');
459
20
    OS.EmitIntValue(ConstEntry.second, 8);
460
20
  }
461
63
}
462
463
/// Emit the callsite info for each callsite.
464
///
465
/// StkMapRecord[NumRecords] {
466
///   uint64 : PatchPoint ID
467
///   uint32 : Instruction Offset
468
///   uint16 : Reserved (record flags)
469
///   uint16 : NumLocations
470
///   Location[NumLocations] {
471
///     uint8  : Register | Direct | Indirect | Constant | ConstantIndex
472
///     uint8  : Size in Bytes
473
///     uint16 : Dwarf RegNum
474
///     int32  : Offset
475
///   }
476
///   uint16 : Padding
477
///   uint16 : NumLiveOuts
478
///   LiveOuts[NumLiveOuts] {
479
///     uint16 : Dwarf RegNum
480
///     uint8  : Reserved
481
///     uint8  : Size in Bytes
482
///   }
483
///   uint32 : Padding (only if required to align to 8 byte)
484
/// }
485
///
486
/// Location Encoding, Type, Value:
487
///   0x1, Register, Reg                 (value in register)
488
///   0x2, Direct, Reg + Offset          (frame index)
489
///   0x3, Indirect, [Reg + Offset]      (spilled value)
490
///   0x4, Constant, Offset              (small constant)
491
///   0x5, ConstIndex, Constants[Offset] (large constant)
492
63
void StackMaps::emitCallsiteEntries(MCStreamer &OS) {
493
63
  LLVM_DEBUG(print(dbgs()));
494
63
  // Callsite entries.
495
433
  for (const auto &CSI : CSInfos) {
496
433
    const LocationVec &CSLocs = CSI.Locations;
497
433
    const LiveOutVec &LiveOuts = CSI.LiveOuts;
498
433
499
433
    // Verify stack map entry. It's better to communicate a problem to the
500
433
    // runtime than crash in case of in-process compilation. Currently, we do
501
433
    // simple overflow checks, but we may eventually communicate other
502
433
    // compilation errors this way.
503
433
    if (CSLocs.size() > UINT16_MAX || LiveOuts.size() > UINT16_MAX) {
504
0
      OS.EmitIntValue(UINT64_MAX, 8); // Invalid ID.
505
0
      OS.EmitValue(CSI.CSOffsetExpr, 4);
506
0
      OS.EmitIntValue(0, 2); // Reserved.
507
0
      OS.EmitIntValue(0, 2); // 0 locations.
508
0
      OS.EmitIntValue(0, 2); // padding.
509
0
      OS.EmitIntValue(0, 2); // 0 live-out registers.
510
0
      OS.EmitIntValue(0, 4); // padding.
511
0
      continue;
512
0
    }
513
433
514
433
    OS.EmitIntValue(CSI.ID, 8);
515
433
    OS.EmitValue(CSI.CSOffsetExpr, 4);
516
433
517
433
    // Reserved for flags.
518
433
    OS.EmitIntValue(0, 2);
519
433
    OS.EmitIntValue(CSLocs.size(), 2);
520
433
521
1.50k
    for (const auto &Loc : CSLocs) {
522
1.50k
      OS.EmitIntValue(Loc.Type, 1);
523
1.50k
      OS.EmitIntValue(0, 1);  // Reserved
524
1.50k
      OS.EmitIntValue(Loc.Size, 2);
525
1.50k
      OS.EmitIntValue(Loc.Reg, 2);
526
1.50k
      OS.EmitIntValue(0, 2);  // Reserved
527
1.50k
      OS.EmitIntValue(Loc.Offset, 4);
528
1.50k
    }
529
433
530
433
    // Emit alignment to 8 byte.
531
433
    OS.EmitValueToAlignment(8);
532
433
533
433
    // Num live-out registers and padding to align to 4 byte.
534
433
    OS.EmitIntValue(0, 2);
535
433
    OS.EmitIntValue(LiveOuts.size(), 2);
536
433
537
440
    for (const auto &LO : LiveOuts) {
538
440
      OS.EmitIntValue(LO.DwarfRegNum, 2);
539
440
      OS.EmitIntValue(0, 1);
540
440
      OS.EmitIntValue(LO.Size, 1);
541
440
    }
542
433
    // Emit alignment to 8 byte.
543
433
    OS.EmitValueToAlignment(8);
544
433
  }
545
63
}
546
547
/// Serialize the stackmap data.
548
22.3k
void StackMaps::serializeToStackMapSection() {
549
22.3k
  (void)WSMP;
550
22.3k
  // Bail out if there's no stack map data.
551
22.3k
  assert((!CSInfos.empty() || ConstPool.empty()) &&
552
22.3k
         "Expected empty constant pool too!");
553
22.3k
  assert((!CSInfos.empty() || FnInfos.empty()) &&
554
22.3k
         "Expected empty function record too!");
555
22.3k
  if (CSInfos.empty())
556
22.3k
    return;
557
63
558
63
  MCContext &OutContext = AP.OutStreamer->getContext();
559
63
  MCStreamer &OS = *AP.OutStreamer;
560
63
561
63
  // Create the section.
562
63
  MCSection *StackMapSection =
563
63
      OutContext.getObjectFileInfo()->getStackMapSection();
564
63
  OS.SwitchSection(StackMapSection);
565
63
566
63
  // Emit a dummy symbol to force section inclusion.
567
63
  OS.EmitLabel(OutContext.getOrCreateSymbol(Twine("__LLVM_StackMaps")));
568
63
569
63
  // Serialize data.
570
63
  LLVM_DEBUG(dbgs() << "********** Stack Map Output **********\n");
571
63
  emitStackmapHeader(OS);
572
63
  emitFunctionFrameRecords(OS);
573
63
  emitConstantPoolEntries(OS);
574
63
  emitCallsiteEntries(OS);
575
63
  OS.AddBlankLine();
576
63
577
63
  // Clean up.
578
63
  CSInfos.clear();
579
63
  ConstPool.clear();
580
63
}