/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/MC/MCInstrDesc.cpp
Line | Count | Source (jump to first uncovered line) |
1 | | //===------ llvm/MC/MCInstrDesc.cpp- Instruction Descriptors --------------===// |
2 | | // |
3 | | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | | // See https://llvm.org/LICENSE.txt for license information. |
5 | | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | | // |
7 | | //===----------------------------------------------------------------------===// |
8 | | // |
9 | | // This file defines methods on the MCOperandInfo and MCInstrDesc classes, which |
10 | | // are used to describe target instructions and their operands. |
11 | | // |
12 | | //===----------------------------------------------------------------------===// |
13 | | |
14 | | #include "llvm/MC/MCInstrDesc.h" |
15 | | #include "llvm/MC/MCInst.h" |
16 | | #include "llvm/MC/MCRegisterInfo.h" |
17 | | #include "llvm/MC/MCSubtargetInfo.h" |
18 | | |
19 | | using namespace llvm; |
20 | | |
21 | | bool MCInstrDesc::getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI, |
22 | 41.8k | std::string &Info) const { |
23 | 41.8k | if (ComplexDeprecationInfo) |
24 | 4.10k | return ComplexDeprecationInfo(MI, STI, Info); |
25 | 37.7k | if (DeprecatedFeature != -1 && STI.getFeatureBits()[DeprecatedFeature]35 ) { |
26 | 4 | // FIXME: it would be nice to include the subtarget feature here. |
27 | 4 | Info = "deprecated"; |
28 | 4 | return true; |
29 | 4 | } |
30 | 37.7k | return false; |
31 | 37.7k | } |
32 | | bool MCInstrDesc::mayAffectControlFlow(const MCInst &MI, |
33 | 2.62k | const MCRegisterInfo &RI) const { |
34 | 2.62k | if (isBranch() || isCall()2.32k || isReturn()2.21k || isIndirectBranch()2.16k ) |
35 | 460 | return true; |
36 | 2.16k | unsigned PC = RI.getProgramCounter(); |
37 | 2.16k | if (PC == 0) |
38 | 1.17k | return false; |
39 | 988 | if (hasDefOfPhysReg(MI, PC, RI)) |
40 | 0 | return true; |
41 | 988 | return false; |
42 | 988 | } |
43 | | |
44 | | bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, |
45 | 1.64M | const MCRegisterInfo *MRI) const { |
46 | 1.64M | if (const MCPhysReg *ImpDefs = ImplicitDefs) |
47 | 1.33M | for (; 1.25M *ImpDefs; ++ImpDefs82.4k ) |
48 | 1.29M | if (*ImpDefs == Reg || (82.4k MRI82.4k && MRI->isSubRegister(Reg, *ImpDefs)197 )) |
49 | 1.20M | return true; |
50 | 1.64M | return false436k ; |
51 | 1.64M | } |
52 | | |
53 | | bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg, |
54 | 1.98k | const MCRegisterInfo &RI) const { |
55 | 3.08k | for (int i = 0, e = NumDefs; i != e; ++i1.10k ) |
56 | 1.13k | if (MI.getOperand(i).isReg() && |
57 | 1.13k | RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg())) |
58 | 30 | return true; |
59 | 1.98k | if (1.95k variadicOpsAreDefs()1.95k ) |
60 | 34 | for (int i = NumOperands - 1, e = MI.getNumOperands(); 19 i != e; ++i15 ) |
61 | 34 | if (MI.getOperand(i).isReg() && |
62 | 34 | RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg())) |
63 | 19 | return true; |
64 | 1.95k | return hasImplicitDefOfPhysReg(Reg, &RI)1.93k ; |
65 | 1.95k | } |