Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
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Source (jump to first uncovered line)
1
//===- AArch64AddressingModes.h - AArch64 Addressing Modes ------*- C++ -*-===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
//
9
// This file contains the AArch64 addressing mode implementation stuff.
10
//
11
//===----------------------------------------------------------------------===//
12
13
#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64ADDRESSINGMODES_H
14
#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64ADDRESSINGMODES_H
15
16
#include "llvm/ADT/APFloat.h"
17
#include "llvm/ADT/APInt.h"
18
#include "llvm/ADT/bit.h"
19
#include "llvm/Support/ErrorHandling.h"
20
#include "llvm/Support/MathExtras.h"
21
#include <cassert>
22
23
namespace llvm {
24
25
/// AArch64_AM - AArch64 Addressing Mode Stuff
26
namespace AArch64_AM {
27
28
//===----------------------------------------------------------------------===//
29
// Shifts
30
//
31
32
enum ShiftExtendType {
33
  InvalidShiftExtend = -1,
34
  LSL = 0,
35
  LSR,
36
  ASR,
37
  ROR,
38
  MSL,
39
40
  UXTB,
41
  UXTH,
42
  UXTW,
43
  UXTX,
44
45
  SXTB,
46
  SXTH,
47
  SXTW,
48
  SXTX,
49
};
50
51
/// getShiftName - Get the string encoding for the shift type.
52
2.92k
static inline const char *getShiftExtendName(AArch64_AM::ShiftExtendType ST) {
53
2.92k
  switch (ST) {
54
2.92k
  
default: 0
llvm_unreachable0
("unhandled shift type!");
55
2.92k
  
case AArch64_AM::LSL: return "lsl"1.49k
;
56
2.92k
  
case AArch64_AM::LSR: return "lsr"359
;
57
2.92k
  
case AArch64_AM::ASR: return "asr"403
;
58
2.92k
  
case AArch64_AM::ROR: return "ror"51
;
59
2.92k
  
case AArch64_AM::MSL: return "msl"63
;
60
2.92k
  
case AArch64_AM::UXTB: return "uxtb"83
;
61
2.92k
  
case AArch64_AM::UXTH: return "uxth"85
;
62
2.92k
  
case AArch64_AM::UXTW: return "uxtw"69
;
63
2.92k
  
case AArch64_AM::UXTX: return "uxtx"30
;
64
2.92k
  
case AArch64_AM::SXTB: return "sxtb"70
;
65
2.92k
  
case AArch64_AM::SXTH: return "sxth"85
;
66
2.92k
  
case AArch64_AM::SXTW: return "sxtw"98
;
67
2.92k
  
case AArch64_AM::SXTX: return "sxtx"26
;
68
0
  }
69
0
  return nullptr;
70
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
AArch64InstPrinter.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
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Count
Source
52
2.92k
static inline const char *getShiftExtendName(AArch64_AM::ShiftExtendType ST) {
53
2.92k
  switch (ST) {
54
2.92k
  
default: 0
llvm_unreachable0
("unhandled shift type!");
55
2.92k
  
case AArch64_AM::LSL: return "lsl"1.49k
;
56
2.92k
  
case AArch64_AM::LSR: return "lsr"359
;
57
2.92k
  
case AArch64_AM::ASR: return "asr"403
;
58
2.92k
  
case AArch64_AM::ROR: return "ror"51
;
59
2.92k
  
case AArch64_AM::MSL: return "msl"63
;
60
2.92k
  
case AArch64_AM::UXTB: return "uxtb"83
;
61
2.92k
  
case AArch64_AM::UXTH: return "uxth"85
;
62
2.92k
  
case AArch64_AM::UXTW: return "uxtw"69
;
63
2.92k
  
case AArch64_AM::UXTX: return "uxtx"30
;
64
2.92k
  
case AArch64_AM::SXTB: return "sxtb"70
;
65
2.92k
  
case AArch64_AM::SXTH: return "sxth"85
;
66
2.92k
  
case AArch64_AM::SXTW: return "sxtw"98
;
67
2.92k
  
case AArch64_AM::SXTX: return "sxtx"26
;
68
0
  }
69
0
  return nullptr;
70
0
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getShiftExtendName(llvm::AArch64_AM::ShiftExtendType)
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/// getShiftType - Extract the shift type.
73
7.89k
static inline AArch64_AM::ShiftExtendType getShiftType(unsigned Imm) {
74
7.89k
  switch ((Imm >> 6) & 0x7) {
75
7.89k
  
default: return AArch64_AM::InvalidShiftExtend0
;
76
7.89k
  
case 0: return AArch64_AM::LSL5.98k
;
77
7.89k
  
case 1: return AArch64_AM::LSR862
;
78
7.89k
  
case 2: return AArch64_AM::ASR822
;
79
7.89k
  
case 3: return AArch64_AM::ROR102
;
80
7.89k
  
case 4: return AArch64_AM::MSL126
;
81
7.89k
  }
82
7.89k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
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Count
Source
73
157
static inline AArch64_AM::ShiftExtendType getShiftType(unsigned Imm) {
74
157
  switch ((Imm >> 6) & 0x7) {
75
157
  
default: return AArch64_AM::InvalidShiftExtend0
;
76
157
  
case 0: return AArch64_AM::LSL25
;
77
157
  
case 1: return AArch64_AM::LSR132
;
78
157
  
case 2: return AArch64_AM::ASR0
;
79
157
  
case 3: return AArch64_AM::ROR0
;
80
157
  
case 4: return AArch64_AM::MSL0
;
81
157
  }
82
157
}
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
AArch64InstrInfo.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Line
Count
Source
73
216
static inline AArch64_AM::ShiftExtendType getShiftType(unsigned Imm) {
74
216
  switch ((Imm >> 6) & 0x7) {
75
216
  
default: return AArch64_AM::InvalidShiftExtend0
;
76
216
  case 0: return AArch64_AM::LSL;
77
216
  
case 1: return AArch64_AM::LSR0
;
78
216
  
case 2: return AArch64_AM::ASR0
;
79
216
  
case 3: return AArch64_AM::ROR0
;
80
216
  
case 4: return AArch64_AM::MSL0
;
81
216
  }
82
216
}
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
AArch64InstPrinter.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
Line
Count
Source
73
7.47k
static inline AArch64_AM::ShiftExtendType getShiftType(unsigned Imm) {
74
7.47k
  switch ((Imm >> 6) & 0x7) {
75
7.47k
  
default: return AArch64_AM::InvalidShiftExtend0
;
76
7.47k
  
case 0: return AArch64_AM::LSL5.72k
;
77
7.47k
  
case 1: return AArch64_AM::LSR718
;
78
7.47k
  
case 2: return AArch64_AM::ASR806
;
79
7.47k
  
case 3: return AArch64_AM::ROR102
;
80
7.47k
  
case 4: return AArch64_AM::MSL126
;
81
7.47k
  }
82
7.47k
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getShiftType(unsigned int)
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Count
Source
73
48
static inline AArch64_AM::ShiftExtendType getShiftType(unsigned Imm) {
74
48
  switch ((Imm >> 6) & 0x7) {
75
48
  
default: return AArch64_AM::InvalidShiftExtend0
;
76
48
  
case 0: return AArch64_AM::LSL20
;
77
48
  
case 1: return AArch64_AM::LSR12
;
78
48
  
case 2: return AArch64_AM::ASR16
;
79
48
  
case 3: return AArch64_AM::ROR0
;
80
48
  
case 4: return AArch64_AM::MSL0
;
81
48
  }
82
48
}
83
84
/// getShiftValue - Extract the shift value.
85
2.20M
static inline unsigned getShiftValue(unsigned Imm) {
86
2.20M
  return Imm & 0x3f;
87
2.20M
}
AArch64AsmPrinter.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Line
Count
Source
85
29
static inline unsigned getShiftValue(unsigned Imm) {
86
29
  return Imm & 0x3f;
87
29
}
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Line
Count
Source
85
129k
static inline unsigned getShiftValue(unsigned Imm) {
86
129k
  return Imm & 0x3f;
87
129k
}
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Line
Count
Source
85
91
static inline unsigned getShiftValue(unsigned Imm) {
86
91
  return Imm & 0x3f;
87
91
}
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
AArch64InstrInfo.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Line
Count
Source
85
1.13k
static inline unsigned getShiftValue(unsigned Imm) {
86
1.13k
  return Imm & 0x3f;
87
1.13k
}
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Line
Count
Source
85
672k
static inline unsigned getShiftValue(unsigned Imm) {
86
672k
  return Imm & 0x3f;
87
672k
}
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
AArch64InstPrinter.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Line
Count
Source
85
11.5k
static inline unsigned getShiftValue(unsigned Imm) {
86
11.5k
  return Imm & 0x3f;
87
11.5k
}
AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Line
Count
Source
85
1.39M
static inline unsigned getShiftValue(unsigned Imm) {
86
1.39M
  return Imm & 0x3f;
87
1.39M
}
AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getShiftValue(unsigned int)
Line
Count
Source
85
98
static inline unsigned getShiftValue(unsigned Imm) {
86
98
  return Imm & 0x3f;
87
98
}
88
89
/// getShifterImm - Encode the shift type and amount:
90
///   imm:     6-bit shift amount
91
///   shifter: 000 ==> lsl
92
///            001 ==> lsr
93
///            010 ==> asr
94
///            011 ==> ror
95
///            100 ==> msl
96
///   {8-6}  = shifter
97
///   {5-0}  = imm
98
static inline unsigned getShifterImm(AArch64_AM::ShiftExtendType ST,
99
5.70M
                                     unsigned Imm) {
100
5.70M
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
5.70M
  unsigned STEnc = 0;
102
5.70M
  switch (ST) {
103
5.70M
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
5.70M
  
case AArch64_AM::LSL: STEnc = 0; break5.70M
;
105
5.70M
  
case AArch64_AM::LSR: STEnc = 1; break1.63k
;
106
5.70M
  
case AArch64_AM::ASR: STEnc = 2; break1.30k
;
107
5.70M
  
case AArch64_AM::ROR: STEnc = 3; break29
;
108
5.70M
  
case AArch64_AM::MSL: STEnc = 4; break16
;
109
5.70M
  }
110
5.70M
  return (STEnc << 6) | (Imm & 0x3f);
111
5.70M
}
AArch64AsmPrinter.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
99
4
                                     unsigned Imm) {
100
4
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
4
  unsigned STEnc = 0;
102
4
  switch (ST) {
103
4
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
4
  
case AArch64_AM::LSL: STEnc = 0; break0
;
105
4
  case AArch64_AM::LSR: STEnc = 1; break;
106
4
  
case AArch64_AM::ASR: STEnc = 2; break0
;
107
4
  
case AArch64_AM::ROR: STEnc = 3; break0
;
108
4
  
case AArch64_AM::MSL: STEnc = 4; break0
;
109
4
  }
110
4
  return (STEnc << 6) | (Imm & 0x3f);
111
4
}
AArch64ExpandImm.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
99
1.83M
                                     unsigned Imm) {
100
1.83M
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
1.83M
  unsigned STEnc = 0;
102
1.83M
  switch (ST) {
103
1.83M
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
1.83M
  case AArch64_AM::LSL: STEnc = 0; break;
105
1.83M
  
case AArch64_AM::LSR: STEnc = 1; break0
;
106
1.83M
  
case AArch64_AM::ASR: STEnc = 2; break0
;
107
1.83M
  
case AArch64_AM::ROR: STEnc = 3; break0
;
108
1.83M
  
case AArch64_AM::MSL: STEnc = 4; break0
;
109
1.83M
  }
110
1.83M
  return (STEnc << 6) | (Imm & 0x3f);
111
1.83M
}
AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
99
2.73M
                                     unsigned Imm) {
100
2.73M
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
2.73M
  unsigned STEnc = 0;
102
2.73M
  switch (ST) {
103
2.73M
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
2.73M
  case AArch64_AM::LSL: STEnc = 0; break;
105
2.73M
  
case AArch64_AM::LSR: STEnc = 1; break0
;
106
2.73M
  
case AArch64_AM::ASR: STEnc = 2; break0
;
107
2.73M
  
case AArch64_AM::ROR: STEnc = 3; break0
;
108
2.73M
  
case AArch64_AM::MSL: STEnc = 4; break0
;
109
2.73M
  }
110
2.73M
  return (STEnc << 6) | (Imm & 0x3f);
111
2.73M
}
AArch64FastISel.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
99
139
                                     unsigned Imm) {
100
139
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
139
  unsigned STEnc = 0;
102
139
  switch (ST) {
103
139
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
139
  
case AArch64_AM::LSL: STEnc = 0; break118
;
105
139
  
case AArch64_AM::LSR: STEnc = 1; break3
;
106
139
  
case AArch64_AM::ASR: STEnc = 2; break18
;
107
139
  
case AArch64_AM::ROR: STEnc = 3; break0
;
108
139
  
case AArch64_AM::MSL: STEnc = 4; break0
;
109
139
  }
110
139
  return (STEnc << 6) | (Imm & 0x3f);
111
139
}
AArch64FrameLowering.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
99
6
                                     unsigned Imm) {
100
6
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
6
  unsigned STEnc = 0;
102
6
  switch (ST) {
103
6
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
6
  case AArch64_AM::LSL: STEnc = 0; break;
105
6
  
case AArch64_AM::LSR: STEnc = 1; break0
;
106
6
  
case AArch64_AM::ASR: STEnc = 2; break0
;
107
6
  
case AArch64_AM::ROR: STEnc = 3; break0
;
108
6
  
case AArch64_AM::MSL: STEnc = 4; break0
;
109
6
  }
110
6
  return (STEnc << 6) | (Imm & 0x3f);
111
6
}
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
99
275k
                                     unsigned Imm) {
100
275k
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
275k
  unsigned STEnc = 0;
102
275k
  switch (ST) {
103
275k
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
275k
  
case AArch64_AM::LSL: STEnc = 0; break272k
;
105
275k
  
case AArch64_AM::LSR: STEnc = 1; break1.54k
;
106
275k
  
case AArch64_AM::ASR: STEnc = 2; break1.20k
;
107
275k
  
case AArch64_AM::ROR: STEnc = 3; break10
;
108
275k
  
case AArch64_AM::MSL: STEnc = 4; break0
;
109
275k
  }
110
275k
  return (STEnc << 6) | (Imm & 0x3f);
111
275k
}
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
AArch64InstrInfo.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
99
542k
                                     unsigned Imm) {
100
542k
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
542k
  unsigned STEnc = 0;
102
542k
  switch (ST) {
103
542k
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
542k
  case AArch64_AM::LSL: STEnc = 0; break;
105
542k
  
case AArch64_AM::LSR: STEnc = 1; break0
;
106
542k
  
case AArch64_AM::ASR: STEnc = 2; break0
;
107
542k
  
case AArch64_AM::ROR: STEnc = 3; break0
;
108
542k
  
case AArch64_AM::MSL: STEnc = 4; break0
;
109
542k
  }
110
542k
  return (STEnc << 6) | (Imm & 0x3f);
111
542k
}
AArch64InstructionSelector.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
99
313k
                                     unsigned Imm) {
100
313k
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
313k
  unsigned STEnc = 0;
102
313k
  switch (ST) {
103
313k
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
313k
  case AArch64_AM::LSL: STEnc = 0; break;
105
313k
  
case AArch64_AM::LSR: STEnc = 1; break0
;
106
313k
  
case AArch64_AM::ASR: STEnc = 2; break0
;
107
313k
  
case AArch64_AM::ROR: STEnc = 3; break0
;
108
313k
  
case AArch64_AM::MSL: STEnc = 4; break0
;
109
313k
  }
110
313k
  return (STEnc << 6) | (Imm & 0x3f);
111
313k
}
AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
99
109
                                     unsigned Imm) {
100
109
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
109
  unsigned STEnc = 0;
102
109
  switch (ST) {
103
109
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
109
  case AArch64_AM::LSL: STEnc = 0; break;
105
109
  
case AArch64_AM::LSR: STEnc = 1; break0
;
106
109
  
case AArch64_AM::ASR: STEnc = 2; break0
;
107
109
  
case AArch64_AM::ROR: STEnc = 3; break0
;
108
109
  
case AArch64_AM::MSL: STEnc = 4; break0
;
109
109
  }
110
109
  return (STEnc << 6) | (Imm & 0x3f);
111
109
}
AArch64RegisterInfo.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
99
313
                                     unsigned Imm) {
100
313
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
313
  unsigned STEnc = 0;
102
313
  switch (ST) {
103
313
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
313
  case AArch64_AM::LSL: STEnc = 0; break;
105
313
  
case AArch64_AM::LSR: STEnc = 1; break0
;
106
313
  
case AArch64_AM::ASR: STEnc = 2; break0
;
107
313
  
case AArch64_AM::ROR: STEnc = 3; break0
;
108
313
  
case AArch64_AM::MSL: STEnc = 4; break0
;
109
313
  }
110
313
  return (STEnc << 6) | (Imm & 0x3f);
111
313
}
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
AArch64AsmParser.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
99
431
                                     unsigned Imm) {
100
431
  assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!");
101
431
  unsigned STEnc = 0;
102
431
  switch (ST) {
103
431
  
default: 0
llvm_unreachable0
("Invalid shift requested");
104
431
  
case AArch64_AM::LSL: STEnc = 0; break228
;
105
431
  
case AArch64_AM::LSR: STEnc = 1; break80
;
106
431
  
case AArch64_AM::ASR: STEnc = 2; break88
;
107
431
  
case AArch64_AM::ROR: STEnc = 3; break19
;
108
431
  
case AArch64_AM::MSL: STEnc = 4; break16
;
109
431
  }
110
431
  return (STEnc << 6) | (Imm & 0x3f);
111
431
}
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getShifterImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
112
113
//===----------------------------------------------------------------------===//
114
// Extends
115
//
116
117
/// getArithShiftValue - get the arithmetic shift value.
118
758
static inline unsigned getArithShiftValue(unsigned Imm) {
119
758
  return Imm & 0x7;
120
758
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
AArch64InstrInfo.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Line
Count
Source
118
122
static inline unsigned getArithShiftValue(unsigned Imm) {
119
122
  return Imm & 0x7;
120
122
}
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
AArch64InstPrinter.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Line
Count
Source
118
558
static inline unsigned getArithShiftValue(unsigned Imm) {
119
558
  return Imm & 0x7;
120
558
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getArithShiftValue(unsigned int)
Line
Count
Source
118
78
static inline unsigned getArithShiftValue(unsigned Imm) {
119
78
  return Imm & 0x7;
120
78
}
121
122
/// getExtendType - Extract the extend type for operands of arithmetic ops.
123
1.02M
static inline AArch64_AM::ShiftExtendType getExtendType(unsigned Imm) {
124
1.02M
  assert((Imm & 0x7) == Imm && "invalid immediate!");
125
1.02M
  switch (Imm) {
126
1.02M
  
default: 0
llvm_unreachable0
("Compiler bug!");
127
1.02M
  
case 0: return AArch64_AM::UXTB1.02M
;
128
1.02M
  
case 1: return AArch64_AM::UXTH107
;
129
1.02M
  
case 2: return AArch64_AM::UXTW106
;
130
1.02M
  
case 3: return AArch64_AM::UXTX50
;
131
1.02M
  
case 4: return AArch64_AM::SXTB70
;
132
1.02M
  
case 5: return AArch64_AM::SXTH97
;
133
1.02M
  
case 6: return AArch64_AM::SXTW110
;
134
1.02M
  
case 7: return AArch64_AM::SXTX38
;
135
1.02M
  }
136
1.02M
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
AArch64InstrInfo.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Line
Count
Source
123
1.02M
static inline AArch64_AM::ShiftExtendType getExtendType(unsigned Imm) {
124
1.02M
  assert((Imm & 0x7) == Imm && "invalid immediate!");
125
1.02M
  switch (Imm) {
126
1.02M
  
default: 0
llvm_unreachable0
("Compiler bug!");
127
1.02M
  
case 0: return AArch64_AM::UXTB1.02M
;
128
1.02M
  
case 1: return AArch64_AM::UXTH10
;
129
1.02M
  
case 2: return AArch64_AM::UXTW27
;
130
1.02M
  
case 3: return AArch64_AM::UXTX0
;
131
1.02M
  
case 4: return AArch64_AM::SXTB0
;
132
1.02M
  
case 5: return AArch64_AM::SXTH0
;
133
1.02M
  
case 6: return AArch64_AM::SXTW0
;
134
1.02M
  
case 7: return AArch64_AM::SXTX0
;
135
1.02M
  }
136
1.02M
}
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
AArch64InstPrinter.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Line
Count
Source
123
558
static inline AArch64_AM::ShiftExtendType getExtendType(unsigned Imm) {
124
558
  assert((Imm & 0x7) == Imm && "invalid immediate!");
125
558
  switch (Imm) {
126
558
  
default: 0
llvm_unreachable0
("Compiler bug!");
127
558
  
case 0: return AArch64_AM::UXTB83
;
128
558
  
case 1: return AArch64_AM::UXTH85
;
129
558
  
case 2: return AArch64_AM::UXTW73
;
130
558
  
case 3: return AArch64_AM::UXTX38
;
131
558
  
case 4: return AArch64_AM::SXTB70
;
132
558
  
case 5: return AArch64_AM::SXTH85
;
133
558
  
case 6: return AArch64_AM::SXTW98
;
134
558
  
case 7: return AArch64_AM::SXTX26
;
135
558
  }
136
558
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getExtendType(unsigned int)
Line
Count
Source
123
70
static inline AArch64_AM::ShiftExtendType getExtendType(unsigned Imm) {
124
70
  assert((Imm & 0x7) == Imm && "invalid immediate!");
125
70
  switch (Imm) {
126
70
  
default: 0
llvm_unreachable0
("Compiler bug!");
127
70
  
case 0: return AArch64_AM::UXTB4
;
128
70
  
case 1: return AArch64_AM::UXTH12
;
129
70
  
case 2: return AArch64_AM::UXTW6
;
130
70
  
case 3: return AArch64_AM::UXTX12
;
131
70
  
case 4: return AArch64_AM::SXTB0
;
132
70
  
case 5: return AArch64_AM::SXTH12
;
133
70
  
case 6: return AArch64_AM::SXTW12
;
134
70
  
case 7: return AArch64_AM::SXTX12
;
135
70
  }
136
70
}
137
138
671
static inline AArch64_AM::ShiftExtendType getArithExtendType(unsigned Imm) {
139
671
  return getExtendType((Imm >> 3) & 0x7);
140
671
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
AArch64InstrInfo.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Line
Count
Source
138
47
static inline AArch64_AM::ShiftExtendType getArithExtendType(unsigned Imm) {
139
47
  return getExtendType((Imm >> 3) & 0x7);
140
47
}
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
AArch64InstPrinter.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Line
Count
Source
138
558
static inline AArch64_AM::ShiftExtendType getArithExtendType(unsigned Imm) {
139
558
  return getExtendType((Imm >> 3) & 0x7);
140
558
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getArithExtendType(unsigned int)
Line
Count
Source
138
66
static inline AArch64_AM::ShiftExtendType getArithExtendType(unsigned Imm) {
139
66
  return getExtendType((Imm >> 3) & 0x7);
140
66
}
141
142
/// Mapping from extend bits to required operation:
143
///   shifter: 000 ==> uxtb
144
///            001 ==> uxth
145
///            010 ==> uxtw
146
///            011 ==> uxtx
147
///            100 ==> sxtb
148
///            101 ==> sxth
149
///            110 ==> sxtw
150
///            111 ==> sxtx
151
6.58k
inline unsigned getExtendEncoding(AArch64_AM::ShiftExtendType ET) {
152
6.58k
  switch (ET) {
153
6.58k
  
default: 0
llvm_unreachable0
("Invalid extend type requested");
154
6.58k
  
case AArch64_AM::UXTB: return 01.62k
;
break0
;
155
6.58k
  
case AArch64_AM::UXTH: return 1336
;
break0
;
156
6.58k
  
case AArch64_AM::UXTW: return 2650
;
break0
;
157
6.58k
  
case AArch64_AM::UXTX: return 338
;
break0
;
158
6.58k
  
case AArch64_AM::SXTB: return 4141
;
break0
;
159
6.58k
  
case AArch64_AM::SXTH: return 5334
;
break0
;
160
6.58k
  
case AArch64_AM::SXTW: return 63.43k
;
break0
;
161
6.58k
  
case AArch64_AM::SXTX: return 722
;
break0
;
162
6.58k
  }
163
6.58k
}
164
165
/// getArithExtendImm - Encode the extend type and shift amount for an
166
///                     arithmetic instruction:
167
///   imm:     3-bit extend amount
168
///   {5-3}  = shifter
169
///   {2-0}  = imm3
170
static inline unsigned getArithExtendImm(AArch64_AM::ShiftExtendType ET,
171
6.58k
                                         unsigned Imm) {
172
6.58k
  assert((Imm & 0x7) == Imm && "Illegal shifted immedate value!");
173
6.58k
  return (getExtendEncoding(ET) << 3) | (Imm & 0x7);
174
6.58k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
171
2
                                         unsigned Imm) {
172
2
  assert((Imm & 0x7) == Imm && "Illegal shifted immedate value!");
173
2
  return (getExtendEncoding(ET) << 3) | (Imm & 0x7);
174
2
}
AArch64FastISel.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
171
7
                                         unsigned Imm) {
172
7
  assert((Imm & 0x7) == Imm && "Illegal shifted immedate value!");
173
7
  return (getExtendEncoding(ET) << 3) | (Imm & 0x7);
174
7
}
AArch64FrameLowering.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
171
5
                                         unsigned Imm) {
172
5
  assert((Imm & 0x7) == Imm && "Illegal shifted immedate value!");
173
5
  return (getExtendEncoding(ET) << 3) | (Imm & 0x7);
174
5
}
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
171
6.33k
                                         unsigned Imm) {
172
6.33k
  assert((Imm & 0x7) == Imm && "Illegal shifted immedate value!");
173
6.33k
  return (getExtendEncoding(ET) << 3) | (Imm & 0x7);
174
6.33k
}
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
AArch64AsmParser.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Line
Count
Source
171
233
                                         unsigned Imm) {
172
233
  assert((Imm & 0x7) == Imm && "Illegal shifted immedate value!");
173
233
  return (getExtendEncoding(ET) << 3) | (Imm & 0x7);
174
233
}
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getArithExtendImm(llvm::AArch64_AM::ShiftExtendType, unsigned int)
175
176
/// getMemDoShift - Extract the "do shift" flag value for load/store
177
/// instructions.
178
0
static inline bool getMemDoShift(unsigned Imm) {
179
0
  return (Imm & 0x1) != 0;
180
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getMemDoShift(unsigned int)
181
182
/// getExtendType - Extract the extend type for the offset operand of
183
/// loads/stores.
184
1.02M
static inline AArch64_AM::ShiftExtendType getMemExtendType(unsigned Imm) {
185
1.02M
  return getExtendType((Imm >> 1) & 0x7);
186
1.02M
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
AArch64InstrInfo.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Line
Count
Source
184
1.02M
static inline AArch64_AM::ShiftExtendType getMemExtendType(unsigned Imm) {
185
1.02M
  return getExtendType((Imm >> 1) & 0x7);
186
1.02M
}
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getMemExtendType(unsigned int)
Line
Count
Source
184
4
static inline AArch64_AM::ShiftExtendType getMemExtendType(unsigned Imm) {
185
4
  return getExtendType((Imm >> 1) & 0x7);
186
4
}
187
188
/// getExtendImm - Encode the extend type and amount for a load/store inst:
189
///   doshift:     should the offset be scaled by the access size
190
///   shifter: 000 ==> uxtb
191
///            001 ==> uxth
192
///            010 ==> uxtw
193
///            011 ==> uxtx
194
///            100 ==> sxtb
195
///            101 ==> sxth
196
///            110 ==> sxtw
197
///            111 ==> sxtx
198
///   {3-1}  = shifter
199
///   {0}  = doshift
200
static inline unsigned getMemExtendImm(AArch64_AM::ShiftExtendType ET,
201
0
                                       bool DoShift) {
202
0
  return (getExtendEncoding(ET) << 1) | unsigned(DoShift);
203
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getMemExtendImm(llvm::AArch64_AM::ShiftExtendType, bool)
204
205
236k
static inline uint64_t ror(uint64_t elt, unsigned size) {
206
236k
  return ((elt & 1) << (size-1)) | (elt >> 1);
207
236k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Line
Count
Source
205
4.41k
static inline uint64_t ror(uint64_t elt, unsigned size) {
206
4.41k
  return ((elt & 1) << (size-1)) | (elt >> 1);
207
4.41k
}
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
AArch64InstrInfo.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Line
Count
Source
205
201k
static inline uint64_t ror(uint64_t elt, unsigned size) {
206
201k
  return ((elt & 1) << (size-1)) | (elt >> 1);
207
201k
}
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
AArch64InstPrinter.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Line
Count
Source
205
30.3k
static inline uint64_t ror(uint64_t elt, unsigned size) {
206
30.3k
  return ((elt & 1) << (size-1)) | (elt >> 1);
207
30.3k
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::ror(unsigned long long, unsigned int)
208
209
/// processLogicalImmediate - Determine if an immediate value can be encoded
210
/// as the immediate operand of a logical instruction for the given register
211
/// size.  If so, return true with "encoding" set to the encoded value in
212
/// the form N:immr:imms.
213
static inline bool processLogicalImmediate(uint64_t Imm, unsigned RegSize,
214
1.71M
                                           uint64_t &Encoding) {
215
1.71M
  if (Imm == 0ULL || 
Imm == ~0ULL1.71M
||
216
1.71M
      
(1.57M
RegSize != 641.57M
&&
217
1.57M
        
(125k
Imm >> RegSize != 0125k
||
Imm == (~0ULL >> (64 - RegSize))118k
)))
218
146k
    return false;
219
1.56M
220
1.56M
  // First, determine the element size.
221
1.56M
  unsigned Size = RegSize;
222
1.56M
223
1.62M
  do {
224
1.62M
    Size /= 2;
225
1.62M
    uint64_t Mask = (1ULL << Size) - 1;
226
1.62M
227
1.62M
    if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
228
1.56M
      Size *= 2;
229
1.56M
      break;
230
1.56M
    }
231
51.8k
  } while (Size > 2);
232
1.56M
233
1.56M
  // Second, determine the rotation to make the element be: 0^m 1^n.
234
1.56M
  uint32_t CTO, I;
235
1.56M
  uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
236
1.56M
  Imm &= Mask;
237
1.56M
238
1.56M
  if (
isShiftedMask_64(Imm)51.8k
) {
239
881k
    I = countTrailingZeros(Imm);
240
881k
    assert(I < 64 && "undefined behavior");
241
881k
    CTO = countTrailingOnes(Imm >> I);
242
18.4E
  } else {
243
18.4E
    Imm |= ~Mask;
244
18.4E
    if (!isShiftedMask_64(~Imm))
245
660k
      return false;
246
18.4E
247
18.4E
    unsigned CLO = countLeadingOnes(Imm);
248
18.4E
    I = 64 - CLO;
249
18.4E
    CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
250
18.4E
  }
251
1.56M
252
1.56M
  // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
253
1.56M
  // to our target value, where I is the number of RORs to go the opposite
254
1.56M
  // direction.
255
18.4E
  assert(Size > I && "I should be smaller than element size");
256
18.4E
  unsigned Immr = (Size - I) & (Size - 1);
257
18.4E
258
18.4E
  // If size has a 1 in the n'th bit, create a value that has zeroes in
259
18.4E
  // bits [0, n] and ones above that.
260
18.4E
  uint64_t NImms = ~(Size-1) << 1;
261
18.4E
262
18.4E
  // Or the CTO value into the low bits, which must be below the Nth bit
263
18.4E
  // bit mentioned above.
264
18.4E
  NImms |= (CTO-1);
265
18.4E
266
18.4E
  // Extract the seventh bit and toggle it to create the N field.
267
18.4E
  unsigned N = ((NImms >> 6) & 1) ^ 1;
268
18.4E
269
18.4E
  Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
270
18.4E
  return true;
271
1.56M
}
AArch64AsmPrinter.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Line
Count
Source
214
4
                                           uint64_t &Encoding) {
215
4
  if (Imm == 0ULL || Imm == ~0ULL ||
216
4
      (RegSize != 64 &&
217
4
        
(0
Imm >> RegSize != 00
||
Imm == (~0ULL >> (64 - RegSize))0
)))
218
0
    return false;
219
4
220
4
  // First, determine the element size.
221
4
  unsigned Size = RegSize;
222
4
223
4
  do {
224
4
    Size /= 2;
225
4
    uint64_t Mask = (1ULL << Size) - 1;
226
4
227
4
    if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
228
4
      Size *= 2;
229
4
      break;
230
4
    }
231
0
  } while (Size > 2);
232
4
233
4
  // Second, determine the rotation to make the element be: 0^m 1^n.
234
4
  uint32_t CTO, I;
235
4
  uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
236
4
  Imm &= Mask;
237
4
238
4
  if (
isShiftedMask_64(Imm)0
) {
239
4
    I = countTrailingZeros(Imm);
240
4
    assert(I < 64 && "undefined behavior");
241
4
    CTO = countTrailingOnes(Imm >> I);
242
18.4E
  } else {
243
18.4E
    Imm |= ~Mask;
244
18.4E
    if (!isShiftedMask_64(~Imm))
245
0
      return false;
246
18.4E
247
18.4E
    unsigned CLO = countLeadingOnes(Imm);
248
18.4E
    I = 64 - CLO;
249
18.4E
    CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
250
18.4E
  }
251
4
252
4
  // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
253
4
  // to our target value, where I is the number of RORs to go the opposite
254
4
  // direction.
255
4
  assert(Size > I && "I should be smaller than element size");
256
0
  unsigned Immr = (Size - I) & (Size - 1);
257
0
258
0
  // If size has a 1 in the n'th bit, create a value that has zeroes in
259
0
  // bits [0, n] and ones above that.
260
0
  uint64_t NImms = ~(Size-1) << 1;
261
0
262
0
  // Or the CTO value into the low bits, which must be below the Nth bit
263
0
  // bit mentioned above.
264
0
  NImms |= (CTO-1);
265
0
266
0
  // Extract the seventh bit and toggle it to create the N field.
267
0
  unsigned N = ((NImms >> 6) & 1) ^ 1;
268
0
269
0
  Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
270
0
  return true;
271
4
}
AArch64ExpandImm.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Line
Count
Source
214
413k
                                           uint64_t &Encoding) {
215
413k
  if (Imm == 0ULL || Imm == ~0ULL ||
216
413k
      (RegSize != 64 &&
217
413k
        
(39.2k
Imm >> RegSize != 039.2k
||
Imm == (~0ULL >> (64 - RegSize))39.2k
)))
218
0
    return false;
219
413k
220
413k
  // First, determine the element size.
221
413k
  unsigned Size = RegSize;
222
413k
223
460k
  do {
224
460k
    Size /= 2;
225
460k
    uint64_t Mask = (1ULL << Size) - 1;
226
460k
227
460k
    if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
228
412k
      Size *= 2;
229
412k
      break;
230
412k
    }
231
48.5k
  } while (Size > 2);
232
413k
233
413k
  // Second, determine the rotation to make the element be: 0^m 1^n.
234
413k
  uint32_t CTO, I;
235
413k
  uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
236
413k
  Imm &= Mask;
237
413k
238
413k
  if (
isShiftedMask_64(Imm)48.5k
) {
239
8.88k
    I = countTrailingZeros(Imm);
240
8.88k
    assert(I < 64 && "undefined behavior");
241
8.88k
    CTO = countTrailingOnes(Imm >> I);
242
39.6k
  } else {
243
39.6k
    Imm |= ~Mask;
244
39.6k
    if (!isShiftedMask_64(~Imm))
245
396k
      return false;
246
18.4E
247
18.4E
    unsigned CLO = countLeadingOnes(Imm);
248
18.4E
    I = 64 - CLO;
249
18.4E
    CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
250
18.4E
  }
251
413k
252
413k
  // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
253
413k
  // to our target value, where I is the number of RORs to go the opposite
254
413k
  // direction.
255
18.4E
  assert(Size > I && "I should be smaller than element size");
256
18.4E
  unsigned Immr = (Size - I) & (Size - 1);
257
18.4E
258
18.4E
  // If size has a 1 in the n'th bit, create a value that has zeroes in
259
18.4E
  // bits [0, n] and ones above that.
260
18.4E
  uint64_t NImms = ~(Size-1) << 1;
261
18.4E
262
18.4E
  // Or the CTO value into the low bits, which must be below the Nth bit
263
18.4E
  // bit mentioned above.
264
18.4E
  NImms |= (CTO-1);
265
18.4E
266
18.4E
  // Extract the seventh bit and toggle it to create the N field.
267
18.4E
  unsigned N = ((NImms >> 6) & 1) ^ 1;
268
18.4E
269
18.4E
  Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
270
18.4E
  return true;
271
413k
}
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
AArch64FastISel.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Line
Count
Source
214
417
                                           uint64_t &Encoding) {
215
417
  if (Imm == 0ULL || Imm == ~0ULL ||
216
417
      (RegSize != 64 &&
217
417
        
(405
Imm >> RegSize != 0405
||
Imm == (~0ULL >> (64 - RegSize))405
)))
218
0
    return false;
219
417
220
417
  // First, determine the element size.
221
417
  unsigned Size = RegSize;
222
417
223
417
  do {
224
417
    Size /= 2;
225
417
    uint64_t Mask = (1ULL << Size) - 1;
226
417
227
417
    if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
228
417
      Size *= 2;
229
417
      break;
230
417
    }
231
0
  } while (Size > 2);
232
417
233
417
  // Second, determine the rotation to make the element be: 0^m 1^n.
234
417
  uint32_t CTO, I;
235
417
  uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
236
417
  Imm &= Mask;
237
417
238
417
  if (
isShiftedMask_64(Imm)0
) {
239
417
    I = countTrailingZeros(Imm);
240
417
    assert(I < 64 && "undefined behavior");
241
417
    CTO = countTrailingOnes(Imm >> I);
242
18.4E
  } else {
243
18.4E
    Imm |= ~Mask;
244
18.4E
    if (!isShiftedMask_64(~Imm))
245
0
      return false;
246
18.4E
247
18.4E
    unsigned CLO = countLeadingOnes(Imm);
248
18.4E
    I = 64 - CLO;
249
18.4E
    CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
250
18.4E
  }
251
417
252
417
  // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
253
417
  // to our target value, where I is the number of RORs to go the opposite
254
417
  // direction.
255
417
  assert(Size > I && "I should be smaller than element size");
256
0
  unsigned Immr = (Size - I) & (Size - 1);
257
0
258
0
  // If size has a 1 in the n'th bit, create a value that has zeroes in
259
0
  // bits [0, n] and ones above that.
260
0
  uint64_t NImms = ~(Size-1) << 1;
261
0
262
0
  // Or the CTO value into the low bits, which must be below the Nth bit
263
0
  // bit mentioned above.
264
0
  NImms |= (CTO-1);
265
0
266
0
  // Extract the seventh bit and toggle it to create the N field.
267
0
  unsigned N = ((NImms >> 6) & 1) ^ 1;
268
0
269
0
  Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
270
0
  return true;
271
417
}
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Line
Count
Source
214
78.9k
                                           uint64_t &Encoding) {
215
78.9k
  if (Imm == 0ULL || Imm == ~0ULL ||
216
78.9k
      
(77.9k
RegSize != 6477.9k
&&
217
77.9k
        
(44.4k
Imm >> RegSize != 044.4k
||
Imm == (~0ULL >> (64 - RegSize))37.3k
)))
218
8.74k
    return false;
219
70.1k
220
70.1k
  // First, determine the element size.
221
70.1k
  unsigned Size = RegSize;
222
70.1k
223
70.8k
  do {
224
70.8k
    Size /= 2;
225
70.8k
    uint64_t Mask = (1ULL << Size) - 1;
226
70.8k
227
70.8k
    if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
228
70.0k
      Size *= 2;
229
70.0k
      break;
230
70.0k
    }
231
784
  } while (Size > 2);
232
70.1k
233
70.1k
  // Second, determine the rotation to make the element be: 0^m 1^n.
234
70.1k
  uint32_t CTO, I;
235
70.1k
  uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
236
70.1k
  Imm &= Mask;
237
70.1k
238
70.1k
  if (
isShiftedMask_64(Imm)784
) {
239
68.8k
    I = countTrailingZeros(Imm);
240
68.8k
    assert(I < 64 && "undefined behavior");
241
68.8k
    CTO = countTrailingOnes(Imm >> I);
242
18.4E
  } else {
243
18.4E
    Imm |= ~Mask;
244
18.4E
    if (!isShiftedMask_64(~Imm))
245
1.10k
      return false;
246
18.4E
247
18.4E
    unsigned CLO = countLeadingOnes(Imm);
248
18.4E
    I = 64 - CLO;
249
18.4E
    CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
250
18.4E
  }
251
70.1k
252
70.1k
  // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
253
70.1k
  // to our target value, where I is the number of RORs to go the opposite
254
70.1k
  // direction.
255
18.4E
  assert(Size > I && "I should be smaller than element size");
256
18.4E
  unsigned Immr = (Size - I) & (Size - 1);
257
18.4E
258
18.4E
  // If size has a 1 in the n'th bit, create a value that has zeroes in
259
18.4E
  // bits [0, n] and ones above that.
260
18.4E
  uint64_t NImms = ~(Size-1) << 1;
261
18.4E
262
18.4E
  // Or the CTO value into the low bits, which must be below the Nth bit
263
18.4E
  // bit mentioned above.
264
18.4E
  NImms |= (CTO-1);
265
18.4E
266
18.4E
  // Extract the seventh bit and toggle it to create the N field.
267
18.4E
  unsigned N = ((NImms >> 6) & 1) ^ 1;
268
18.4E
269
18.4E
  Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
270
18.4E
  return true;
271
70.1k
}
AArch64ISelLowering.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Line
Count
Source
214
41.8k
                                           uint64_t &Encoding) {
215
41.8k
  if (Imm == 0ULL || 
Imm == ~0ULL41.8k
||
216
41.8k
      
(41.8k
RegSize != 6441.8k
&&
217
41.8k
        
(19.2k
Imm >> RegSize != 019.2k
||
Imm == (~0ULL >> (64 - RegSize))19.2k
)))
218
6
    return false;
219
41.8k
220
41.8k
  // First, determine the element size.
221
41.8k
  unsigned Size = RegSize;
222
41.8k
223
42.4k
  do {
224
42.4k
    Size /= 2;
225
42.4k
    uint64_t Mask = (1ULL << Size) - 1;
226
42.4k
227
42.4k
    if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
228
41.8k
      Size *= 2;
229
41.8k
      break;
230
41.8k
    }
231
649
  } while (Size > 2);
232
41.8k
233
41.8k
  // Second, determine the rotation to make the element be: 0^m 1^n.
234
41.8k
  uint32_t CTO, I;
235
41.8k
  uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
236
41.8k
  Imm &= Mask;
237
41.8k
238
41.8k
  if (
isShiftedMask_64(Imm)649
) {
239
40.2k
    I = countTrailingZeros(Imm);
240
40.2k
    assert(I < 64 && "undefined behavior");
241
40.2k
    CTO = countTrailingOnes(Imm >> I);
242
18.4E
  } else {
243
18.4E
    Imm |= ~Mask;
244
18.4E
    if (!isShiftedMask_64(~Imm))
245
1.32k
      return false;
246
18.4E
247
18.4E
    unsigned CLO = countLeadingOnes(Imm);
248
18.4E
    I = 64 - CLO;
249
18.4E
    CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
250
18.4E
  }
251
41.8k
252
41.8k
  // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
253
41.8k
  // to our target value, where I is the number of RORs to go the opposite
254
41.8k
  // direction.
255
18.4E
  assert(Size > I && "I should be smaller than element size");
256
18.4E
  unsigned Immr = (Size - I) & (Size - 1);
257
18.4E
258
18.4E
  // If size has a 1 in the n'th bit, create a value that has zeroes in
259
18.4E
  // bits [0, n] and ones above that.
260
18.4E
  uint64_t NImms = ~(Size-1) << 1;
261
18.4E
262
18.4E
  // Or the CTO value into the low bits, which must be below the Nth bit
263
18.4E
  // bit mentioned above.
264
18.4E
  NImms |= (CTO-1);
265
18.4E
266
18.4E
  // Extract the seventh bit and toggle it to create the N field.
267
18.4E
  unsigned N = ((NImms >> 6) & 1) ^ 1;
268
18.4E
269
18.4E
  Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
270
18.4E
  return true;
271
41.8k
}
AArch64InstrInfo.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Line
Count
Source
214
1.02k
                                           uint64_t &Encoding) {
215
1.02k
  if (Imm == 0ULL || Imm == ~0ULL ||
216
1.02k
      
(1.00k
RegSize != 641.00k
&&
217
1.00k
        
(825
Imm >> RegSize != 0825
||
Imm == (~0ULL >> (64 - RegSize))824
)))
218
18
    return false;
219
1.00k
220
1.00k
  // First, determine the element size.
221
1.00k
  unsigned Size = RegSize;
222
1.00k
223
1.00k
  do {
224
1.00k
    Size /= 2;
225
1.00k
    uint64_t Mask = (1ULL << Size) - 1;
226
1.00k
227
1.00k
    if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
228
1.00k
      Size *= 2;
229
1.00k
      break;
230
1.00k
    }
231
0
  } while (Size > 2);
232
1.00k
233
1.00k
  // Second, determine the rotation to make the element be: 0^m 1^n.
234
1.00k
  uint32_t CTO, I;
235
1.00k
  uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
236
1.00k
  Imm &= Mask;
237
1.00k
238
1.00k
  if (
isShiftedMask_64(Imm)0
) {
239
948
    I = countTrailingZeros(Imm);
240
948
    assert(I < 64 && "undefined behavior");
241
948
    CTO = countTrailingOnes(Imm >> I);
242
18.4E
  } else {
243
18.4E
    Imm |= ~Mask;
244
18.4E
    if (!isShiftedMask_64(~Imm))
245
55
      return false;
246
18.4E
247
18.4E
    unsigned CLO = countLeadingOnes(Imm);
248
18.4E
    I = 64 - CLO;
249
18.4E
    CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
250
18.4E
  }
251
1.00k
252
1.00k
  // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
253
1.00k
  // to our target value, where I is the number of RORs to go the opposite
254
1.00k
  // direction.
255
18.4E
  assert(Size > I && "I should be smaller than element size");
256
18.4E
  unsigned Immr = (Size - I) & (Size - 1);
257
18.4E
258
18.4E
  // If size has a 1 in the n'th bit, create a value that has zeroes in
259
18.4E
  // bits [0, n] and ones above that.
260
18.4E
  uint64_t NImms = ~(Size-1) << 1;
261
18.4E
262
18.4E
  // Or the CTO value into the low bits, which must be below the Nth bit
263
18.4E
  // bit mentioned above.
264
18.4E
  NImms |= (CTO-1);
265
18.4E
266
18.4E
  // Extract the seventh bit and toggle it to create the N field.
267
18.4E
  unsigned N = ((NImms >> 6) & 1) ^ 1;
268
18.4E
269
18.4E
  Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
270
18.4E
  return true;
271
1.00k
}
AArch64InstructionSelector.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Line
Count
Source
214
26.7k
                                           uint64_t &Encoding) {
215
26.7k
  if (Imm == 0ULL || Imm == ~0ULL ||
216
26.7k
      
(26.7k
RegSize != 6426.7k
&&
217
26.7k
        
(21.0k
Imm >> RegSize != 021.0k
||
Imm == (~0ULL >> (64 - RegSize))21.0k
)))
218
5
    return false;
219
26.7k
220
26.7k
  // First, determine the element size.
221
26.7k
  unsigned Size = RegSize;
222
26.7k
223
26.7k
  do {
224
26.7k
    Size /= 2;
225
26.7k
    uint64_t Mask = (1ULL << Size) - 1;
226
26.7k
227
26.7k
    if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
228
26.7k
      Size *= 2;
229
26.7k
      break;
230
26.7k
    }
231
0
  } while (Size > 2);
232
26.7k
233
26.7k
  // Second, determine the rotation to make the element be: 0^m 1^n.
234
26.7k
  uint32_t CTO, I;
235
26.7k
  uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
236
26.7k
  Imm &= Mask;
237
26.7k
238
26.7k
  if (
isShiftedMask_64(Imm)0
) {
239
26.7k
    I = countTrailingZeros(Imm);
240
26.7k
    assert(I < 64 && "undefined behavior");
241
26.7k
    CTO = countTrailingOnes(Imm >> I);
242
18.4E
  } else {
243
18.4E
    Imm |= ~Mask;
244
18.4E
    if (!isShiftedMask_64(~Imm))
245
32
      return false;
246
18.4E
247
18.4E
    unsigned CLO = countLeadingOnes(Imm);
248
18.4E
    I = 64 - CLO;
249
18.4E
    CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
250
18.4E
  }
251
26.7k
252
26.7k
  // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
253
26.7k
  // to our target value, where I is the number of RORs to go the opposite
254
26.7k
  // direction.
255
18.4E
  assert(Size > I && "I should be smaller than element size");
256
18.4E
  unsigned Immr = (Size - I) & (Size - 1);
257
18.4E
258
18.4E
  // If size has a 1 in the n'th bit, create a value that has zeroes in
259
18.4E
  // bits [0, n] and ones above that.
260
18.4E
  uint64_t NImms = ~(Size-1) << 1;
261
18.4E
262
18.4E
  // Or the CTO value into the low bits, which must be below the Nth bit
263
18.4E
  // bit mentioned above.
264
18.4E
  NImms |= (CTO-1);
265
18.4E
266
18.4E
  // Extract the seventh bit and toggle it to create the N field.
267
18.4E
  unsigned N = ((NImms >> 6) & 1) ^ 1;
268
18.4E
269
18.4E
  Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
270
18.4E
  return true;
271
26.7k
}
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Line
Count
Source
214
1.15M
                                           uint64_t &Encoding) {
215
1.15M
  if (Imm == 0ULL || Imm == ~0ULL ||
216
1.15M
      
(1.01M
RegSize != 641.01M
&&
217
1.01M
        
(0
Imm >> RegSize != 00
||
Imm == (~0ULL >> (64 - RegSize))0
)))
218
137k
    return false;
219
1.01M
220
1.01M
  // First, determine the element size.
221
1.01M
  unsigned Size = RegSize;
222
1.01M
223
1.01M
  do {
224
1.01M
    Size /= 2;
225
1.01M
    uint64_t Mask = (1ULL << Size) - 1;
226
1.01M
227
1.01M
    if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
228
1.01M
      Size *= 2;
229
1.01M
      break;
230
1.01M
    }
231
1.61k
  } while (Size > 2);
232
1.01M
233
1.01M
  // Second, determine the rotation to make the element be: 0^m 1^n.
234
1.01M
  uint32_t CTO, I;
235
1.01M
  uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
236
1.01M
  Imm &= Mask;
237
1.01M
238
1.01M
  if (
isShiftedMask_64(Imm)1.61k
) {
239
735k
    I = countTrailingZeros(Imm);
240
735k
    assert(I < 64 && "undefined behavior");
241
735k
    CTO = countTrailingOnes(Imm >> I);
242
18.4E
  } else {
243
18.4E
    Imm |= ~Mask;
244
18.4E
    if (!isShiftedMask_64(~Imm))
245
261k
      return false;
246
18.4E
247
18.4E
    unsigned CLO = countLeadingOnes(Imm);
248
18.4E
    I = 64 - CLO;
249
18.4E
    CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
250
18.4E
  }
251
1.01M
252
1.01M
  // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
253
1.01M
  // to our target value, where I is the number of RORs to go the opposite
254
1.01M
  // direction.
255
18.4E
  assert(Size > I && "I should be smaller than element size");
256
18.4E
  unsigned Immr = (Size - I) & (Size - 1);
257
18.4E
258
18.4E
  // If size has a 1 in the n'th bit, create a value that has zeroes in
259
18.4E
  // bits [0, n] and ones above that.
260
18.4E
  uint64_t NImms = ~(Size-1) << 1;
261
18.4E
262
18.4E
  // Or the CTO value into the low bits, which must be below the Nth bit
263
18.4E
  // bit mentioned above.
264
18.4E
  NImms |= (CTO-1);
265
18.4E
266
18.4E
  // Extract the seventh bit and toggle it to create the N field.
267
18.4E
  unsigned N = ((NImms >> 6) & 1) ^ 1;
268
18.4E
269
18.4E
  Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
270
18.4E
  return true;
271
1.01M
}
AArch64AsmParser.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Line
Count
Source
214
938
                                           uint64_t &Encoding) {
215
938
  if (Imm == 0ULL || 
Imm == ~0ULL934
||
216
938
      
(932
RegSize != 64932
&&
217
932
        
(536
Imm >> RegSize != 0536
||
Imm == (~0ULL >> (64 - RegSize))536
)))
218
8
    return false;
219
930
220
930
  // First, determine the element size.
221
930
  unsigned Size = RegSize;
222
930
223
1.15k
  do {
224
1.15k
    Size /= 2;
225
1.15k
    uint64_t Mask = (1ULL << Size) - 1;
226
1.15k
227
1.15k
    if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
228
916
      Size *= 2;
229
916
      break;
230
916
    }
231
242
  } while (Size > 2);
232
930
233
930
  // Second, determine the rotation to make the element be: 0^m 1^n.
234
930
  uint32_t CTO, I;
235
930
  uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
236
930
  Imm &= Mask;
237
930
238
930
  if (
isShiftedMask_64(Imm)242
) {
239
468
    I = countTrailingZeros(Imm);
240
468
    assert(I < 64 && "undefined behavior");
241
468
    CTO = countTrailingOnes(Imm >> I);
242
18.4E
  } else {
243
18.4E
    Imm |= ~Mask;
244
18.4E
    if (!isShiftedMask_64(~Imm))
245
74
      return false;
246
18.4E
247
18.4E
    unsigned CLO = countLeadingOnes(Imm);
248
18.4E
    I = 64 - CLO;
249
18.4E
    CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
250
18.4E
  }
251
930
252
930
  // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
253
930
  // to our target value, where I is the number of RORs to go the opposite
254
930
  // direction.
255
930
  assert(Size > I && "I should be smaller than element size");
256
168
  unsigned Immr = (Size - I) & (Size - 1);
257
168
258
168
  // If size has a 1 in the n'th bit, create a value that has zeroes in
259
168
  // bits [0, n] and ones above that.
260
168
  uint64_t NImms = ~(Size-1) << 1;
261
168
262
168
  // Or the CTO value into the low bits, which must be below the Nth bit
263
168
  // bit mentioned above.
264
168
  NImms |= (CTO-1);
265
168
266
168
  // Extract the seventh bit and toggle it to create the N field.
267
168
  unsigned N = ((NImms >> 6) & 1) ^ 1;
268
168
269
168
  Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
270
168
  return true;
271
930
}
AArch64InstPrinter.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Line
Count
Source
214
10
                                           uint64_t &Encoding) {
215
10
  if (Imm == 0ULL || Imm == ~0ULL ||
216
10
      (RegSize != 64 &&
217
10
        
(0
Imm >> RegSize != 00
||
Imm == (~0ULL >> (64 - RegSize))0
)))
218
0
    return false;
219
10
220
10
  // First, determine the element size.
221
10
  unsigned Size = RegSize;
222
10
223
14
  do {
224
14
    Size /= 2;
225
14
    uint64_t Mask = (1ULL << Size) - 1;
226
14
227
14
    if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
228
10
      Size *= 2;
229
10
      break;
230
10
    }
231
4
  } while (Size > 2);
232
10
233
10
  // Second, determine the rotation to make the element be: 0^m 1^n.
234
10
  uint32_t CTO, I;
235
10
  uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
236
10
  Imm &= Mask;
237
10
238
10
  if (
isShiftedMask_64(Imm)4
) {
239
4
    I = countTrailingZeros(Imm);
240
4
    assert(I < 64 && "undefined behavior");
241
4
    CTO = countTrailingOnes(Imm >> I);
242
4
  } else {
243
0
    Imm |= ~Mask;
244
0
    if (!isShiftedMask_64(~Imm))
245
0
      return false;
246
0
247
0
    unsigned CLO = countLeadingOnes(Imm);
248
0
    I = 64 - CLO;
249
0
    CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
250
0
  }
251
10
252
10
  // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
253
10
  // to our target value, where I is the number of RORs to go the opposite
254
10
  // direction.
255
10
  assert(Size > I && "I should be smaller than element size");
256
4
  unsigned Immr = (Size - I) & (Size - 1);
257
4
258
4
  // If size has a 1 in the n'th bit, create a value that has zeroes in
259
4
  // bits [0, n] and ones above that.
260
4
  uint64_t NImms = ~(Size-1) << 1;
261
4
262
4
  // Or the CTO value into the low bits, which must be below the Nth bit
263
4
  // bit mentioned above.
264
4
  NImms |= (CTO-1);
265
4
266
4
  // Extract the seventh bit and toggle it to create the N field.
267
4
  unsigned N = ((NImms >> 6) & 1) ^ 1;
268
4
269
4
  Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
270
4
  return true;
271
10
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::processLogicalImmediate(unsigned long long, unsigned int, unsigned long long&)
272
273
/// isLogicalImmediate - Return true if the immediate is valid for a logical
274
/// immediate instruction of the given register size. Return false otherwise.
275
1.25M
static inline bool isLogicalImmediate(uint64_t imm, unsigned regSize) {
276
1.25M
  uint64_t encoding;
277
1.25M
  return processLogicalImmediate(imm, regSize, encoding);
278
1.25M
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
AArch64FastISel.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
275
204
static inline bool isLogicalImmediate(uint64_t imm, unsigned regSize) {
276
204
  uint64_t encoding;
277
204
  return processLogicalImmediate(imm, regSize, encoding);
278
204
}
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
275
49.7k
static inline bool isLogicalImmediate(uint64_t imm, unsigned regSize) {
276
49.7k
  uint64_t encoding;
277
49.7k
  return processLogicalImmediate(imm, regSize, encoding);
278
49.7k
}
AArch64ISelLowering.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
275
41.6k
static inline bool isLogicalImmediate(uint64_t imm, unsigned regSize) {
276
41.6k
  uint64_t encoding;
277
41.6k
  return processLogicalImmediate(imm, regSize, encoding);
278
41.6k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
AArch64InstructionSelector.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
275
6.85k
static inline bool isLogicalImmediate(uint64_t imm, unsigned regSize) {
276
6.85k
  uint64_t encoding;
277
6.85k
  return processLogicalImmediate(imm, regSize, encoding);
278
6.85k
}
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
275
1.15M
static inline bool isLogicalImmediate(uint64_t imm, unsigned regSize) {
276
1.15M
  uint64_t encoding;
277
1.15M
  return processLogicalImmediate(imm, regSize, encoding);
278
1.15M
}
AArch64AsmParser.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
275
601
static inline bool isLogicalImmediate(uint64_t imm, unsigned regSize) {
276
601
  uint64_t encoding;
277
601
  return processLogicalImmediate(imm, regSize, encoding);
278
601
}
AArch64InstPrinter.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
275
10
static inline bool isLogicalImmediate(uint64_t imm, unsigned regSize) {
276
10
  uint64_t encoding;
277
10
  return processLogicalImmediate(imm, regSize, encoding);
278
10
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isLogicalImmediate(unsigned long long, unsigned int)
279
280
/// encodeLogicalImmediate - Return the encoded immediate value for a logical
281
/// immediate instruction of the given register size.
282
50.4k
static inline uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize) {
283
50.4k
  uint64_t encoding = 0;
284
50.4k
  bool res = processLogicalImmediate(imm, regSize, encoding);
285
50.4k
  assert(res && "invalid logical immediate");
286
50.4k
  (void)res;
287
50.4k
  return encoding;
288
50.4k
}
AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
282
4
static inline uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize) {
283
4
  uint64_t encoding = 0;
284
4
  bool res = processLogicalImmediate(imm, regSize, encoding);
285
4
  assert(res && "invalid logical immediate");
286
4
  (void)res;
287
4
  return encoding;
288
4
}
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
AArch64FastISel.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
282
213
static inline uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize) {
283
213
  uint64_t encoding = 0;
284
213
  bool res = processLogicalImmediate(imm, regSize, encoding);
285
213
  assert(res && "invalid logical immediate");
286
213
  (void)res;
287
213
  return encoding;
288
213
}
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
282
29.1k
static inline uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize) {
283
29.1k
  uint64_t encoding = 0;
284
29.1k
  bool res = processLogicalImmediate(imm, regSize, encoding);
285
29.1k
  assert(res && "invalid logical immediate");
286
29.1k
  (void)res;
287
29.1k
  return encoding;
288
29.1k
}
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
282
165
static inline uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize) {
283
165
  uint64_t encoding = 0;
284
165
  bool res = processLogicalImmediate(imm, regSize, encoding);
285
165
  assert(res && "invalid logical immediate");
286
165
  (void)res;
287
165
  return encoding;
288
165
}
AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
282
553
static inline uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize) {
283
553
  uint64_t encoding = 0;
284
553
  bool res = processLogicalImmediate(imm, regSize, encoding);
285
553
  assert(res && "invalid logical immediate");
286
553
  (void)res;
287
553
  return encoding;
288
553
}
AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
282
19.9k
static inline uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize) {
283
19.9k
  uint64_t encoding = 0;
284
19.9k
  bool res = processLogicalImmediate(imm, regSize, encoding);
285
19.9k
  assert(res && "invalid logical immediate");
286
19.9k
  (void)res;
287
19.9k
  return encoding;
288
19.9k
}
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
AArch64AsmParser.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
282
337
static inline uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize) {
283
337
  uint64_t encoding = 0;
284
337
  bool res = processLogicalImmediate(imm, regSize, encoding);
285
337
  assert(res && "invalid logical immediate");
286
337
  (void)res;
287
337
  return encoding;
288
337
}
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeLogicalImmediate(unsigned long long, unsigned int)
289
290
/// decodeLogicalImmediate - Decode a logical immediate value in the form
291
/// "N:immr:imms" (where the immr and imms fields are each 6 bits) into the
292
/// integer value it represents with regSize bits.
293
29.5k
static inline uint64_t decodeLogicalImmediate(uint64_t val, unsigned regSize) {
294
29.5k
  // Extract the N, imms, and immr fields.
295
29.5k
  unsigned N = (val >> 12) & 1;
296
29.5k
  unsigned immr = (val >> 6) & 0x3f;
297
29.5k
  unsigned imms = val & 0x3f;
298
29.5k
299
29.5k
  assert((regSize == 64 || N == 0) && "undefined logical immediate encoding");
300
29.5k
  int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f));
301
29.5k
  assert(len >= 0 && "undefined logical immediate encoding");
302
29.5k
  unsigned size = (1 << len);
303
29.5k
  unsigned R = immr & (size - 1);
304
29.5k
  unsigned S = imms & (size - 1);
305
29.5k
  assert(S != size - 1 && "undefined logical immediate encoding");
306
29.5k
  uint64_t pattern = (1ULL << (S + 1)) - 1;
307
266k
  for (unsigned i = 0; i < R; 
++i236k
)
308
236k
    pattern = ror(pattern, size);
309
29.5k
310
29.5k
  // Replicate the pattern to fill the regSize.
311
30.8k
  while (size != regSize) {
312
1.25k
    pattern |= (pattern << size);
313
1.25k
    size *= 2;
314
1.25k
  }
315
29.5k
  return pattern;
316
29.5k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
293
238
static inline uint64_t decodeLogicalImmediate(uint64_t val, unsigned regSize) {
294
238
  // Extract the N, imms, and immr fields.
295
238
  unsigned N = (val >> 12) & 1;
296
238
  unsigned immr = (val >> 6) & 0x3f;
297
238
  unsigned imms = val & 0x3f;
298
238
299
238
  assert((regSize == 64 || N == 0) && "undefined logical immediate encoding");
300
238
  int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f));
301
238
  assert(len >= 0 && "undefined logical immediate encoding");
302
238
  unsigned size = (1 << len);
303
238
  unsigned R = immr & (size - 1);
304
238
  unsigned S = imms & (size - 1);
305
238
  assert(S != size - 1 && "undefined logical immediate encoding");
306
238
  uint64_t pattern = (1ULL << (S + 1)) - 1;
307
4.65k
  for (unsigned i = 0; i < R; 
++i4.41k
)
308
4.41k
    pattern = ror(pattern, size);
309
238
310
238
  // Replicate the pattern to fill the regSize.
311
286
  while (size != regSize) {
312
48
    pattern |= (pattern << size);
313
48
    size *= 2;
314
48
  }
315
238
  return pattern;
316
238
}
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
293
27.5k
static inline uint64_t decodeLogicalImmediate(uint64_t val, unsigned regSize) {
294
27.5k
  // Extract the N, imms, and immr fields.
295
27.5k
  unsigned N = (val >> 12) & 1;
296
27.5k
  unsigned immr = (val >> 6) & 0x3f;
297
27.5k
  unsigned imms = val & 0x3f;
298
27.5k
299
27.5k
  assert((regSize == 64 || N == 0) && "undefined logical immediate encoding");
300
27.5k
  int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f));
301
27.5k
  assert(len >= 0 && "undefined logical immediate encoding");
302
27.5k
  unsigned size = (1 << len);
303
27.5k
  unsigned R = immr & (size - 1);
304
27.5k
  unsigned S = imms & (size - 1);
305
27.5k
  assert(S != size - 1 && "undefined logical immediate encoding");
306
27.5k
  uint64_t pattern = (1ULL << (S + 1)) - 1;
307
229k
  for (unsigned i = 0; i < R; 
++i201k
)
308
201k
    pattern = ror(pattern, size);
309
27.5k
310
27.5k
  // Replicate the pattern to fill the regSize.
311
27.5k
  while (size != regSize) {
312
1
    pattern |= (pattern << size);
313
1
    size *= 2;
314
1
  }
315
27.5k
  return pattern;
316
27.5k
}
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Line
Count
Source
293
1.79k
static inline uint64_t decodeLogicalImmediate(uint64_t val, unsigned regSize) {
294
1.79k
  // Extract the N, imms, and immr fields.
295
1.79k
  unsigned N = (val >> 12) & 1;
296
1.79k
  unsigned immr = (val >> 6) & 0x3f;
297
1.79k
  unsigned imms = val & 0x3f;
298
1.79k
299
1.79k
  assert((regSize == 64 || N == 0) && "undefined logical immediate encoding");
300
1.79k
  int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f));
301
1.79k
  assert(len >= 0 && "undefined logical immediate encoding");
302
1.79k
  unsigned size = (1 << len);
303
1.79k
  unsigned R = immr & (size - 1);
304
1.79k
  unsigned S = imms & (size - 1);
305
1.79k
  assert(S != size - 1 && "undefined logical immediate encoding");
306
1.79k
  uint64_t pattern = (1ULL << (S + 1)) - 1;
307
32.1k
  for (unsigned i = 0; i < R; 
++i30.3k
)
308
30.3k
    pattern = ror(pattern, size);
309
1.79k
310
1.79k
  // Replicate the pattern to fill the regSize.
311
3.00k
  while (size != regSize) {
312
1.20k
    pattern |= (pattern << size);
313
1.20k
    size *= 2;
314
1.20k
  }
315
1.79k
  return pattern;
316
1.79k
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeLogicalImmediate(unsigned long long, unsigned int)
317
318
/// isValidDecodeLogicalImmediate - Check to see if the logical immediate value
319
/// in the form "N:immr:imms" (where the immr and imms fields are each 6 bits)
320
/// is a valid encoding for an integer value with regSize bits.
321
static inline bool isValidDecodeLogicalImmediate(uint64_t val,
322
0
                                                 unsigned regSize) {
323
0
  // Extract the N and imms fields needed for checking.
324
0
  unsigned N = (val >> 12) & 1;
325
0
  unsigned imms = val & 0x3f;
326
0
327
0
  if (regSize == 32 && N != 0) // undefined logical immediate encoding
328
0
    return false;
329
0
  int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f));
330
0
  if (len < 0) // undefined logical immediate encoding
331
0
    return false;
332
0
  unsigned size = (1 << len);
333
0
  unsigned S = imms & (size - 1);
334
0
  if (S == size - 1) // undefined logical immediate encoding
335
0
    return false;
336
0
337
0
  return true;
338
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isValidDecodeLogicalImmediate(unsigned long long, unsigned int)
339
340
//===----------------------------------------------------------------------===//
341
// Floating-point Immediates
342
//
343
1.85k
static inline float getFPImmFloat(unsigned Imm) {
344
1.85k
  // We expect an 8-bit binary encoding of a floating-point number here.
345
1.85k
346
1.85k
  uint8_t Sign = (Imm >> 7) & 0x1;
347
1.85k
  uint8_t Exp = (Imm >> 4) & 0x7;
348
1.85k
  uint8_t Mantissa = Imm & 0xf;
349
1.85k
350
1.85k
  //   8-bit FP    IEEE Float Encoding
351
1.85k
  //   abcd efgh   aBbbbbbc defgh000 00000000 00000000
352
1.85k
  //
353
1.85k
  // where B = NOT(b);
354
1.85k
355
1.85k
  uint32_t I = 0;
356
1.85k
  I |= Sign << 31;
357
1.85k
  I |= ((Exp & 0x4) != 0 ? 
0972
:
1884
) << 30;
358
1.85k
  I |= ((Exp & 0x4) != 0 ? 
0x1f972
:
0884
) << 25;
359
1.85k
  I |= (Exp & 0x3) << 23;
360
1.85k
  I |= Mantissa << 19;
361
1.85k
  return bit_cast<float>(I);
362
1.85k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
AArch64AsmParser.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Line
Count
Source
343
6
static inline float getFPImmFloat(unsigned Imm) {
344
6
  // We expect an 8-bit binary encoding of a floating-point number here.
345
6
346
6
  uint8_t Sign = (Imm >> 7) & 0x1;
347
6
  uint8_t Exp = (Imm >> 4) & 0x7;
348
6
  uint8_t Mantissa = Imm & 0xf;
349
6
350
6
  //   8-bit FP    IEEE Float Encoding
351
6
  //   abcd efgh   aBbbbbbc defgh000 00000000 00000000
352
6
  //
353
6
  // where B = NOT(b);
354
6
355
6
  uint32_t I = 0;
356
6
  I |= Sign << 31;
357
6
  I |= ((Exp & 0x4) != 0 ? 0 : 
10
) << 30;
358
6
  I |= ((Exp & 0x4) != 0 ? 0x1f : 
00
) << 25;
359
6
  I |= (Exp & 0x3) << 23;
360
6
  I |= Mantissa << 19;
361
6
  return bit_cast<float>(I);
362
6
}
AArch64InstPrinter.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Line
Count
Source
343
1.85k
static inline float getFPImmFloat(unsigned Imm) {
344
1.85k
  // We expect an 8-bit binary encoding of a floating-point number here.
345
1.85k
346
1.85k
  uint8_t Sign = (Imm >> 7) & 0x1;
347
1.85k
  uint8_t Exp = (Imm >> 4) & 0x7;
348
1.85k
  uint8_t Mantissa = Imm & 0xf;
349
1.85k
350
1.85k
  //   8-bit FP    IEEE Float Encoding
351
1.85k
  //   abcd efgh   aBbbbbbc defgh000 00000000 00000000
352
1.85k
  //
353
1.85k
  // where B = NOT(b);
354
1.85k
355
1.85k
  uint32_t I = 0;
356
1.85k
  I |= Sign << 31;
357
1.85k
  I |= ((Exp & 0x4) != 0 ? 
0966
:
1884
) << 30;
358
1.85k
  I |= ((Exp & 0x4) != 0 ? 
0x1f966
:
0884
) << 25;
359
1.85k
  I |= (Exp & 0x3) << 23;
360
1.85k
  I |= Mantissa << 19;
361
1.85k
  return bit_cast<float>(I);
362
1.85k
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getFPImmFloat(unsigned int)
363
364
/// getFP16Imm - Return an 8-bit floating-point version of the 16-bit
365
/// floating-point value. If the value cannot be represented as an 8-bit
366
/// floating-point value, then return -1.
367
65
static inline int getFP16Imm(const APInt &Imm) {
368
65
  uint32_t Sign = Imm.lshr(15).getZExtValue() & 1;
369
65
  int32_t Exp = (Imm.lshr(10).getSExtValue() & 0x1f) - 15;  // -14 to 15
370
65
  int32_t Mantissa = Imm.getZExtValue() & 0x3ff;  // 10 bits
371
65
372
65
  // We can handle 4 bits of mantissa.
373
65
  // mantissa = (16+UInt(e:f:g:h))/16.
374
65
  if (Mantissa & 0x3f)
375
4
    return -1;
376
61
  Mantissa >>= 6;
377
61
378
61
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
379
61
  if (Exp < -3 || 
Exp > 443
)
380
21
    return -1;
381
40
  Exp = ((Exp+3) & 0x7) ^ 4;
382
40
383
40
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
384
40
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Line
Count
Source
367
20
static inline int getFP16Imm(const APInt &Imm) {
368
20
  uint32_t Sign = Imm.lshr(15).getZExtValue() & 1;
369
20
  int32_t Exp = (Imm.lshr(10).getSExtValue() & 0x1f) - 15;  // -14 to 15
370
20
  int32_t Mantissa = Imm.getZExtValue() & 0x3ff;  // 10 bits
371
20
372
20
  // We can handle 4 bits of mantissa.
373
20
  // mantissa = (16+UInt(e:f:g:h))/16.
374
20
  if (Mantissa & 0x3f)
375
0
    return -1;
376
20
  Mantissa >>= 6;
377
20
378
20
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
379
20
  if (Exp < -3 || Exp > 4)
380
0
    return -1;
381
20
  Exp = ((Exp+3) & 0x7) ^ 4;
382
20
383
20
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
384
20
}
AArch64ISelLowering.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Line
Count
Source
367
45
static inline int getFP16Imm(const APInt &Imm) {
368
45
  uint32_t Sign = Imm.lshr(15).getZExtValue() & 1;
369
45
  int32_t Exp = (Imm.lshr(10).getSExtValue() & 0x1f) - 15;  // -14 to 15
370
45
  int32_t Mantissa = Imm.getZExtValue() & 0x3ff;  // 10 bits
371
45
372
45
  // We can handle 4 bits of mantissa.
373
45
  // mantissa = (16+UInt(e:f:g:h))/16.
374
45
  if (Mantissa & 0x3f)
375
4
    return -1;
376
41
  Mantissa >>= 6;
377
41
378
41
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
379
41
  if (Exp < -3 || 
Exp > 423
)
380
21
    return -1;
381
20
  Exp = ((Exp+3) & 0x7) ^ 4;
382
20
383
20
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
384
20
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APInt const&)
385
386
20
static inline int getFP16Imm(const APFloat &FPImm) {
387
20
  return getFP16Imm(FPImm.bitcastToAPInt());
388
20
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Line
Count
Source
386
20
static inline int getFP16Imm(const APFloat &FPImm) {
387
20
  return getFP16Imm(FPImm.bitcastToAPInt());
388
20
}
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getFP16Imm(llvm::APFloat const&)
389
390
/// getFP32Imm - Return an 8-bit floating-point version of the 32-bit
391
/// floating-point value. If the value cannot be represented as an 8-bit
392
/// floating-point value, then return -1.
393
19.7k
static inline int getFP32Imm(const APInt &Imm) {
394
19.7k
  uint32_t Sign = Imm.lshr(31).getZExtValue() & 1;
395
19.7k
  int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127;  // -126 to 127
396
19.7k
  int64_t Mantissa = Imm.getZExtValue() & 0x7fffff;  // 23 bits
397
19.7k
398
19.7k
  // We can handle 4 bits of mantissa.
399
19.7k
  // mantissa = (16+UInt(e:f:g:h))/16.
400
19.7k
  if (Mantissa & 0x7ffff)
401
13.7k
    return -1;
402
5.99k
  Mantissa >>= 19;
403
5.99k
  if ((Mantissa & 0xf) != Mantissa)
404
0
    return -1;
405
5.99k
406
5.99k
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
407
5.99k
  if (Exp < -3 || 
Exp > 45.21k
)
408
1.41k
    return -1;
409
4.58k
  Exp = ((Exp+3) & 0x7) ^ 4;
410
4.58k
411
4.58k
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
412
4.58k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
AArch64FastISel.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Line
Count
Source
393
11
static inline int getFP32Imm(const APInt &Imm) {
394
11
  uint32_t Sign = Imm.lshr(31).getZExtValue() & 1;
395
11
  int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127;  // -126 to 127
396
11
  int64_t Mantissa = Imm.getZExtValue() & 0x7fffff;  // 23 bits
397
11
398
11
  // We can handle 4 bits of mantissa.
399
11
  // mantissa = (16+UInt(e:f:g:h))/16.
400
11
  if (Mantissa & 0x7ffff)
401
2
    return -1;
402
9
  Mantissa >>= 19;
403
9
  if ((Mantissa & 0xf) != Mantissa)
404
0
    return -1;
405
9
406
9
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
407
9
  if (Exp < -3 || Exp > 4)
408
1
    return -1;
409
8
  Exp = ((Exp+3) & 0x7) ^ 4;
410
8
411
8
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
412
8
}
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Line
Count
Source
393
3.52k
static inline int getFP32Imm(const APInt &Imm) {
394
3.52k
  uint32_t Sign = Imm.lshr(31).getZExtValue() & 1;
395
3.52k
  int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127;  // -126 to 127
396
3.52k
  int64_t Mantissa = Imm.getZExtValue() & 0x7fffff;  // 23 bits
397
3.52k
398
3.52k
  // We can handle 4 bits of mantissa.
399
3.52k
  // mantissa = (16+UInt(e:f:g:h))/16.
400
3.52k
  if (Mantissa & 0x7ffff)
401
1.84k
    return -1;
402
1.68k
  Mantissa >>= 19;
403
1.68k
  if ((Mantissa & 0xf) != Mantissa)
404
0
    return -1;
405
1.68k
406
1.68k
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
407
1.68k
  if (Exp < -3 || 
Exp > 41.67k
)
408
148
    return -1;
409
1.53k
  Exp = ((Exp+3) & 0x7) ^ 4;
410
1.53k
411
1.53k
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
412
1.53k
}
AArch64ISelLowering.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Line
Count
Source
393
7.08k
static inline int getFP32Imm(const APInt &Imm) {
394
7.08k
  uint32_t Sign = Imm.lshr(31).getZExtValue() & 1;
395
7.08k
  int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127;  // -126 to 127
396
7.08k
  int64_t Mantissa = Imm.getZExtValue() & 0x7fffff;  // 23 bits
397
7.08k
398
7.08k
  // We can handle 4 bits of mantissa.
399
7.08k
  // mantissa = (16+UInt(e:f:g:h))/16.
400
7.08k
  if (Mantissa & 0x7ffff)
401
3.98k
    return -1;
402
3.10k
  Mantissa >>= 19;
403
3.10k
  if ((Mantissa & 0xf) != Mantissa)
404
0
    return -1;
405
3.10k
406
3.10k
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
407
3.10k
  if (Exp < -3 || 
Exp > 42.44k
)
408
989
    return -1;
409
2.11k
  Exp = ((Exp+3) & 0x7) ^ 4;
410
2.11k
411
2.11k
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
412
2.11k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
AArch64InstructionSelector.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Line
Count
Source
393
9.13k
static inline int getFP32Imm(const APInt &Imm) {
394
9.13k
  uint32_t Sign = Imm.lshr(31).getZExtValue() & 1;
395
9.13k
  int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127;  // -126 to 127
396
9.13k
  int64_t Mantissa = Imm.getZExtValue() & 0x7fffff;  // 23 bits
397
9.13k
398
9.13k
  // We can handle 4 bits of mantissa.
399
9.13k
  // mantissa = (16+UInt(e:f:g:h))/16.
400
9.13k
  if (Mantissa & 0x7ffff)
401
7.93k
    return -1;
402
1.19k
  Mantissa >>= 19;
403
1.19k
  if ((Mantissa & 0xf) != Mantissa)
404
0
    return -1;
405
1.19k
406
1.19k
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
407
1.19k
  if (Exp < -3 || 
Exp > 41.08k
)
408
272
    return -1;
409
924
  Exp = ((Exp+3) & 0x7) ^ 4;
410
924
411
924
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
412
924
}
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APInt const&)
413
414
12.6k
static inline int getFP32Imm(const APFloat &FPImm) {
415
12.6k
  return getFP32Imm(FPImm.bitcastToAPInt());
416
12.6k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
AArch64FastISel.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Line
Count
Source
414
11
static inline int getFP32Imm(const APFloat &FPImm) {
415
11
  return getFP32Imm(FPImm.bitcastToAPInt());
416
11
}
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Line
Count
Source
414
3.52k
static inline int getFP32Imm(const APFloat &FPImm) {
415
3.52k
  return getFP32Imm(FPImm.bitcastToAPInt());
416
3.52k
}
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
AArch64InstructionSelector.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Line
Count
Source
414
9.13k
static inline int getFP32Imm(const APFloat &FPImm) {
415
9.13k
  return getFP32Imm(FPImm.bitcastToAPInt());
416
9.13k
}
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getFP32Imm(llvm::APFloat const&)
417
418
/// getFP64Imm - Return an 8-bit floating-point version of the 64-bit
419
/// floating-point value. If the value cannot be represented as an 8-bit
420
/// floating-point value, then return -1.
421
38.2k
static inline int getFP64Imm(const APInt &Imm) {
422
38.2k
  uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
423
38.2k
  int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023;   // -1022 to 1023
424
38.2k
  uint64_t Mantissa = Imm.getZExtValue() & 0xfffffffffffffULL;
425
38.2k
426
38.2k
  // We can handle 4 bits of mantissa.
427
38.2k
  // mantissa = (16+UInt(e:f:g:h))/16.
428
38.2k
  if (Mantissa & 0xffffffffffffULL)
429
17.1k
    return -1;
430
21.0k
  Mantissa >>= 48;
431
21.0k
  if ((Mantissa & 0xf) != Mantissa)
432
0
    return -1;
433
21.0k
434
21.0k
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
435
21.0k
  if (Exp < -3 || 
Exp > 419.4k
)
436
2.65k
    return -1;
437
18.4k
  Exp = ((Exp+3) & 0x7) ^ 4;
438
18.4k
439
18.4k
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
440
18.4k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
AArch64FastISel.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Line
Count
Source
421
7
static inline int getFP64Imm(const APInt &Imm) {
422
7
  uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
423
7
  int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023;   // -1022 to 1023
424
7
  uint64_t Mantissa = Imm.getZExtValue() & 0xfffffffffffffULL;
425
7
426
7
  // We can handle 4 bits of mantissa.
427
7
  // mantissa = (16+UInt(e:f:g:h))/16.
428
7
  if (Mantissa & 0xffffffffffffULL)
429
4
    return -1;
430
3
  Mantissa >>= 48;
431
3
  if ((Mantissa & 0xf) != Mantissa)
432
0
    return -1;
433
3
434
3
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
435
3
  if (Exp < -3 || Exp > 4)
436
1
    return -1;
437
2
  Exp = ((Exp+3) & 0x7) ^ 4;
438
2
439
2
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
440
2
}
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Line
Count
Source
421
3.68k
static inline int getFP64Imm(const APInt &Imm) {
422
3.68k
  uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
423
3.68k
  int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023;   // -1022 to 1023
424
3.68k
  uint64_t Mantissa = Imm.getZExtValue() & 0xfffffffffffffULL;
425
3.68k
426
3.68k
  // We can handle 4 bits of mantissa.
427
3.68k
  // mantissa = (16+UInt(e:f:g:h))/16.
428
3.68k
  if (Mantissa & 0xffffffffffffULL)
429
697
    return -1;
430
2.99k
  Mantissa >>= 48;
431
2.99k
  if ((Mantissa & 0xf) != Mantissa)
432
0
    return -1;
433
2.99k
434
2.99k
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
435
2.99k
  if (Exp < -3 || 
Exp > 42.95k
)
436
268
    return -1;
437
2.72k
  Exp = ((Exp+3) & 0x7) ^ 4;
438
2.72k
439
2.72k
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
440
2.72k
}
AArch64ISelLowering.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Line
Count
Source
421
16.2k
static inline int getFP64Imm(const APInt &Imm) {
422
16.2k
  uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
423
16.2k
  int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023;   // -1022 to 1023
424
16.2k
  uint64_t Mantissa = Imm.getZExtValue() & 0xfffffffffffffULL;
425
16.2k
426
16.2k
  // We can handle 4 bits of mantissa.
427
16.2k
  // mantissa = (16+UInt(e:f:g:h))/16.
428
16.2k
  if (Mantissa & 0xffffffffffffULL)
429
10.5k
    return -1;
430
5.63k
  Mantissa >>= 48;
431
5.63k
  if ((Mantissa & 0xf) != Mantissa)
432
0
    return -1;
433
5.63k
434
5.63k
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
435
5.63k
  if (Exp < -3 || 
Exp > 44.21k
)
436
1.93k
    return -1;
437
3.70k
  Exp = ((Exp+3) & 0x7) ^ 4;
438
3.70k
439
3.70k
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
440
3.70k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
AArch64InstructionSelector.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Line
Count
Source
421
11.8k
static inline int getFP64Imm(const APInt &Imm) {
422
11.8k
  uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
423
11.8k
  int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023;   // -1022 to 1023
424
11.8k
  uint64_t Mantissa = Imm.getZExtValue() & 0xfffffffffffffULL;
425
11.8k
426
11.8k
  // We can handle 4 bits of mantissa.
427
11.8k
  // mantissa = (16+UInt(e:f:g:h))/16.
428
11.8k
  if (Mantissa & 0xffffffffffffULL)
429
5.84k
    return -1;
430
6.00k
  Mantissa >>= 48;
431
6.00k
  if ((Mantissa & 0xf) != Mantissa)
432
0
    return -1;
433
6.00k
434
6.00k
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
435
6.00k
  if (Exp < -3 || 
Exp > 45.92k
)
436
338
    return -1;
437
5.66k
  Exp = ((Exp+3) & 0x7) ^ 4;
438
5.66k
439
5.66k
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
440
5.66k
}
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
AArch64AsmParser.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Line
Count
Source
421
6.44k
static inline int getFP64Imm(const APInt &Imm) {
422
6.44k
  uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
423
6.44k
  int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023;   // -1022 to 1023
424
6.44k
  uint64_t Mantissa = Imm.getZExtValue() & 0xfffffffffffffULL;
425
6.44k
426
6.44k
  // We can handle 4 bits of mantissa.
427
6.44k
  // mantissa = (16+UInt(e:f:g:h))/16.
428
6.44k
  if (Mantissa & 0xffffffffffffULL)
429
4
    return -1;
430
6.43k
  Mantissa >>= 48;
431
6.43k
  if ((Mantissa & 0xf) != Mantissa)
432
0
    return -1;
433
6.43k
434
6.43k
  // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3
435
6.43k
  if (Exp < -3 || 
Exp > 46.38k
)
436
107
    return -1;
437
6.33k
  Exp = ((Exp+3) & 0x7) ^ 4;
438
6.33k
439
6.33k
  return ((int)Sign << 7) | (Exp << 4) | Mantissa;
440
6.33k
}
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APInt const&)
441
442
15.5k
static inline int getFP64Imm(const APFloat &FPImm) {
443
15.5k
  return getFP64Imm(FPImm.bitcastToAPInt());
444
15.5k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
AArch64FastISel.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Line
Count
Source
442
7
static inline int getFP64Imm(const APFloat &FPImm) {
443
7
  return getFP64Imm(FPImm.bitcastToAPInt());
444
7
}
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Line
Count
Source
442
3.68k
static inline int getFP64Imm(const APFloat &FPImm) {
443
3.68k
  return getFP64Imm(FPImm.bitcastToAPInt());
444
3.68k
}
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
AArch64InstructionSelector.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Line
Count
Source
442
11.8k
static inline int getFP64Imm(const APFloat &FPImm) {
443
11.8k
  return getFP64Imm(FPImm.bitcastToAPInt());
444
11.8k
}
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::getFP64Imm(llvm::APFloat const&)
445
446
//===--------------------------------------------------------------------===//
447
// AdvSIMD Modified Immediates
448
//===--------------------------------------------------------------------===//
449
450
// 0x00 0x00 0x00 abcdefgh 0x00 0x00 0x00 abcdefgh
451
178k
static inline bool isAdvSIMDModImmType1(uint64_t Imm) {
452
178k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
453
178k
         
((Imm & 0xffffff00ffffff00ULL) == 0)57.8k
;
454
178k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Line
Count
Source
451
178k
static inline bool isAdvSIMDModImmType1(uint64_t Imm) {
452
178k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
453
178k
         
((Imm & 0xffffff00ffffff00ULL) == 0)57.8k
;
454
178k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType1(unsigned long long)
455
456
17.4k
static inline uint8_t encodeAdvSIMDModImmType1(uint64_t Imm) {
457
17.4k
  return (Imm & 0xffULL);
458
17.4k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Line
Count
Source
456
17.4k
static inline uint8_t encodeAdvSIMDModImmType1(uint64_t Imm) {
457
17.4k
  return (Imm & 0xffULL);
458
17.4k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType1(unsigned long long)
459
460
0
static inline uint64_t decodeAdvSIMDModImmType1(uint8_t Imm) {
461
0
  uint64_t EncVal = Imm;
462
0
  return (EncVal << 32) | EncVal;
463
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType1(unsigned char)
464
465
// 0x00 0x00 abcdefgh 0x00 0x00 0x00 abcdefgh 0x00
466
161k
static inline bool isAdvSIMDModImmType2(uint64_t Imm) {
467
161k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
468
161k
         
((Imm & 0xffff00ffffff00ffULL) == 0)40.4k
;
469
161k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Line
Count
Source
466
161k
static inline bool isAdvSIMDModImmType2(uint64_t Imm) {
467
161k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
468
161k
         
((Imm & 0xffff00ffffff00ffULL) == 0)40.4k
;
469
161k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType2(unsigned long long)
470
471
85
static inline uint8_t encodeAdvSIMDModImmType2(uint64_t Imm) {
472
85
  return (Imm & 0xff00ULL) >> 8;
473
85
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Line
Count
Source
471
85
static inline uint8_t encodeAdvSIMDModImmType2(uint64_t Imm) {
472
85
  return (Imm & 0xff00ULL) >> 8;
473
85
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType2(unsigned long long)
474
475
0
static inline uint64_t decodeAdvSIMDModImmType2(uint8_t Imm) {
476
0
  uint64_t EncVal = Imm;
477
0
  return (EncVal << 40) | (EncVal << 8);
478
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType2(unsigned char)
479
480
// 0x00 abcdefgh 0x00 0x00 0x00 abcdefgh 0x00 0x00
481
161k
static inline bool isAdvSIMDModImmType3(uint64_t Imm) {
482
161k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
483
161k
         
((Imm & 0xff00ffffff00ffffULL) == 0)40.3k
;
484
161k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Line
Count
Source
481
161k
static inline bool isAdvSIMDModImmType3(uint64_t Imm) {
482
161k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
483
161k
         
((Imm & 0xff00ffffff00ffffULL) == 0)40.3k
;
484
161k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType3(unsigned long long)
485
486
72
static inline uint8_t encodeAdvSIMDModImmType3(uint64_t Imm) {
487
72
  return (Imm & 0xff0000ULL) >> 16;
488
72
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Line
Count
Source
486
72
static inline uint8_t encodeAdvSIMDModImmType3(uint64_t Imm) {
487
72
  return (Imm & 0xff0000ULL) >> 16;
488
72
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType3(unsigned long long)
489
490
0
static inline uint64_t decodeAdvSIMDModImmType3(uint8_t Imm) {
491
0
  uint64_t EncVal = Imm;
492
0
  return (EncVal << 48) | (EncVal << 16);
493
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType3(unsigned char)
494
495
// abcdefgh 0x00 0x00 0x00 abcdefgh 0x00 0x00 0x00
496
161k
static inline bool isAdvSIMDModImmType4(uint64_t Imm) {
497
161k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
498
161k
         
((Imm & 0x00ffffff00ffffffULL) == 0)40.2k
;
499
161k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Line
Count
Source
496
161k
static inline bool isAdvSIMDModImmType4(uint64_t Imm) {
497
161k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
498
161k
         
((Imm & 0x00ffffff00ffffffULL) == 0)40.2k
;
499
161k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType4(unsigned long long)
500
501
140
static inline uint8_t encodeAdvSIMDModImmType4(uint64_t Imm) {
502
140
  return (Imm & 0xff000000ULL) >> 24;
503
140
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Line
Count
Source
501
140
static inline uint8_t encodeAdvSIMDModImmType4(uint64_t Imm) {
502
140
  return (Imm & 0xff000000ULL) >> 24;
503
140
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType4(unsigned long long)
504
505
0
static inline uint64_t decodeAdvSIMDModImmType4(uint8_t Imm) {
506
0
  uint64_t EncVal = Imm;
507
0
  return (EncVal << 56) | (EncVal << 24);
508
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType4(unsigned char)
509
510
// 0x00 abcdefgh 0x00 abcdefgh 0x00 abcdefgh 0x00 abcdefgh
511
160k
static inline bool isAdvSIMDModImmType5(uint64_t Imm) {
512
160k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
513
160k
         
(((Imm & 0x00ff0000ULL) >> 16) == (Imm & 0x000000ffULL))40.0k
&&
514
160k
         
((Imm & 0xff00ff00ff00ff00ULL) == 0)2.67k
;
515
160k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Line
Count
Source
511
160k
static inline bool isAdvSIMDModImmType5(uint64_t Imm) {
512
160k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
513
160k
         
(((Imm & 0x00ff0000ULL) >> 16) == (Imm & 0x000000ffULL))40.0k
&&
514
160k
         
((Imm & 0xff00ff00ff00ff00ULL) == 0)2.67k
;
515
160k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType5(unsigned long long)
516
517
231
static inline uint8_t encodeAdvSIMDModImmType5(uint64_t Imm) {
518
231
  return (Imm & 0xffULL);
519
231
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Line
Count
Source
517
231
static inline uint8_t encodeAdvSIMDModImmType5(uint64_t Imm) {
518
231
  return (Imm & 0xffULL);
519
231
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType5(unsigned long long)
520
521
0
static inline uint64_t decodeAdvSIMDModImmType5(uint8_t Imm) {
522
0
  uint64_t EncVal = Imm;
523
0
  return (EncVal << 48) | (EncVal << 32) | (EncVal << 16) | EncVal;
524
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType5(unsigned char)
525
526
// abcdefgh 0x00 abcdefgh 0x00 abcdefgh 0x00 abcdefgh 0x00
527
160k
static inline bool isAdvSIMDModImmType6(uint64_t Imm) {
528
160k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
529
160k
         
(((Imm & 0xff000000ULL) >> 16) == (Imm & 0x0000ff00ULL))39.8k
&&
530
160k
         
((Imm & 0x00ff00ff00ff00ffULL) == 0)23.6k
;
531
160k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Line
Count
Source
527
160k
static inline bool isAdvSIMDModImmType6(uint64_t Imm) {
528
160k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
529
160k
         
(((Imm & 0xff000000ULL) >> 16) == (Imm & 0x0000ff00ULL))39.8k
&&
530
160k
         
((Imm & 0x00ff00ff00ff00ffULL) == 0)23.6k
;
531
160k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType6(unsigned long long)
532
533
128
static inline uint8_t encodeAdvSIMDModImmType6(uint64_t Imm) {
534
128
  return (Imm & 0xff00ULL) >> 8;
535
128
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Line
Count
Source
533
128
static inline uint8_t encodeAdvSIMDModImmType6(uint64_t Imm) {
534
128
  return (Imm & 0xff00ULL) >> 8;
535
128
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType6(unsigned long long)
536
537
0
static inline uint64_t decodeAdvSIMDModImmType6(uint8_t Imm) {
538
0
  uint64_t EncVal = Imm;
539
0
  return (EncVal << 56) | (EncVal << 40) | (EncVal << 24) | (EncVal << 8);
540
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType6(unsigned char)
541
542
// 0x00 0x00 abcdefgh 0xFF 0x00 0x00 abcdefgh 0xFF
543
129k
static inline bool isAdvSIMDModImmType7(uint64_t Imm) {
544
129k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
545
129k
         
((Imm & 0xffff00ffffff00ffULL) == 0x000000ff000000ffULL)9.37k
;
546
129k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Line
Count
Source
543
129k
static inline bool isAdvSIMDModImmType7(uint64_t Imm) {
544
129k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
545
129k
         
((Imm & 0xffff00ffffff00ffULL) == 0x000000ff000000ffULL)9.37k
;
546
129k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType7(unsigned long long)
547
548
66
static inline uint8_t encodeAdvSIMDModImmType7(uint64_t Imm) {
549
66
  return (Imm & 0xff00ULL) >> 8;
550
66
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Line
Count
Source
548
66
static inline uint8_t encodeAdvSIMDModImmType7(uint64_t Imm) {
549
66
  return (Imm & 0xff00ULL) >> 8;
550
66
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType7(unsigned long long)
551
552
0
static inline uint64_t decodeAdvSIMDModImmType7(uint8_t Imm) {
553
0
  uint64_t EncVal = Imm;
554
0
  return (EncVal << 40) | (EncVal << 8) | 0x000000ff000000ffULL;
555
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType7(unsigned char)
556
557
// 0x00 abcdefgh 0xFF 0xFF 0x00 abcdefgh 0xFF 0xFF
558
129k
static inline bool isAdvSIMDModImmType8(uint64_t Imm) {
559
129k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
560
129k
         
((Imm & 0xff00ffffff00ffffULL) == 0x0000ffff0000ffffULL)9.31k
;
561
129k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Line
Count
Source
558
129k
static inline bool isAdvSIMDModImmType8(uint64_t Imm) {
559
129k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
560
129k
         
((Imm & 0xff00ffffff00ffffULL) == 0x0000ffff0000ffffULL)9.31k
;
561
129k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType8(unsigned long long)
562
563
0
static inline uint64_t decodeAdvSIMDModImmType8(uint8_t Imm) {
564
0
  uint64_t EncVal = Imm;
565
0
  return (EncVal << 48) | (EncVal << 16) | 0x0000ffff0000ffffULL;
566
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType8(unsigned char)
567
568
28
static inline uint8_t encodeAdvSIMDModImmType8(uint64_t Imm) {
569
28
  return (Imm & 0x00ff0000ULL) >> 16;
570
28
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Line
Count
Source
568
28
static inline uint8_t encodeAdvSIMDModImmType8(uint64_t Imm) {
569
28
  return (Imm & 0x00ff0000ULL) >> 16;
570
28
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType8(unsigned long long)
571
572
// abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh
573
68.0k
static inline bool isAdvSIMDModImmType9(uint64_t Imm) {
574
68.0k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
575
68.0k
         
((Imm >> 48) == (Imm & 0x0000ffffULL))6.35k
&&
576
68.0k
         
((Imm >> 56) == (Imm & 0x000000ffULL))603
;
577
68.0k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Line
Count
Source
573
68.0k
static inline bool isAdvSIMDModImmType9(uint64_t Imm) {
574
68.0k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
575
68.0k
         
((Imm >> 48) == (Imm & 0x0000ffffULL))6.35k
&&
576
68.0k
         
((Imm >> 56) == (Imm & 0x000000ffULL))603
;
577
68.0k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType9(unsigned long long)
578
579
333
static inline uint8_t encodeAdvSIMDModImmType9(uint64_t Imm) {
580
333
  return (Imm & 0xffULL);
581
333
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Line
Count
Source
579
333
static inline uint8_t encodeAdvSIMDModImmType9(uint64_t Imm) {
580
333
  return (Imm & 0xffULL);
581
333
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType9(unsigned long long)
582
583
0
static inline uint64_t decodeAdvSIMDModImmType9(uint8_t Imm) {
584
0
  uint64_t EncVal = Imm;
585
0
  EncVal |= (EncVal << 8);
586
0
  EncVal |= (EncVal << 16);
587
0
  EncVal |= (EncVal << 32);
588
0
  return EncVal;
589
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType9(unsigned char)
590
591
// aaaaaaaa bbbbbbbb cccccccc dddddddd eeeeeeee ffffffff gggggggg hhhhhhhh
592
// cmode: 1110, op: 1
593
87.9k
static inline bool isAdvSIMDModImmType10(uint64_t Imm) {
594
87.9k
  uint64_t ByteA = Imm & 0xff00000000000000ULL;
595
87.9k
  uint64_t ByteB = Imm & 0x00ff000000000000ULL;
596
87.9k
  uint64_t ByteC = Imm & 0x0000ff0000000000ULL;
597
87.9k
  uint64_t ByteD = Imm & 0x000000ff00000000ULL;
598
87.9k
  uint64_t ByteE = Imm & 0x00000000ff000000ULL;
599
87.9k
  uint64_t ByteF = Imm & 0x0000000000ff0000ULL;
600
87.9k
  uint64_t ByteG = Imm & 0x000000000000ff00ULL;
601
87.9k
  uint64_t ByteH = Imm & 0x00000000000000ffULL;
602
87.9k
603
87.9k
  return (ByteA == 0ULL || 
ByteA == 0xff00000000000000ULL36.8k
) &&
604
87.9k
         
(51.9k
ByteB == 0ULL51.9k
||
ByteB == 0x00ff000000000000ULL1.60k
) &&
605
87.9k
         
(51.2k
ByteC == 0ULL51.2k
||
ByteC == 0x0000ff0000000000ULL1.98k
) &&
606
87.9k
         
(50.0k
ByteD == 0ULL50.0k
||
ByteD == 0x000000ff00000000ULL22.6k
) &&
607
87.9k
         
(28.3k
ByteE == 0ULL28.3k
||
ByteE == 0x00000000ff000000ULL764
) &&
608
87.9k
         
(27.7k
ByteF == 0ULL27.7k
||
ByteF == 0x0000000000ff0000ULL199
) &&
609
87.9k
         
(27.7k
ByteG == 0ULL27.7k
||
ByteG == 0x000000000000ff00ULL956
) &&
610
87.9k
         
(27.2k
ByteH == 0ULL27.2k
||
ByteH == 0x00000000000000ffULL26.8k
);
611
87.9k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Line
Count
Source
593
965
static inline bool isAdvSIMDModImmType10(uint64_t Imm) {
594
965
  uint64_t ByteA = Imm & 0xff00000000000000ULL;
595
965
  uint64_t ByteB = Imm & 0x00ff000000000000ULL;
596
965
  uint64_t ByteC = Imm & 0x0000ff0000000000ULL;
597
965
  uint64_t ByteD = Imm & 0x000000ff00000000ULL;
598
965
  uint64_t ByteE = Imm & 0x00000000ff000000ULL;
599
965
  uint64_t ByteF = Imm & 0x0000000000ff0000ULL;
600
965
  uint64_t ByteG = Imm & 0x000000000000ff00ULL;
601
965
  uint64_t ByteH = Imm & 0x00000000000000ffULL;
602
965
603
965
  return (ByteA == 0ULL || 
ByteA == 0xff00000000000000ULL962
) &&
604
965
         
(5
ByteB == 0ULL5
||
ByteB == 0x00ff000000000000ULL2
) &&
605
965
         
(3
ByteC == 0ULL3
||
ByteC == 0x0000ff0000000000ULL0
) &&
606
965
         
(3
ByteD == 0ULL3
||
ByteD == 0x000000ff00000000ULL3
) &&
607
965
         
(0
ByteE == 0ULL0
||
ByteE == 0x00000000ff000000ULL0
) &&
608
965
         
(0
ByteF == 0ULL0
||
ByteF == 0x0000000000ff0000ULL0
) &&
609
965
         
(0
ByteG == 0ULL0
||
ByteG == 0x000000000000ff00ULL0
) &&
610
965
         
(0
ByteH == 0ULL0
||
ByteH == 0x00000000000000ffULL0
);
611
965
}
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Line
Count
Source
593
86.9k
static inline bool isAdvSIMDModImmType10(uint64_t Imm) {
594
86.9k
  uint64_t ByteA = Imm & 0xff00000000000000ULL;
595
86.9k
  uint64_t ByteB = Imm & 0x00ff000000000000ULL;
596
86.9k
  uint64_t ByteC = Imm & 0x0000ff0000000000ULL;
597
86.9k
  uint64_t ByteD = Imm & 0x000000ff00000000ULL;
598
86.9k
  uint64_t ByteE = Imm & 0x00000000ff000000ULL;
599
86.9k
  uint64_t ByteF = Imm & 0x0000000000ff0000ULL;
600
86.9k
  uint64_t ByteG = Imm & 0x000000000000ff00ULL;
601
86.9k
  uint64_t ByteH = Imm & 0x00000000000000ffULL;
602
86.9k
603
86.9k
  return (ByteA == 0ULL || 
ByteA == 0xff00000000000000ULL35.9k
) &&
604
86.9k
         
(51.9k
ByteB == 0ULL51.9k
||
ByteB == 0x00ff000000000000ULL1.59k
) &&
605
86.9k
         
(51.1k
ByteC == 0ULL51.1k
||
ByteC == 0x0000ff0000000000ULL1.98k
) &&
606
86.9k
         
(50.0k
ByteD == 0ULL50.0k
||
ByteD == 0x000000ff00000000ULL22.6k
) &&
607
86.9k
         
(28.2k
ByteE == 0ULL28.2k
||
ByteE == 0x00000000ff000000ULL762
) &&
608
86.9k
         
(27.7k
ByteF == 0ULL27.7k
||
ByteF == 0x0000000000ff0000ULL198
) &&
609
86.9k
         
(27.7k
ByteG == 0ULL27.7k
||
ByteG == 0x000000000000ff00ULL954
) &&
610
86.9k
         
(27.2k
ByteH == 0ULL27.2k
||
ByteH == 0x00000000000000ffULL26.8k
);
611
86.9k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Line
Count
Source
593
8
static inline bool isAdvSIMDModImmType10(uint64_t Imm) {
594
8
  uint64_t ByteA = Imm & 0xff00000000000000ULL;
595
8
  uint64_t ByteB = Imm & 0x00ff000000000000ULL;
596
8
  uint64_t ByteC = Imm & 0x0000ff0000000000ULL;
597
8
  uint64_t ByteD = Imm & 0x000000ff00000000ULL;
598
8
  uint64_t ByteE = Imm & 0x00000000ff000000ULL;
599
8
  uint64_t ByteF = Imm & 0x0000000000ff0000ULL;
600
8
  uint64_t ByteG = Imm & 0x000000000000ff00ULL;
601
8
  uint64_t ByteH = Imm & 0x00000000000000ffULL;
602
8
603
8
  return (ByteA == 0ULL || 
ByteA == 0xff00000000000000ULL4
) &&
604
8
         
(7
ByteB == 0ULL7
||
ByteB == 0x00ff000000000000ULL1
) &&
605
8
         
(7
ByteC == 0ULL7
||
ByteC == 0x0000ff0000000000ULL2
) &&
606
8
         
(7
ByteD == 0ULL7
||
ByteD == 0x000000ff00000000ULL1
) &&
607
8
         
(7
ByteE == 0ULL7
||
ByteE == 0x00000000ff000000ULL2
) &&
608
8
         
(7
ByteF == 0ULL7
||
ByteF == 0x0000000000ff0000ULL1
) &&
609
8
         
(6
ByteG == 0ULL6
||
ByteG == 0x000000000000ff00ULL2
) &&
610
8
         
(6
ByteH == 0ULL6
||
ByteH == 0x00000000000000ffULL4
);
611
8
}
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType10(unsigned long long)
612
613
1.09k
static inline uint8_t encodeAdvSIMDModImmType10(uint64_t Imm) {
614
1.09k
  uint8_t BitA = (Imm & 0xff00000000000000ULL) != 0;
615
1.09k
  uint8_t BitB = (Imm & 0x00ff000000000000ULL) != 0;
616
1.09k
  uint8_t BitC = (Imm & 0x0000ff0000000000ULL) != 0;
617
1.09k
  uint8_t BitD = (Imm & 0x000000ff00000000ULL) != 0;
618
1.09k
  uint8_t BitE = (Imm & 0x00000000ff000000ULL) != 0;
619
1.09k
  uint8_t BitF = (Imm & 0x0000000000ff0000ULL) != 0;
620
1.09k
  uint8_t BitG = (Imm & 0x000000000000ff00ULL) != 0;
621
1.09k
  uint8_t BitH = (Imm & 0x00000000000000ffULL) != 0;
622
1.09k
623
1.09k
  uint8_t EncVal = BitA;
624
1.09k
  EncVal <<= 1;
625
1.09k
  EncVal |= BitB;
626
1.09k
  EncVal <<= 1;
627
1.09k
  EncVal |= BitC;
628
1.09k
  EncVal <<= 1;
629
1.09k
  EncVal |= BitD;
630
1.09k
  EncVal <<= 1;
631
1.09k
  EncVal |= BitE;
632
1.09k
  EncVal <<= 1;
633
1.09k
  EncVal |= BitF;
634
1.09k
  EncVal <<= 1;
635
1.09k
  EncVal |= BitG;
636
1.09k
  EncVal <<= 1;
637
1.09k
  EncVal |= BitH;
638
1.09k
  return EncVal;
639
1.09k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Line
Count
Source
613
1.08k
static inline uint8_t encodeAdvSIMDModImmType10(uint64_t Imm) {
614
1.08k
  uint8_t BitA = (Imm & 0xff00000000000000ULL) != 0;
615
1.08k
  uint8_t BitB = (Imm & 0x00ff000000000000ULL) != 0;
616
1.08k
  uint8_t BitC = (Imm & 0x0000ff0000000000ULL) != 0;
617
1.08k
  uint8_t BitD = (Imm & 0x000000ff00000000ULL) != 0;
618
1.08k
  uint8_t BitE = (Imm & 0x00000000ff000000ULL) != 0;
619
1.08k
  uint8_t BitF = (Imm & 0x0000000000ff0000ULL) != 0;
620
1.08k
  uint8_t BitG = (Imm & 0x000000000000ff00ULL) != 0;
621
1.08k
  uint8_t BitH = (Imm & 0x00000000000000ffULL) != 0;
622
1.08k
623
1.08k
  uint8_t EncVal = BitA;
624
1.08k
  EncVal <<= 1;
625
1.08k
  EncVal |= BitB;
626
1.08k
  EncVal <<= 1;
627
1.08k
  EncVal |= BitC;
628
1.08k
  EncVal <<= 1;
629
1.08k
  EncVal |= BitD;
630
1.08k
  EncVal <<= 1;
631
1.08k
  EncVal |= BitE;
632
1.08k
  EncVal <<= 1;
633
1.08k
  EncVal |= BitF;
634
1.08k
  EncVal <<= 1;
635
1.08k
  EncVal |= BitG;
636
1.08k
  EncVal <<= 1;
637
1.08k
  EncVal |= BitH;
638
1.08k
  return EncVal;
639
1.08k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Line
Count
Source
613
6
static inline uint8_t encodeAdvSIMDModImmType10(uint64_t Imm) {
614
6
  uint8_t BitA = (Imm & 0xff00000000000000ULL) != 0;
615
6
  uint8_t BitB = (Imm & 0x00ff000000000000ULL) != 0;
616
6
  uint8_t BitC = (Imm & 0x0000ff0000000000ULL) != 0;
617
6
  uint8_t BitD = (Imm & 0x000000ff00000000ULL) != 0;
618
6
  uint8_t BitE = (Imm & 0x00000000ff000000ULL) != 0;
619
6
  uint8_t BitF = (Imm & 0x0000000000ff0000ULL) != 0;
620
6
  uint8_t BitG = (Imm & 0x000000000000ff00ULL) != 0;
621
6
  uint8_t BitH = (Imm & 0x00000000000000ffULL) != 0;
622
6
623
6
  uint8_t EncVal = BitA;
624
6
  EncVal <<= 1;
625
6
  EncVal |= BitB;
626
6
  EncVal <<= 1;
627
6
  EncVal |= BitC;
628
6
  EncVal <<= 1;
629
6
  EncVal |= BitD;
630
6
  EncVal <<= 1;
631
6
  EncVal |= BitE;
632
6
  EncVal <<= 1;
633
6
  EncVal |= BitF;
634
6
  EncVal <<= 1;
635
6
  EncVal |= BitG;
636
6
  EncVal <<= 1;
637
6
  EncVal |= BitH;
638
6
  return EncVal;
639
6
}
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType10(unsigned long long)
640
641
364
static inline uint64_t decodeAdvSIMDModImmType10(uint8_t Imm) {
642
364
  uint64_t EncVal = 0;
643
364
  if (Imm & 0x80) 
EncVal |= 0xff00000000000000ULL33
;
644
364
  if (Imm & 0x40) 
EncVal |= 0x00ff000000000000ULL35
;
645
364
  if (Imm & 0x20) 
EncVal |= 0x0000ff0000000000ULL45
;
646
364
  if (Imm & 0x10) 
EncVal |= 0x000000ff00000000ULL58
;
647
364
  if (Imm & 0x08) 
EncVal |= 0x00000000ff000000ULL37
;
648
364
  if (Imm & 0x04) 
EncVal |= 0x0000000000ff0000ULL43
;
649
364
  if (Imm & 0x02) 
EncVal |= 0x000000000000ff00ULL52
;
650
364
  if (Imm & 0x01) 
EncVal |= 0x00000000000000ffULL66
;
651
364
  return EncVal;
652
364
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Line
Count
Source
641
364
static inline uint64_t decodeAdvSIMDModImmType10(uint8_t Imm) {
642
364
  uint64_t EncVal = 0;
643
364
  if (Imm & 0x80) 
EncVal |= 0xff00000000000000ULL33
;
644
364
  if (Imm & 0x40) 
EncVal |= 0x00ff000000000000ULL35
;
645
364
  if (Imm & 0x20) 
EncVal |= 0x0000ff0000000000ULL45
;
646
364
  if (Imm & 0x10) 
EncVal |= 0x000000ff00000000ULL58
;
647
364
  if (Imm & 0x08) 
EncVal |= 0x00000000ff000000ULL37
;
648
364
  if (Imm & 0x04) 
EncVal |= 0x0000000000ff0000ULL43
;
649
364
  if (Imm & 0x02) 
EncVal |= 0x000000000000ff00ULL52
;
650
364
  if (Imm & 0x01) 
EncVal |= 0x00000000000000ffULL66
;
651
364
  return EncVal;
652
364
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType10(unsigned char)
653
654
// aBbbbbbc defgh000 0x00 0x00 aBbbbbbc defgh000 0x00 0x00
655
67.7k
static inline bool isAdvSIMDModImmType11(uint64_t Imm) {
656
67.7k
  uint64_t BString = (Imm & 0x7E000000ULL) >> 25;
657
67.7k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
658
67.7k
         
(6.02k
BString == 0x1f6.02k
||
BString == 0x202.76k
) &&
659
67.7k
         
((Imm & 0x0007ffff0007ffffULL) == 0)3.29k
;
660
67.7k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Line
Count
Source
655
67.7k
static inline bool isAdvSIMDModImmType11(uint64_t Imm) {
656
67.7k
  uint64_t BString = (Imm & 0x7E000000ULL) >> 25;
657
67.7k
  return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
658
67.7k
         
(6.02k
BString == 0x1f6.02k
||
BString == 0x202.76k
) &&
659
67.7k
         
((Imm & 0x0007ffff0007ffffULL) == 0)3.29k
;
660
67.7k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType11(unsigned long long)
661
662
3.21k
static inline uint8_t encodeAdvSIMDModImmType11(uint64_t Imm) {
663
3.21k
  uint8_t BitA = (Imm & 0x80000000ULL) != 0;
664
3.21k
  uint8_t BitB = (Imm & 0x20000000ULL) != 0;
665
3.21k
  uint8_t BitC = (Imm & 0x01000000ULL) != 0;
666
3.21k
  uint8_t BitD = (Imm & 0x00800000ULL) != 0;
667
3.21k
  uint8_t BitE = (Imm & 0x00400000ULL) != 0;
668
3.21k
  uint8_t BitF = (Imm & 0x00200000ULL) != 0;
669
3.21k
  uint8_t BitG = (Imm & 0x00100000ULL) != 0;
670
3.21k
  uint8_t BitH = (Imm & 0x00080000ULL) != 0;
671
3.21k
672
3.21k
  uint8_t EncVal = BitA;
673
3.21k
  EncVal <<= 1;
674
3.21k
  EncVal |= BitB;
675
3.21k
  EncVal <<= 1;
676
3.21k
  EncVal |= BitC;
677
3.21k
  EncVal <<= 1;
678
3.21k
  EncVal |= BitD;
679
3.21k
  EncVal <<= 1;
680
3.21k
  EncVal |= BitE;
681
3.21k
  EncVal <<= 1;
682
3.21k
  EncVal |= BitF;
683
3.21k
  EncVal <<= 1;
684
3.21k
  EncVal |= BitG;
685
3.21k
  EncVal <<= 1;
686
3.21k
  EncVal |= BitH;
687
3.21k
  return EncVal;
688
3.21k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Line
Count
Source
662
3.21k
static inline uint8_t encodeAdvSIMDModImmType11(uint64_t Imm) {
663
3.21k
  uint8_t BitA = (Imm & 0x80000000ULL) != 0;
664
3.21k
  uint8_t BitB = (Imm & 0x20000000ULL) != 0;
665
3.21k
  uint8_t BitC = (Imm & 0x01000000ULL) != 0;
666
3.21k
  uint8_t BitD = (Imm & 0x00800000ULL) != 0;
667
3.21k
  uint8_t BitE = (Imm & 0x00400000ULL) != 0;
668
3.21k
  uint8_t BitF = (Imm & 0x00200000ULL) != 0;
669
3.21k
  uint8_t BitG = (Imm & 0x00100000ULL) != 0;
670
3.21k
  uint8_t BitH = (Imm & 0x00080000ULL) != 0;
671
3.21k
672
3.21k
  uint8_t EncVal = BitA;
673
3.21k
  EncVal <<= 1;
674
3.21k
  EncVal |= BitB;
675
3.21k
  EncVal <<= 1;
676
3.21k
  EncVal |= BitC;
677
3.21k
  EncVal <<= 1;
678
3.21k
  EncVal |= BitD;
679
3.21k
  EncVal <<= 1;
680
3.21k
  EncVal |= BitE;
681
3.21k
  EncVal <<= 1;
682
3.21k
  EncVal |= BitF;
683
3.21k
  EncVal <<= 1;
684
3.21k
  EncVal |= BitG;
685
3.21k
  EncVal <<= 1;
686
3.21k
  EncVal |= BitH;
687
3.21k
  return EncVal;
688
3.21k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType11(unsigned long long)
689
690
0
static inline uint64_t decodeAdvSIMDModImmType11(uint8_t Imm) {
691
0
  uint64_t EncVal = 0;
692
0
  if (Imm & 0x80) EncVal |= 0x80000000ULL;
693
0
  if (Imm & 0x40) EncVal |= 0x3e000000ULL;
694
0
  else            EncVal |= 0x40000000ULL;
695
0
  if (Imm & 0x20) EncVal |= 0x01000000ULL;
696
0
  if (Imm & 0x10) EncVal |= 0x00800000ULL;
697
0
  if (Imm & 0x08) EncVal |= 0x00400000ULL;
698
0
  if (Imm & 0x04) EncVal |= 0x00200000ULL;
699
0
  if (Imm & 0x02) EncVal |= 0x00100000ULL;
700
0
  if (Imm & 0x01) EncVal |= 0x00080000ULL;
701
0
  return (EncVal << 32) | EncVal;
702
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType11(unsigned char)
703
704
// aBbbbbbb bbcdefgh 0x00 0x00 0x00 0x00 0x00 0x00
705
55.5k
static inline bool isAdvSIMDModImmType12(uint64_t Imm) {
706
55.5k
  uint64_t BString = (Imm & 0x7fc0000000000000ULL) >> 54;
707
55.5k
  return ((BString == 0xff || 
BString == 0x10029.7k
) &&
708
55.5k
         
((Imm & 0x0000ffffffffffffULL) == 0)25.8k
);
709
55.5k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Line
Count
Source
705
55.5k
static inline bool isAdvSIMDModImmType12(uint64_t Imm) {
706
55.5k
  uint64_t BString = (Imm & 0x7fc0000000000000ULL) >> 54;
707
55.5k
  return ((BString == 0xff || 
BString == 0x10029.7k
) &&
708
55.5k
         
((Imm & 0x0000ffffffffffffULL) == 0)25.8k
);
709
55.5k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAdvSIMDModImmType12(unsigned long long)
710
711
3.29k
static inline uint8_t encodeAdvSIMDModImmType12(uint64_t Imm) {
712
3.29k
  uint8_t BitA = (Imm & 0x8000000000000000ULL) != 0;
713
3.29k
  uint8_t BitB = (Imm & 0x0040000000000000ULL) != 0;
714
3.29k
  uint8_t BitC = (Imm & 0x0020000000000000ULL) != 0;
715
3.29k
  uint8_t BitD = (Imm & 0x0010000000000000ULL) != 0;
716
3.29k
  uint8_t BitE = (Imm & 0x0008000000000000ULL) != 0;
717
3.29k
  uint8_t BitF = (Imm & 0x0004000000000000ULL) != 0;
718
3.29k
  uint8_t BitG = (Imm & 0x0002000000000000ULL) != 0;
719
3.29k
  uint8_t BitH = (Imm & 0x0001000000000000ULL) != 0;
720
3.29k
721
3.29k
  uint8_t EncVal = BitA;
722
3.29k
  EncVal <<= 1;
723
3.29k
  EncVal |= BitB;
724
3.29k
  EncVal <<= 1;
725
3.29k
  EncVal |= BitC;
726
3.29k
  EncVal <<= 1;
727
3.29k
  EncVal |= BitD;
728
3.29k
  EncVal <<= 1;
729
3.29k
  EncVal |= BitE;
730
3.29k
  EncVal <<= 1;
731
3.29k
  EncVal |= BitF;
732
3.29k
  EncVal <<= 1;
733
3.29k
  EncVal |= BitG;
734
3.29k
  EncVal <<= 1;
735
3.29k
  EncVal |= BitH;
736
3.29k
  return EncVal;
737
3.29k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
AArch64ISelLowering.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Line
Count
Source
711
3.29k
static inline uint8_t encodeAdvSIMDModImmType12(uint64_t Imm) {
712
3.29k
  uint8_t BitA = (Imm & 0x8000000000000000ULL) != 0;
713
3.29k
  uint8_t BitB = (Imm & 0x0040000000000000ULL) != 0;
714
3.29k
  uint8_t BitC = (Imm & 0x0020000000000000ULL) != 0;
715
3.29k
  uint8_t BitD = (Imm & 0x0010000000000000ULL) != 0;
716
3.29k
  uint8_t BitE = (Imm & 0x0008000000000000ULL) != 0;
717
3.29k
  uint8_t BitF = (Imm & 0x0004000000000000ULL) != 0;
718
3.29k
  uint8_t BitG = (Imm & 0x0002000000000000ULL) != 0;
719
3.29k
  uint8_t BitH = (Imm & 0x0001000000000000ULL) != 0;
720
3.29k
721
3.29k
  uint8_t EncVal = BitA;
722
3.29k
  EncVal <<= 1;
723
3.29k
  EncVal |= BitB;
724
3.29k
  EncVal <<= 1;
725
3.29k
  EncVal |= BitC;
726
3.29k
  EncVal <<= 1;
727
3.29k
  EncVal |= BitD;
728
3.29k
  EncVal <<= 1;
729
3.29k
  EncVal |= BitE;
730
3.29k
  EncVal <<= 1;
731
3.29k
  EncVal |= BitF;
732
3.29k
  EncVal <<= 1;
733
3.29k
  EncVal |= BitG;
734
3.29k
  EncVal <<= 1;
735
3.29k
  EncVal |= BitH;
736
3.29k
  return EncVal;
737
3.29k
}
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::encodeAdvSIMDModImmType12(unsigned long long)
738
739
0
static inline uint64_t decodeAdvSIMDModImmType12(uint8_t Imm) {
740
0
  uint64_t EncVal = 0;
741
0
  if (Imm & 0x80) EncVal |= 0x8000000000000000ULL;
742
0
  if (Imm & 0x40) EncVal |= 0x3fc0000000000000ULL;
743
0
  else            EncVal |= 0x4000000000000000ULL;
744
0
  if (Imm & 0x20) EncVal |= 0x0020000000000000ULL;
745
0
  if (Imm & 0x10) EncVal |= 0x0010000000000000ULL;
746
0
  if (Imm & 0x08) EncVal |= 0x0008000000000000ULL;
747
0
  if (Imm & 0x04) EncVal |= 0x0004000000000000ULL;
748
0
  if (Imm & 0x02) EncVal |= 0x0002000000000000ULL;
749
0
  if (Imm & 0x01) EncVal |= 0x0001000000000000ULL;
750
0
  return (EncVal << 32) | EncVal;
751
0
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64InstPrinter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::decodeAdvSIMDModImmType12(unsigned char)
752
753
/// Returns true if Imm is the concatenation of a repeating pattern of type T.
754
template <typename T>
755
522
static inline bool isSVEMaskOfIdenticalElements(int64_t Imm) {
756
522
  auto Parts = bit_cast<std::array<T, sizeof(int64_t) / sizeof(T)>>(Imm);
757
1.52k
  return all_of(Parts, [&](T Elem) { return Elem == Parts[0]; });
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)::'lambda'(signed char)::operator()(signed char) const
Line
Count
Source
757
660
  return all_of(Parts, [&](T Elem) { return Elem == Parts[0]; });
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)::'lambda'(short)::operator()(short) const
Line
Count
Source
757
528
  return all_of(Parts, [&](T Elem) { return Elem == Parts[0]; });
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)::'lambda'(int)::operator()(int) const
Line
Count
Source
757
312
  return all_of(Parts, [&](T Elem) { return Elem == Parts[0]; });
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<long long>(long long)::'lambda'(long long)::operator()(long long) const
Line
Count
Source
757
26
  return all_of(Parts, [&](T Elem) { return Elem == Parts[0]; });
758
522
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64AsmPrinter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64AsmPrinter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64FastISel.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64FastISel.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64FastISel.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64ISelLowering.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64ISelLowering.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64ISelLowering.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64InstrInfo.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64InstrInfo.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64InstrInfo.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64Subtarget.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64Subtarget.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64Subtarget.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64AsmParser.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64AsmParser.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64AsmParser.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Line
Count
Source
755
162
static inline bool isSVEMaskOfIdenticalElements(int64_t Imm) {
756
162
  auto Parts = bit_cast<std::array<T, sizeof(int64_t) / sizeof(T)>>(Imm);
757
162
  return all_of(Parts, [&](T Elem) { return Elem == Parts[0]; });
758
162
}
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Line
Count
Source
755
178
static inline bool isSVEMaskOfIdenticalElements(int64_t Imm) {
756
178
  auto Parts = bit_cast<std::array<T, sizeof(int64_t) / sizeof(T)>>(Imm);
757
178
  return all_of(Parts, [&](T Elem) { return Elem == Parts[0]; });
758
178
}
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Line
Count
Source
755
156
static inline bool isSVEMaskOfIdenticalElements(int64_t Imm) {
756
156
  auto Parts = bit_cast<std::array<T, sizeof(int64_t) / sizeof(T)>>(Imm);
757
156
  return all_of(Parts, [&](T Elem) { return Elem == Parts[0]; });
758
156
}
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<long long>(long long)
Line
Count
Source
755
26
static inline bool isSVEMaskOfIdenticalElements(int64_t Imm) {
756
26
  auto Parts = bit_cast<std::array<T, sizeof(int64_t) / sizeof(T)>>(Imm);
757
26
  return all_of(Parts, [&](T Elem) { return Elem == Parts[0]; });
758
26
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<int>(long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<short>(long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:bool llvm::AArch64_AM::isSVEMaskOfIdenticalElements<signed char>(long long)
759
760
/// Returns true if Imm is valid for CPY/DUP.
761
template <typename T>
762
938
static inline bool isSVECpyImm(int64_t Imm) {
763
938
  bool IsImm8 = int8_t(Imm) == Imm;
764
938
  bool IsImm16 = int16_t(Imm & ~0xff) == Imm;
765
938
766
938
  if (std::is_same<int8_t, typename std::make_signed<T>::type>::value)
767
104
    return IsImm8 || 
uint8_t(Imm) == Imm30
;
768
834
769
834
  if (std::is_same<int16_t, typename std::make_signed<T>::type>::value)
770
254
    return IsImm8 || 
IsImm16182
||
uint16_t(Imm & ~0xff) == Imm88
;
771
580
772
580
  return IsImm8 || 
IsImm16462
;
773
580
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64AsmPrinter.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64AsmPrinter.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64AsmPrinter.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64FastISel.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64FastISel.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64FastISel.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64FastISel.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64ISelLowering.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64ISelLowering.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64ISelLowering.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64ISelLowering.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64InstrInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64InstrInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64InstrInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64InstrInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64Subtarget.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64Subtarget.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64Subtarget.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64Subtarget.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
AArch64AsmParser.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Line
Count
Source
762
212
static inline bool isSVECpyImm(int64_t Imm) {
763
212
  bool IsImm8 = int8_t(Imm) == Imm;
764
212
  bool IsImm16 = int16_t(Imm & ~0xff) == Imm;
765
212
766
212
  if (std::is_same<int8_t, typename std::make_signed<T>::type>::value)
767
0
    return IsImm8 || uint8_t(Imm) == Imm;
768
212
769
212
  if (std::is_same<int16_t, typename std::make_signed<T>::type>::value)
770
212
    return IsImm8 || 
IsImm16158
||
uint16_t(Imm & ~0xff) == Imm64
;
771
0
772
0
  return IsImm8 || IsImm16;
773
0
}
AArch64AsmParser.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Line
Count
Source
762
216
static inline bool isSVECpyImm(int64_t Imm) {
763
216
  bool IsImm8 = int8_t(Imm) == Imm;
764
216
  bool IsImm16 = int16_t(Imm & ~0xff) == Imm;
765
216
766
216
  if (std::is_same<int8_t, typename std::make_signed<T>::type>::value)
767
0
    return IsImm8 || uint8_t(Imm) == Imm;
768
216
769
216
  if (std::is_same<int16_t, typename std::make_signed<T>::type>::value)
770
0
    return IsImm8 || IsImm16 || uint16_t(Imm & ~0xff) == Imm;
771
216
772
216
  return IsImm8 || 
IsImm16162
;
773
216
}
AArch64AsmParser.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Line
Count
Source
762
248
static inline bool isSVECpyImm(int64_t Imm) {
763
248
  bool IsImm8 = int8_t(Imm) == Imm;
764
248
  bool IsImm16 = int16_t(Imm & ~0xff) == Imm;
765
248
766
248
  if (std::is_same<int8_t, typename std::make_signed<T>::type>::value)
767
0
    return IsImm8 || uint8_t(Imm) == Imm;
768
248
769
248
  if (std::is_same<int16_t, typename std::make_signed<T>::type>::value)
770
0
    return IsImm8 || IsImm16 || uint16_t(Imm & ~0xff) == Imm;
771
248
772
248
  return IsImm8 || 
IsImm16194
;
773
248
}
AArch64AsmParser.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Line
Count
Source
762
80
static inline bool isSVECpyImm(int64_t Imm) {
763
80
  bool IsImm8 = int8_t(Imm) == Imm;
764
80
  bool IsImm16 = int16_t(Imm & ~0xff) == Imm;
765
80
766
80
  if (std::is_same<int8_t, typename std::make_signed<T>::type>::value)
767
80
    return IsImm8 || 
uint8_t(Imm) == Imm30
;
768
0
769
0
  if (std::is_same<int16_t, typename std::make_signed<T>::type>::value)
770
0
    return IsImm8 || IsImm16 || uint16_t(Imm & ~0xff) == Imm;
771
0
772
0
  return IsImm8 || IsImm16;
773
0
}
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Line
Count
Source
762
62
static inline bool isSVECpyImm(int64_t Imm) {
763
62
  bool IsImm8 = int8_t(Imm) == Imm;
764
62
  bool IsImm16 = int16_t(Imm & ~0xff) == Imm;
765
62
766
62
  if (std::is_same<int8_t, typename std::make_signed<T>::type>::value)
767
0
    return IsImm8 || uint8_t(Imm) == Imm;
768
62
769
62
  if (std::is_same<int16_t, typename std::make_signed<T>::type>::value)
770
0
    return IsImm8 || IsImm16 || uint16_t(Imm & ~0xff) == Imm;
771
62
772
62
  return IsImm8 || 
IsImm1660
;
773
62
}
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Line
Count
Source
762
54
static inline bool isSVECpyImm(int64_t Imm) {
763
54
  bool IsImm8 = int8_t(Imm) == Imm;
764
54
  bool IsImm16 = int16_t(Imm & ~0xff) == Imm;
765
54
766
54
  if (std::is_same<int8_t, typename std::make_signed<T>::type>::value)
767
0
    return IsImm8 || uint8_t(Imm) == Imm;
768
54
769
54
  if (std::is_same<int16_t, typename std::make_signed<T>::type>::value)
770
0
    return IsImm8 || IsImm16 || uint16_t(Imm & ~0xff) == Imm;
771
54
772
54
  return IsImm8 || 
IsImm1646
;
773
54
}
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Line
Count
Source
762
42
static inline bool isSVECpyImm(int64_t Imm) {
763
42
  bool IsImm8 = int8_t(Imm) == Imm;
764
42
  bool IsImm16 = int16_t(Imm & ~0xff) == Imm;
765
42
766
42
  if (std::is_same<int8_t, typename std::make_signed<T>::type>::value)
767
0
    return IsImm8 || uint8_t(Imm) == Imm;
768
42
769
42
  if (std::is_same<int16_t, typename std::make_signed<T>::type>::value)
770
42
    return IsImm8 || 
IsImm1624
||
uint16_t(Imm & ~0xff) == Imm24
;
771
0
772
0
  return IsImm8 || IsImm16;
773
0
}
AArch64InstPrinter.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Line
Count
Source
762
24
static inline bool isSVECpyImm(int64_t Imm) {
763
24
  bool IsImm8 = int8_t(Imm) == Imm;
764
24
  bool IsImm16 = int16_t(Imm & ~0xff) == Imm;
765
24
766
24
  if (std::is_same<int8_t, typename std::make_signed<T>::type>::value)
767
24
    return IsImm8 || 
uint8_t(Imm) == Imm0
;
768
0
769
0
  if (std::is_same<int16_t, typename std::make_signed<T>::type>::value)
770
0
    return IsImm8 || IsImm16 || uint16_t(Imm & ~0xff) == Imm;
771
0
772
0
  return IsImm8 || IsImm16;
773
0
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:bool llvm::AArch64_AM::isSVECpyImm<long long>(long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:bool llvm::AArch64_AM::isSVECpyImm<int>(long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:bool llvm::AArch64_AM::isSVECpyImm<short>(long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:bool llvm::AArch64_AM::isSVECpyImm<signed char>(long long)
774
775
/// Returns true if Imm is valid for ADD/SUB.
776
template <typename T>
777
673
static inline bool isSVEAddSubImm(int64_t Imm) {
778
673
  bool IsInt8t =
779
673
      std::is_same<int8_t, typename std::make_signed<T>::type>::value;
780
673
  return uint8_t(Imm) == Imm || 
(392
!IsInt8t392
&&
uint16_t(Imm & ~0xff) == Imm378
);
781
673
}
Unexecuted instantiation: AArch64InstructionSelector.cpp:bool llvm::AArch64_AM::isSVEAddSubImm<short>(long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:bool llvm::AArch64_AM::isSVEAddSubImm<int>(long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:bool llvm::AArch64_AM::isSVEAddSubImm<long long>(long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:bool llvm::AArch64_AM::isSVEAddSubImm<signed char>(long long)
AArch64AsmParser.cpp:bool llvm::AArch64_AM::isSVEAddSubImm<short>(long long)
Line
Count
Source
777
182
static inline bool isSVEAddSubImm(int64_t Imm) {
778
182
  bool IsInt8t =
779
182
      std::is_same<int8_t, typename std::make_signed<T>::type>::value;
780
182
  return uint8_t(Imm) == Imm || 
(112
!IsInt8t112
&&
uint16_t(Imm & ~0xff) == Imm112
);
781
182
}
AArch64AsmParser.cpp:bool llvm::AArch64_AM::isSVEAddSubImm<int>(long long)
Line
Count
Source
777
182
static inline bool isSVEAddSubImm(int64_t Imm) {
778
182
  bool IsInt8t =
779
182
      std::is_same<int8_t, typename std::make_signed<T>::type>::value;
780
182
  return uint8_t(Imm) == Imm || 
(112
!IsInt8t112
&&
uint16_t(Imm & ~0xff) == Imm112
);
781
182
}
AArch64AsmParser.cpp:bool llvm::AArch64_AM::isSVEAddSubImm<long long>(long long)
Line
Count
Source
777
225
static inline bool isSVEAddSubImm(int64_t Imm) {
778
225
  bool IsInt8t =
779
225
      std::is_same<int8_t, typename std::make_signed<T>::type>::value;
780
225
  return uint8_t(Imm) == Imm || 
(154
!IsInt8t154
&&
uint16_t(Imm & ~0xff) == Imm154
);
781
225
}
AArch64AsmParser.cpp:bool llvm::AArch64_AM::isSVEAddSubImm<signed char>(long long)
Line
Count
Source
777
84
static inline bool isSVEAddSubImm(int64_t Imm) {
778
84
  bool IsInt8t =
779
84
      std::is_same<int8_t, typename std::make_signed<T>::type>::value;
780
84
  return uint8_t(Imm) == Imm || 
(14
!IsInt8t14
&&
uint16_t(Imm & ~0xff) == Imm0
);
781
84
}
782
783
/// Return true if Imm is valid for DUPM and has no single CPY/DUP equivalent.
784
62
static inline bool isSVEMoveMaskPreferredLogicalImmediate(int64_t Imm) {
785
62
  if (isSVECpyImm<int64_t>(Imm))
786
2
    return false;
787
60
788
60
  auto S = bit_cast<std::array<int32_t, 2>>(Imm);
789
60
  auto H = bit_cast<std::array<int16_t, 4>>(Imm);
790
60
  auto B = bit_cast<std::array<int8_t, 8>>(Imm);
791
60
792
60
  if (isSVEMaskOfIdenticalElements<int32_t>(Imm) && 
isSVECpyImm<int32_t>(S[0])54
)
793
8
    return false;
794
52
  if (isSVEMaskOfIdenticalElements<int16_t>(Imm) && 
isSVECpyImm<int16_t>(H[0])42
)
795
18
    return false;
796
34
  if (isSVEMaskOfIdenticalElements<int8_t>(Imm) && 
isSVECpyImm<int8_t>(B[0])24
)
797
24
    return false;
798
10
  return isLogicalImmediate(Imm, 64);
799
10
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
AArch64InstPrinter.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Line
Count
Source
784
62
static inline bool isSVEMoveMaskPreferredLogicalImmediate(int64_t Imm) {
785
62
  if (isSVECpyImm<int64_t>(Imm))
786
2
    return false;
787
60
788
60
  auto S = bit_cast<std::array<int32_t, 2>>(Imm);
789
60
  auto H = bit_cast<std::array<int16_t, 4>>(Imm);
790
60
  auto B = bit_cast<std::array<int8_t, 8>>(Imm);
791
60
792
60
  if (isSVEMaskOfIdenticalElements<int32_t>(Imm) && 
isSVECpyImm<int32_t>(S[0])54
)
793
8
    return false;
794
52
  if (isSVEMaskOfIdenticalElements<int16_t>(Imm) && 
isSVECpyImm<int16_t>(H[0])42
)
795
18
    return false;
796
34
  if (isSVEMaskOfIdenticalElements<int8_t>(Imm) && 
isSVECpyImm<int8_t>(B[0])24
)
797
24
    return false;
798
10
  return isLogicalImmediate(Imm, 64);
799
10
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(long long)
800
801
477
inline static bool isAnyMOVZMovAlias(uint64_t Value, int RegWidth) {
802
1.91k
  for (int Shift = 0; Shift <= RegWidth - 16; 
Shift += 161.44k
)
803
1.47k
    if ((Value & ~(0xffffULL << Shift)) == 0)
804
32
      return true;
805
477
806
477
  
return false445
;
807
477
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
AArch64AsmParser.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Line
Count
Source
801
11
inline static bool isAnyMOVZMovAlias(uint64_t Value, int RegWidth) {
802
43
  for (int Shift = 0; Shift <= RegWidth - 16; 
Shift += 1632
)
803
32
    if ((Value & ~(0xffffULL << Shift)) == 0)
804
0
      return true;
805
11
806
11
  return false;
807
11
}
AArch64InstPrinter.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Line
Count
Source
801
466
inline static bool isAnyMOVZMovAlias(uint64_t Value, int RegWidth) {
802
1.87k
  for (int Shift = 0; Shift <= RegWidth - 16; 
Shift += 161.41k
)
803
1.44k
    if ((Value & ~(0xffffULL << Shift)) == 0)
804
32
      return true;
805
466
806
466
  
return false434
;
807
466
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAnyMOVZMovAlias(unsigned long long, int)
808
809
3.02k
inline static bool isMOVZMovAlias(uint64_t Value, int Shift, int RegWidth) {
810
3.02k
  if (RegWidth == 32)
811
2.56k
    Value &= 0xffffffffULL;
812
3.02k
813
3.02k
  // "lsl #0" takes precedence: in practice this only affects "#0, lsl #0".
814
3.02k
  if (Value == 0 && 
Shift != 0294
)
815
34
    return false;
816
2.98k
817
2.98k
  return (Value & ~(0xffffULL << Shift)) == 0;
818
2.98k
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
AArch64AsmParser.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Line
Count
Source
809
45
inline static bool isMOVZMovAlias(uint64_t Value, int Shift, int RegWidth) {
810
45
  if (RegWidth == 32)
811
20
    Value &= 0xffffffffULL;
812
45
813
45
  // "lsl #0" takes precedence: in practice this only affects "#0, lsl #0".
814
45
  if (Value == 0 && 
Shift != 04
)
815
0
    return false;
816
45
817
45
  return (Value & ~(0xffffULL << Shift)) == 0;
818
45
}
AArch64InstPrinter.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Line
Count
Source
809
2.97k
inline static bool isMOVZMovAlias(uint64_t Value, int Shift, int RegWidth) {
810
2.97k
  if (RegWidth == 32)
811
2.54k
    Value &= 0xffffffffULL;
812
2.97k
813
2.97k
  // "lsl #0" takes precedence: in practice this only affects "#0, lsl #0".
814
2.97k
  if (Value == 0 && 
Shift != 0290
)
815
34
    return false;
816
2.94k
817
2.94k
  return (Value & ~(0xffffULL << Shift)) == 0;
818
2.94k
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isMOVZMovAlias(unsigned long long, int, int)
819
820
227
inline static bool isMOVNMovAlias(uint64_t Value, int Shift, int RegWidth) {
821
227
  // MOVZ takes precedence over MOVN.
822
227
  if (isAnyMOVZMovAlias(Value, RegWidth))
823
2
    return false;
824
225
825
225
  Value = ~Value;
826
225
  if (RegWidth == 32)
827
122
    Value &= 0xffffffffULL;
828
225
829
225
  return isMOVZMovAlias(Value, Shift, RegWidth);
830
225
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
AArch64AsmParser.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Line
Count
Source
820
11
inline static bool isMOVNMovAlias(uint64_t Value, int Shift, int RegWidth) {
821
11
  // MOVZ takes precedence over MOVN.
822
11
  if (isAnyMOVZMovAlias(Value, RegWidth))
823
0
    return false;
824
11
825
11
  Value = ~Value;
826
11
  if (RegWidth == 32)
827
6
    Value &= 0xffffffffULL;
828
11
829
11
  return isMOVZMovAlias(Value, Shift, RegWidth);
830
11
}
AArch64InstPrinter.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Line
Count
Source
820
216
inline static bool isMOVNMovAlias(uint64_t Value, int Shift, int RegWidth) {
821
216
  // MOVZ takes precedence over MOVN.
822
216
  if (isAnyMOVZMovAlias(Value, RegWidth))
823
2
    return false;
824
214
825
214
  Value = ~Value;
826
214
  if (RegWidth == 32)
827
116
    Value &= 0xffffffffULL;
828
214
829
214
  return isMOVZMovAlias(Value, Shift, RegWidth);
830
214
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isMOVNMovAlias(unsigned long long, int, int)
831
832
136
inline static bool isAnyMOVWMovAlias(uint64_t Value, int RegWidth) {
833
136
  if (isAnyMOVZMovAlias(Value, RegWidth))
834
22
    return true;
835
114
836
114
  // It's not a MOVZ, but it might be a MOVN.
837
114
  Value = ~Value;
838
114
  if (RegWidth == 32)
839
32
    Value &= 0xffffffffULL;
840
114
841
114
  return isAnyMOVZMovAlias(Value, RegWidth);
842
114
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64ExpandImm.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64ExpandPseudoInsts.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64FastISel.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64FrameLowering.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64ConditionOptimizer.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64ISelDAGToDAG.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64ISelLowering.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64InstrInfo.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64InstructionSelector.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64LoadStoreOptimizer.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64RegisterInfo.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64Subtarget.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64TargetTransformInfo.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64AsmParser.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
AArch64InstPrinter.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Line
Count
Source
832
136
inline static bool isAnyMOVWMovAlias(uint64_t Value, int RegWidth) {
833
136
  if (isAnyMOVZMovAlias(Value, RegWidth))
834
22
    return true;
835
114
836
114
  // It's not a MOVZ, but it might be a MOVN.
837
114
  Value = ~Value;
838
114
  if (RegWidth == 32)
839
32
    Value &= 0xffffffffULL;
840
114
841
114
  return isAnyMOVZMovAlias(Value, RegWidth);
842
114
}
Unexecuted instantiation: AArch64MCCodeEmitter.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
Unexecuted instantiation: AArch64MCTargetDesc.cpp:llvm::AArch64_AM::isAnyMOVWMovAlias(unsigned long long, int)
843
844
} // end namespace AArch64_AM
845
846
} // end namespace llvm
847
848
#endif