/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp
Line | Count | Source (jump to first uncovered line) |
1 | | //===----------------------------------------------------------------------===// |
2 | | // |
3 | | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | | // See https://llvm.org/LICENSE.txt for license information. |
5 | | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | | // |
7 | | //===----------------------------------------------------------------------===// |
8 | | |
9 | | #include "AMDGPU.h" |
10 | | #include "AMDGPUArgumentUsageInfo.h" |
11 | | #include "SIRegisterInfo.h" |
12 | | #include "llvm/Support/NativeFormatting.h" |
13 | | #include "llvm/Support/raw_ostream.h" |
14 | | |
15 | | using namespace llvm; |
16 | | |
17 | | #define DEBUG_TYPE "amdgpu-argument-reg-usage-info" |
18 | | |
19 | | INITIALIZE_PASS(AMDGPUArgumentUsageInfo, DEBUG_TYPE, |
20 | | "Argument Register Usage Information Storage", false, true) |
21 | | |
22 | | void ArgDescriptor::print(raw_ostream &OS, |
23 | 0 | const TargetRegisterInfo *TRI) const { |
24 | 0 | if (!isSet()) { |
25 | 0 | OS << "<not set>\n"; |
26 | 0 | return; |
27 | 0 | } |
28 | 0 | |
29 | 0 | if (isRegister()) |
30 | 0 | OS << "Reg " << printReg(getRegister(), TRI); |
31 | 0 | else |
32 | 0 | OS << "Stack offset " << getStackOffset(); |
33 | 0 |
|
34 | 0 | if (isMasked()) { |
35 | 0 | OS << " & "; |
36 | 0 | llvm::write_hex(OS, Mask, llvm::HexPrintStyle::PrefixLower); |
37 | 0 | } |
38 | 0 |
|
39 | 0 | OS << '\n'; |
40 | 0 | } |
41 | | |
42 | | char AMDGPUArgumentUsageInfo::ID = 0; |
43 | | |
44 | | const AMDGPUFunctionArgInfo AMDGPUArgumentUsageInfo::ExternFunctionInfo{}; |
45 | | |
46 | 2.66k | bool AMDGPUArgumentUsageInfo::doInitialization(Module &M) { |
47 | 2.66k | return false; |
48 | 2.66k | } |
49 | | |
50 | 2.65k | bool AMDGPUArgumentUsageInfo::doFinalization(Module &M) { |
51 | 2.65k | ArgInfoMap.clear(); |
52 | 2.65k | return false; |
53 | 2.65k | } |
54 | | |
55 | 0 | void AMDGPUArgumentUsageInfo::print(raw_ostream &OS, const Module *M) const { |
56 | 0 | for (const auto &FI : ArgInfoMap) { |
57 | 0 | OS << "Arguments for " << FI.first->getName() << '\n' |
58 | 0 | << " PrivateSegmentBuffer: " << FI.second.PrivateSegmentBuffer |
59 | 0 | << " DispatchPtr: " << FI.second.DispatchPtr |
60 | 0 | << " QueuePtr: " << FI.second.QueuePtr |
61 | 0 | << " KernargSegmentPtr: " << FI.second.KernargSegmentPtr |
62 | 0 | << " DispatchID: " << FI.second.DispatchID |
63 | 0 | << " FlatScratchInit: " << FI.second.FlatScratchInit |
64 | 0 | << " PrivateSegmentSize: " << FI.second.PrivateSegmentSize |
65 | 0 | << " WorkGroupIDX: " << FI.second.WorkGroupIDX |
66 | 0 | << " WorkGroupIDY: " << FI.second.WorkGroupIDY |
67 | 0 | << " WorkGroupIDZ: " << FI.second.WorkGroupIDZ |
68 | 0 | << " WorkGroupInfo: " << FI.second.WorkGroupInfo |
69 | 0 | << " PrivateSegmentWaveByteOffset: " |
70 | 0 | << FI.second.PrivateSegmentWaveByteOffset |
71 | 0 | << " ImplicitBufferPtr: " << FI.second.ImplicitBufferPtr |
72 | 0 | << " ImplicitArgPtr: " << FI.second.ImplicitArgPtr |
73 | 0 | << " WorkItemIDX " << FI.second.WorkItemIDX |
74 | 0 | << " WorkItemIDY " << FI.second.WorkItemIDY |
75 | 0 | << " WorkItemIDZ " << FI.second.WorkItemIDZ |
76 | 0 | << '\n'; |
77 | 0 | } |
78 | 0 | } |
79 | | |
80 | | std::pair<const ArgDescriptor *, const TargetRegisterClass *> |
81 | | AMDGPUFunctionArgInfo::getPreloadedValue( |
82 | 104k | AMDGPUFunctionArgInfo::PreloadedValue Value) const { |
83 | 104k | switch (Value) { |
84 | 104k | case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_BUFFER: { |
85 | 5.51k | return std::make_pair( |
86 | 5.51k | PrivateSegmentBuffer ? &PrivateSegmentBuffer5.51k : nullptr3 , |
87 | 5.51k | &AMDGPU::SGPR_128RegClass); |
88 | 104k | } |
89 | 104k | case AMDGPUFunctionArgInfo::IMPLICIT_BUFFER_PTR: |
90 | 3 | return std::make_pair(ImplicitBufferPtr ? &ImplicitBufferPtr : nullptr0 , |
91 | 3 | &AMDGPU::SGPR_64RegClass); |
92 | 104k | case AMDGPUFunctionArgInfo::WORKGROUP_ID_X: |
93 | 770 | return std::make_pair(WorkGroupIDX ? &WorkGroupIDX97 : nullptr673 , |
94 | 770 | &AMDGPU::SGPR_32RegClass); |
95 | 104k | |
96 | 104k | case AMDGPUFunctionArgInfo::WORKGROUP_ID_Y: |
97 | 744 | return std::make_pair(WorkGroupIDY ? &WorkGroupIDY70 : nullptr674 , |
98 | 744 | &AMDGPU::SGPR_32RegClass); |
99 | 104k | case AMDGPUFunctionArgInfo::WORKGROUP_ID_Z: |
100 | 744 | return std::make_pair(WorkGroupIDZ ? &WorkGroupIDZ70 : nullptr674 , |
101 | 744 | &AMDGPU::SGPR_32RegClass); |
102 | 104k | case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_WAVE_BYTE_OFFSET: |
103 | 24.4k | return std::make_pair( |
104 | 24.4k | PrivateSegmentWaveByteOffset ? &PrivateSegmentWaveByteOffset24.4k : nullptr3 , |
105 | 24.4k | &AMDGPU::SGPR_32RegClass); |
106 | 104k | case AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR: |
107 | 67.0k | return std::make_pair(KernargSegmentPtr ? &KernargSegmentPtr66.3k : nullptr685 , |
108 | 67.0k | &AMDGPU::SGPR_64RegClass); |
109 | 104k | case AMDGPUFunctionArgInfo::IMPLICIT_ARG_PTR: |
110 | 716 | return std::make_pair(ImplicitArgPtr ? &ImplicitArgPtr26 : nullptr690 , |
111 | 716 | &AMDGPU::SGPR_64RegClass); |
112 | 104k | case AMDGPUFunctionArgInfo::DISPATCH_ID: |
113 | 710 | return std::make_pair(DispatchID ? &DispatchID22 : nullptr688 , |
114 | 710 | &AMDGPU::SGPR_64RegClass); |
115 | 104k | case AMDGPUFunctionArgInfo::FLAT_SCRATCH_INIT: |
116 | 431 | return std::make_pair(FlatScratchInit ? &FlatScratchInit : nullptr0 , |
117 | 431 | &AMDGPU::SGPR_64RegClass); |
118 | 104k | case AMDGPUFunctionArgInfo::DISPATCH_PTR: |
119 | 741 | return std::make_pair(DispatchPtr ? &DispatchPtr53 : nullptr688 , |
120 | 741 | &AMDGPU::SGPR_64RegClass); |
121 | 104k | case AMDGPUFunctionArgInfo::QUEUE_PTR: |
122 | 711 | return std::make_pair(QueuePtr ? &QueuePtr24 : nullptr687 , |
123 | 711 | &AMDGPU::SGPR_64RegClass); |
124 | 104k | case AMDGPUFunctionArgInfo::WORKITEM_ID_X: |
125 | 734 | return std::make_pair(WorkItemIDX ? &WorkItemIDX53 : nullptr681 , |
126 | 734 | &AMDGPU::VGPR_32RegClass); |
127 | 104k | case AMDGPUFunctionArgInfo::WORKITEM_ID_Y: |
128 | 707 | return std::make_pair(WorkItemIDY ? &WorkItemIDY21 : nullptr686 , |
129 | 707 | &AMDGPU::VGPR_32RegClass); |
130 | 104k | case AMDGPUFunctionArgInfo::WORKITEM_ID_Z: |
131 | 703 | return std::make_pair(WorkItemIDZ ? &WorkItemIDZ17 : nullptr686 , |
132 | 703 | &AMDGPU::VGPR_32RegClass); |
133 | 0 | } |
134 | 0 | llvm_unreachable("unexpected preloaded value type"); |
135 | 0 | } |