Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
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//===-- AMDGPUInstrInfo.cpp - Base class for AMD GPU InstrInfo ------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief Implementation of the TargetInstrInfo class that is common to all
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/// AMD GPUs.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUInstrInfo.h"
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#include "AMDGPURegisterInfo.h"
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#include "AMDGPUTargetMachine.h"
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#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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using namespace llvm;
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// Pin the vtable to this file.
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//void AMDGPUInstrInfo::anchor() {}
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AMDGPUInstrInfo::AMDGPUInstrInfo(const GCNSubtarget &ST) { }
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// TODO: Should largely merge with AMDGPUTTIImpl::isSourceOfDivergence.
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bool AMDGPUInstrInfo::isUniformMMO(const MachineMemOperand *MMO) {
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  const Value *Ptr = MMO->getValue();
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  // UndefValue means this is a load of a kernel input.  These are uniform.
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  // Sometimes LDS instructions have constant pointers.
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  // If Ptr is null, then that means this mem operand contains a
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  // PseudoSourceValue like GOT.
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  if (!Ptr || 
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||
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isa<Constant>(Ptr)1.47k
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isa<GlobalValue>(Ptr)1.47k
)
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    return true;
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  if (MMO->getAddrSpace() == AMDGPUAS::CONSTANT_ADDRESS_32BIT)
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    return true;
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  if (const Argument *Arg = dyn_cast<Argument>(Ptr))
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    return AMDGPU::isArgPassedInSGPR(Arg);
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  const Instruction *I = dyn_cast<Instruction>(Ptr);
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  return I && I->getMetadata("amdgpu.uniform");
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}