Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/ARM/ARMBasicBlockInfo.h
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//===-- ARMBasicBlockInfo.h - Basic Block Information -----------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Utility functions and data structure for computing block size.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H
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#define LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H
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#include "ARMBaseInstrInfo.h"
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#include "ARMMachineFunctionInfo.h"
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#include "llvm/Support/MathExtras.h"
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#include <algorithm>
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#include <cstdint>
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namespace llvm {
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using BBInfoVector = SmallVectorImpl<BasicBlockInfo>;
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/// UnknownPadding - Return the worst case padding that could result from
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/// unknown offset bits.  This does not include alignment padding caused by
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/// known offset bits.
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///
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/// @param LogAlign log2(alignment)
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/// @param KnownBits Number of known low offset bits.
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inline unsigned UnknownPadding(unsigned LogAlign, unsigned KnownBits) {
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  if (KnownBits < LogAlign)
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    return (1u << LogAlign) - (1u << KnownBits);
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  return 0;
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}
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/// BasicBlockInfo - Information about the offset and size of a single
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/// basic block.
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struct BasicBlockInfo {
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  /// Offset - Distance from the beginning of the function to the beginning
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  /// of this basic block.
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  ///
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  /// Offsets are computed assuming worst case padding before an aligned
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  /// block. This means that subtracting basic block offsets always gives a
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  /// conservative estimate of the real distance which may be smaller.
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  ///
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  /// Because worst case padding is used, the computed offset of an aligned
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  /// block may not actually be aligned.
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  unsigned Offset = 0;
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  /// Size - Size of the basic block in bytes.  If the block contains
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  /// inline assembly, this is a worst case estimate.
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  ///
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  /// The size does not include any alignment padding whether from the
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  /// beginning of the block, or from an aligned jump table at the end.
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  unsigned Size = 0;
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  /// KnownBits - The number of low bits in Offset that are known to be
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  /// exact.  The remaining bits of Offset are an upper bound.
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  uint8_t KnownBits = 0;
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  /// Unalign - When non-zero, the block contains instructions (inline asm)
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  /// of unknown size.  The real size may be smaller than Size bytes by a
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  /// multiple of 1 << Unalign.
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  uint8_t Unalign = 0;
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  /// PostAlign - When non-zero, the block terminator contains a .align
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  /// directive, so the end of the block is aligned to 1 << PostAlign
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  /// bytes.
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  uint8_t PostAlign = 0;
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  BasicBlockInfo() = default;
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  /// Compute the number of known offset bits internally to this block.
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  /// This number should be used to predict worst case padding when
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  /// splitting the block.
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  unsigned internalKnownBits() const {
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    unsigned Bits = Unalign ? 
Unalign739k
:
KnownBits363k
;
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    // If the block size isn't a multiple of the known bits, assume the
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    // worst case padding.
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    if (Size & ((1u << Bits) - 1))
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      Bits = countTrailingZeros(Size);
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    return Bits;
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  }
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  /// Compute the offset immediately following this block.  If LogAlign is
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  /// specified, return the offset the successor block will get if it has
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  /// this alignment.
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  unsigned postOffset(unsigned LogAlign = 0) const {
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    unsigned PO = Offset + Size;
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    unsigned LA = std::max(unsigned(PostAlign), LogAlign);
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    if (!LA)
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      return PO;
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    // Add alignment padding from the terminator.
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    return PO + UnknownPadding(LA, internalKnownBits());
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  }
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  /// Compute the number of known low bits of postOffset.  If this block
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  /// contains inline asm, the number of known bits drops to the
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  /// instruction alignment.  An aligned terminator may increase the number
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  /// of know bits.
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  /// If LogAlign is given, also consider the alignment of the next block.
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1.06M
  unsigned postKnownBits(unsigned LogAlign = 0) const {
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    return std::max(std::max(unsigned(PostAlign), LogAlign),
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                    internalKnownBits());
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  }
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};
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class ARMBasicBlockUtils {
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private:
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  MachineFunction &MF;
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  bool isThumb = false;
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  const ARMBaseInstrInfo *TII = nullptr;
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  SmallVector<BasicBlockInfo, 8> BBInfo;
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public:
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  ARMBasicBlockUtils(MachineFunction &MF) : MF(MF) {
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    TII =
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      static_cast<const ARMBaseInstrInfo*>(MF.getSubtarget().getInstrInfo());
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    isThumb = MF.getInfo<ARMFunctionInfo>()->isThumbFunction();
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  }
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  void computeAllBlockSizes() {
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    BBInfo.resize(MF.getNumBlockIDs());
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    for (MachineBasicBlock &MBB : MF)
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      computeBlockSize(&MBB);
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  }
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  void computeBlockSize(MachineBasicBlock *MBB);
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  unsigned getOffsetOf(MachineInstr *MI) const;
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  unsigned getOffsetOf(MachineBasicBlock *MBB) const {
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    return BBInfo[MBB->getNumber()].Offset;
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  }
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  void adjustBBOffsetsAfter(MachineBasicBlock *MBB);
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  void adjustBBSize(MachineBasicBlock *MBB, int Size) {
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    BBInfo[MBB->getNumber()].Size += Size;
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  }
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  bool isBBInRange(MachineInstr *MI, MachineBasicBlock *DestBB,
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                   unsigned MaxDisp) const;
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  void insert(unsigned BBNum, BasicBlockInfo BBI) {
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    BBInfo.insert(BBInfo.begin() + BBNum, BBI);
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  }
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  void clear() { BBInfo.clear(); }
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  BBInfoVector &getBBInfo() { return BBInfo; }
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H