Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/ARM/ARMInstrInfo.h
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//===-- ARMInstrInfo.h - ARM Instruction Information ------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the ARM implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_ARM_ARMINSTRINFO_H
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#define LLVM_LIB_TARGET_ARM_ARMINSTRINFO_H
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#include "ARMBaseInstrInfo.h"
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#include "ARMRegisterInfo.h"
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namespace llvm {
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  class ARMSubtarget;
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class ARMInstrInfo : public ARMBaseInstrInfo {
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  ARMRegisterInfo RI;
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public:
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  explicit ARMInstrInfo(const ARMSubtarget &STI);
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  /// Return the noop instruction to use for a noop.
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  void getNoop(MCInst &NopInst) const override;
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  // Return the non-pre/post incrementing version of 'Opc'. Return 0
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  // if there is not such an opcode.
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  unsigned getUnindexedOpcode(unsigned Opc) const override;
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  /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
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  /// such, whenever a client has an instance of instruction info, it should
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  /// always be able to get register info as well (through this method).
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  ///
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  const ARMRegisterInfo &getRegisterInfo() const override { return RI; }
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private:
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  void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override;
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};
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}
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#endif