Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h
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//===--- HexagonHazardRecognizer.h - Hexagon Post RA Hazard Recognizer ----===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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// This file defines the hazard recognizer for scheduling on Hexagon.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H
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#define LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H
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#include "HexagonInstrInfo.h"
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#include "HexagonSubtarget.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/CodeGen/DFAPacketizer.h"
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#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
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namespace llvm {
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class HexagonHazardRecognizer : public ScheduleHazardRecognizer {
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  DFAPacketizer *Resources;
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  const HexagonInstrInfo *TII;
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  unsigned PacketNum = 0;
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  // If the packet contains a potential dot cur instruction. This is
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  // used for the scheduling priority function.
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  SUnit *UsesDotCur = nullptr;
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  // The packet number when a dor cur is emitted. If its use is not generated
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  // in the same packet, then try to wait another cycle before emitting.
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  int DotCurPNum = -1;
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  // Does the packet contain a load. Used to restrict another load, if possible.
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  bool UsesLoad = false;
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  // Check if we should prefer a vector store that will become a .new version.
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  // The .new store uses different resources than a normal store, and the
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  // packetizer will not generate the .new if the regular store does not have
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  // resources available (even if the .new version does). To help, the schedule
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  // attempts to schedule the .new as soon as possible in the packet.
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  SUnit *PrefVectorStoreNew = nullptr;
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  // The set of registers defined by instructions in the current packet.
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  SmallSet<unsigned, 8> RegDefs;
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public:
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  HexagonHazardRecognizer(const InstrItineraryData *II,
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                          const HexagonInstrInfo *HII,
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                          const HexagonSubtarget &ST)
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    : Resources(ST.createDFAPacketizer(II)), TII(HII) { }
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  ~HexagonHazardRecognizer() override {
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    if (Resources)
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      delete Resources;
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  }
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  /// This callback is invoked when a new block of instructions is about to be
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  /// scheduled. The hazard state is set to an initialized state.
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  void Reset() override;
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  /// Return the hazard type of emitting this node.  There are three
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  /// possible results.  Either:
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  ///  * NoHazard: it is legal to issue this instruction on this cycle.
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  ///  * Hazard: issuing this instruction would stall the machine.  If some
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  ///     other instruction is available, issue it first.
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  HazardType getHazardType(SUnit *SU, int stalls) override;
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  /// This callback is invoked when an instruction is emitted to be scheduled,
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  /// to advance the hazard state.
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  void EmitInstruction(SUnit *) override;
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  /// This callback may be invoked if getHazardType returns NoHazard. If, even
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  /// though there is no hazard, it would be better to schedule another
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  /// available instruction, this callback should return true.
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  bool ShouldPreferAnother(SUnit *) override;
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  /// This callback is invoked whenever the next top-down instruction to be
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  /// scheduled cannot issue in the current cycle, either because of latency
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  /// or resource conflicts.  This should increment the internal state of the
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  /// hazard recognizer so that previously "Hazard" instructions will now not
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  /// be hazards.
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  void AdvanceCycle() override;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONPROFITRECOGNIZER_H