Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
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//===- HexagonInstPrinter.cpp - Convert Hexagon MCInst to assembly syntax -===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an Hexagon MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#include "HexagonInstPrinter.h"
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#include "MCTargetDesc/HexagonBaseInfo.h"
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#include "MCTargetDesc/HexagonMCInstrInfo.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "asm-printer"
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#define GET_INSTRUCTION_NAME
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#include "HexagonGenAsmWriter.inc"
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void HexagonInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
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  O << getRegisterName(RegNo);
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}
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void HexagonInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
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                                   StringRef Annot, const MCSubtargetInfo &STI) {
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  assert(HexagonMCInstrInfo::isBundle(*MI));
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  assert(HexagonMCInstrInfo::bundleSize(*MI) <= HEXAGON_PACKET_SIZE);
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  assert(HexagonMCInstrInfo::bundleSize(*MI) > 0);
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  HasExtender = false;
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  for (auto const &I : HexagonMCInstrInfo::bundleInstructions(*MI)) {
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    MCInst const &MCI = *I.getInst();
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    if (HexagonMCInstrInfo::isDuplex(MII, MCI)) {
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      printInstruction(MCI.getOperand(1).getInst(), OS);
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      OS << '\v';
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      HasExtender = false;
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      printInstruction(MCI.getOperand(0).getInst(), OS);
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    } else
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      printInstruction(&MCI, OS);
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    HasExtender = HexagonMCInstrInfo::isImmext(MCI);
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    OS << "\n";
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  }
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  bool IsLoop0 = HexagonMCInstrInfo::isInnerLoop(*MI);
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  bool IsLoop1 = HexagonMCInstrInfo::isOuterLoop(*MI);
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  if (IsLoop0) {
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    OS << (IsLoop1 ? 
" :endloop01"6
:
" :endloop0"218
);
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  } else if (IsLoop1) {
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    OS << " :endloop1";
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  }
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}
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void HexagonInstPrinter::printOperand(MCInst const *MI, unsigned OpNo,
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                                      raw_ostream &O) const {
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  if (HexagonMCInstrInfo::getExtendableOp(MII, *MI) == OpNo &&
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(37.4k
HasExtender37.4k
||
HexagonMCInstrInfo::isConstExtended(MII, *MI)35.4k
))
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    O << "#";
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  MCOperand const &MO = MI->getOperand(OpNo);
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  if (MO.isReg()) {
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    O << getRegisterName(MO.getReg());
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  } else 
if (21.3k
MO.isExpr()21.3k
) {
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    int64_t Value;
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    if (MO.getExpr()->evaluateAsAbsolute(Value))
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      O << formatImm(Value);
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    else
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      O << *MO.getExpr();
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  } else {
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    llvm_unreachable("Unknown operand");
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  }
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}
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void HexagonInstPrinter::printBrtarget(MCInst const *MI, unsigned OpNo,
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                                       raw_ostream &O) const {
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  MCOperand const &MO = MI->getOperand(OpNo);
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  assert (MO.isExpr());
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  MCExpr const &Expr = *MO.getExpr();
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  int64_t Value;
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  if (Expr.evaluateAsAbsolute(Value))
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    O << format("0x%" PRIx64, Value);
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  else {
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    if (HasExtender || 
HexagonMCInstrInfo::isConstExtended(MII, *MI)1.80k
)
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      if (HexagonMCInstrInfo::getExtendableOp(MII, *MI) == OpNo)
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        O << "##";
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    O << Expr;
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  }
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}