Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
Line
Count
Source (jump to first uncovered line)
1
//===---- MipsABIInfo.cpp - Information about MIPS ABI's ------------------===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
9
#include "MipsABIInfo.h"
10
#include "MipsRegisterInfo.h"
11
#include "llvm/ADT/StringRef.h"
12
#include "llvm/ADT/StringSwitch.h"
13
#include "llvm/MC/MCTargetOptions.h"
14
15
using namespace llvm;
16
17
// Note: this option is defined here to be visible from libLLVMMipsAsmParser
18
//       and libLLVMMipsCodeGen
19
cl::opt<bool>
20
EmitJalrReloc("mips-jalr-reloc", cl::Hidden,
21
              cl::desc("MIPS: Emit R_{MICRO}MIPS_JALR relocation with jalr"),
22
              cl::init(true));
23
24
namespace {
25
static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3};
26
27
static const MCPhysReg Mips64IntRegs[8] = {
28
    Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64,
29
    Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64};
30
}
31
32
158
ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const {
33
158
  if (IsO32())
34
114
    return makeArrayRef(O32IntRegs);
35
44
  if (IsN32() || IsN64())
36
44
    return makeArrayRef(Mips64IntRegs);
37
0
  llvm_unreachable("Unhandled ABI");
38
0
}
39
40
113
ArrayRef<MCPhysReg> MipsABIInfo::GetVarArgRegs() const {
41
113
  if (IsO32())
42
57
    return makeArrayRef(O32IntRegs);
43
56
  if (IsN32() || 
IsN64()34
)
44
56
    return makeArrayRef(Mips64IntRegs);
45
0
  llvm_unreachable("Unhandled ABI");
46
0
}
47
48
16.6k
unsigned MipsABIInfo::GetCalleeAllocdArgSizeInBytes(CallingConv::ID CC) const {
49
16.6k
  if (IsO32())
50
10.9k
    return CC != CallingConv::Fast ? 
1610.8k
:
0103
;
51
5.61k
  if (IsN32() || 
IsN64()5.04k
)
52
5.61k
    return 0;
53
0
  llvm_unreachable("Unhandled ABI");
54
0
}
55
56
MipsABIInfo MipsABIInfo::computeTargetABI(const Triple &TT, StringRef CPU,
57
9.42k
                                          const MCTargetOptions &Options) {
58
9.42k
  if (Options.getABIName().startswith("o32"))
59
96
    return MipsABIInfo::O32();
60
9.32k
  if (Options.getABIName().startswith("n32"))
61
451
    return MipsABIInfo::N32();
62
8.87k
  if (Options.getABIName().startswith("n64"))
63
731
    return MipsABIInfo::N64();
64
8.14k
  if (TT.getEnvironment() == llvm::Triple::GNUABIN32)
65
72
    return MipsABIInfo::N32();
66
8.07k
  assert(Options.getABIName().empty() && "Unknown ABI option for MIPS");
67
8.07k
68
8.07k
  if (TT.isMIPS64())
69
1.95k
    return MipsABIInfo::N64();
70
6.12k
  return MipsABIInfo::O32();
71
6.12k
}
72
73
34.0k
unsigned MipsABIInfo::GetStackPtr() const {
74
34.0k
  return ArePtrs64bit() ? 
Mips::SP_6411.3k
:
Mips::SP22.7k
;
75
34.0k
}
76
77
38.7k
unsigned MipsABIInfo::GetFramePtr() const {
78
38.7k
  return ArePtrs64bit() ? 
Mips::FP_6412.6k
:
Mips::FP26.1k
;
79
38.7k
}
80
81
79
unsigned MipsABIInfo::GetBasePtr() const {
82
79
  return ArePtrs64bit() ? 
Mips::S7_6418
:
Mips::S761
;
83
79
}
84
85
1.46k
unsigned MipsABIInfo::GetGlobalPtr() const {
86
1.46k
  return ArePtrs64bit() ? 
Mips::GP_64377
:
Mips::GP1.08k
;
87
1.46k
}
88
89
27.2k
unsigned MipsABIInfo::GetNullPtr() const {
90
27.2k
  return ArePtrs64bit() ? 
Mips::ZERO_648.87k
:
Mips::ZERO18.3k
;
91
27.2k
}
92
93
1.63k
unsigned MipsABIInfo::GetZeroReg() const {
94
1.63k
  return AreGprs64bit() ? 
Mips::ZERO_641.12k
:
Mips::ZERO501
;
95
1.63k
}
96
97
214
unsigned MipsABIInfo::GetPtrAdduOp() const {
98
214
  return ArePtrs64bit() ? 
Mips::DADDu44
:
Mips::ADDu170
;
99
214
}
100
101
18.1k
unsigned MipsABIInfo::GetPtrAddiuOp() const {
102
18.1k
  return ArePtrs64bit() ? 
Mips::DADDiu6.07k
:
Mips::ADDiu12.1k
;
103
18.1k
}
104
105
30
unsigned MipsABIInfo::GetPtrSubuOp() const {
106
30
  return ArePtrs64bit() ? 
Mips::DSUBu7
:
Mips::SUBu23
;
107
30
}
108
109
76
unsigned MipsABIInfo::GetPtrAndOp() const {
110
76
  return ArePtrs64bit() ? 
Mips::AND6425
:
Mips::AND51
;
111
76
}
112
113
25.7k
unsigned MipsABIInfo::GetGPRMoveOp() const {
114
25.7k
  return ArePtrs64bit() ? 
Mips::OR648.37k
:
Mips::OR17.3k
;
115
25.7k
}
116
117
252
unsigned MipsABIInfo::GetEhDataReg(unsigned I) const {
118
252
  static const unsigned EhDataReg[] = {
119
252
    Mips::A0, Mips::A1, Mips::A2, Mips::A3
120
252
  };
121
252
  static const unsigned EhDataReg64[] = {
122
252
    Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64
123
252
  };
124
252
125
252
  return IsN64() ? 
EhDataReg64[I]144
:
EhDataReg[I]108
;
126
252
}
127