Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
Line
Count
Source (jump to first uncovered line)
1
//===-- Mips16RegisterInfo.cpp - MIPS16 Register Information --------------===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
//
9
// This file contains the MIPS16 implementation of the TargetRegisterInfo class.
10
//
11
//===----------------------------------------------------------------------===//
12
13
#include "Mips16RegisterInfo.h"
14
#include "Mips.h"
15
#include "Mips16InstrInfo.h"
16
#include "MipsInstrInfo.h"
17
#include "MipsMachineFunction.h"
18
#include "MipsSubtarget.h"
19
#include "llvm/ADT/STLExtras.h"
20
#include "llvm/CodeGen/MachineFrameInfo.h"
21
#include "llvm/CodeGen/MachineFunction.h"
22
#include "llvm/CodeGen/MachineInstrBuilder.h"
23
#include "llvm/CodeGen/MachineRegisterInfo.h"
24
#include "llvm/CodeGen/TargetFrameLowering.h"
25
#include "llvm/CodeGen/TargetInstrInfo.h"
26
#include "llvm/IR/Constants.h"
27
#include "llvm/IR/DebugInfo.h"
28
#include "llvm/IR/Function.h"
29
#include "llvm/IR/Type.h"
30
#include "llvm/Support/Debug.h"
31
#include "llvm/Support/ErrorHandling.h"
32
#include "llvm/Support/raw_ostream.h"
33
#include "llvm/Target/TargetMachine.h"
34
#include "llvm/Target/TargetOptions.h"
35
36
using namespace llvm;
37
38
#define DEBUG_TYPE "mips16-registerinfo"
39
40
2.91k
Mips16RegisterInfo::Mips16RegisterInfo() : MipsRegisterInfo() {}
41
42
bool Mips16RegisterInfo::requiresRegisterScavenging
43
1.13k
  (const MachineFunction &MF) const {
44
1.13k
  return false;
45
1.13k
}
46
bool Mips16RegisterInfo::requiresFrameIndexScavenging
47
380
  (const MachineFunction &MF) const {
48
380
  return false;
49
380
}
50
51
bool Mips16RegisterInfo::useFPForScavengingIndex
52
0
  (const MachineFunction &MF) const {
53
0
  return false;
54
0
}
55
56
bool Mips16RegisterInfo::saveScavengerRegister
57
  (MachineBasicBlock &MBB,
58
   MachineBasicBlock::iterator I,
59
   MachineBasicBlock::iterator &UseMI,
60
   const TargetRegisterClass *RC,
61
0
   unsigned Reg) const {
62
0
  DebugLoc DL;
63
0
  const TargetInstrInfo &TII = *MBB.getParent()->getSubtarget().getInstrInfo();
64
0
  TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true);
65
0
  TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
66
0
  return true;
67
0
}
68
69
const TargetRegisterClass *
70
0
Mips16RegisterInfo::intRegClass(unsigned Size) const {
71
0
  assert(Size == 4);
72
0
  return &Mips::CPU16RegsRegClass;
73
0
}
74
75
void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
76
                                     unsigned OpNo, int FrameIndex,
77
                                     uint64_t StackSize,
78
1.11k
                                     int64_t SPOffset) const {
79
1.11k
  MachineInstr &MI = *II;
80
1.11k
  MachineFunction &MF = *MI.getParent()->getParent();
81
1.11k
  MachineFrameInfo &MFI = MF.getFrameInfo();
82
1.11k
83
1.11k
  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
84
1.11k
  int MinCSFI = 0;
85
1.11k
  int MaxCSFI = -1;
86
1.11k
87
1.11k
  if (CSI.size()) {
88
1.08k
    MinCSFI = CSI[0].getFrameIdx();
89
1.08k
    MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
90
1.08k
  }
91
1.11k
92
1.11k
  // The following stack frame objects are always
93
1.11k
  // referenced relative to $sp:
94
1.11k
  //  1. Outgoing arguments.
95
1.11k
  //  2. Pointer to dynamically allocated stack space.
96
1.11k
  //  3. Locations for callee-saved registers.
97
1.11k
  // Everything else is referenced relative to whatever register
98
1.11k
  // getFrameRegister() returns.
99
1.11k
  unsigned FrameReg;
100
1.11k
101
1.11k
  if (FrameIndex >= MinCSFI && 
FrameIndex <= MaxCSFI30
)
102
0
    FrameReg = Mips::SP;
103
1.11k
  else {
104
1.11k
    const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
105
1.11k
    if (TFI->hasFP(MF)) {
106
870
      FrameReg = Mips::S0;
107
870
    }
108
245
    else {
109
245
      if ((MI.getNumOperands()> OpNo+2) && 
MI.getOperand(OpNo+2).isReg()0
)
110
0
        FrameReg = MI.getOperand(OpNo+2).getReg();
111
245
      else
112
245
        FrameReg = Mips::SP;
113
245
    }
114
1.11k
  }
115
1.11k
  // Calculate final offset.
116
1.11k
  // - There is no need to change the offset if the frame object
117
1.11k
  //   is one of the
118
1.11k
  //   following: an outgoing argument, pointer to a dynamically allocated
119
1.11k
  //   stack space or a $gp restore location,
120
1.11k
  // - If the frame object is any of the following,
121
1.11k
  //   its offset must be adjusted
122
1.11k
  //   by adding the size of the stack:
123
1.11k
  //   incoming argument, callee-saved register location or local variable.
124
1.11k
  int64_t Offset;
125
1.11k
  bool IsKill = false;
126
1.11k
  Offset = SPOffset + (int64_t)StackSize;
127
1.11k
  Offset += MI.getOperand(OpNo + 1).getImm();
128
1.11k
129
1.11k
  LLVM_DEBUG(errs() << "Offset     : " << Offset << "\n"
130
1.11k
                    << "<--------->\n");
131
1.11k
132
1.11k
  if (!MI.isDebugValue() &&
133
1.11k
      !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
134
0
    MachineBasicBlock &MBB = *MI.getParent();
135
0
    DebugLoc DL = II->getDebugLoc();
136
0
    unsigned NewImm;
137
0
    const Mips16InstrInfo &TII =
138
0
        *static_cast<const Mips16InstrInfo *>(MF.getSubtarget().getInstrInfo());
139
0
    FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
140
0
    Offset = SignExtend64<16>(NewImm);
141
0
    IsKill = true;
142
0
  }
143
1.11k
  MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
144
1.11k
  MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
145
1.11k
146
1.11k
147
1.11k
}