Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/Mips/MipsFrameLowering.cpp
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//===-- MipsFrameLowering.cpp - Mips Frame Information --------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Mips implementation of TargetFrameLowering class.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsFrameLowering.h"
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#include "MCTargetDesc/MipsBaseInfo.h"
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#include "MipsInstrInfo.h"
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#include "MipsMachineFunction.h"
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#include "MipsTargetMachine.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Target/TargetOptions.h"
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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//
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// Stack Frame Processing methods
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// +----------------------------+
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//
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// The stack is allocated decrementing the stack pointer on
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// the first instruction of a function prologue. Once decremented,
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// all stack references are done thought a positive offset
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// from the stack/frame pointer, so the stack is considering
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// to grow up! Otherwise terrible hacks would have to be made
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// to get this stack ABI compliant :)
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//
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//  The stack frame required by the ABI (after call):
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//  Offset
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//
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//  0                 ----------
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//  4                 Args to pass
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//  .                 saved $GP  (used in PIC)
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//  .                 Alloca allocations
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//  .                 Local Area
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//  .                 CPU "Callee Saved" Registers
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//  .                 saved FP
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//  .                 saved RA
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//  .                 FPU "Callee Saved" Registers
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//  StackSize         -----------
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//
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// Offset - offset from sp after stack allocation on function prologue
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//
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// The sp is the stack pointer subtracted/added from the stack size
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// at the Prologue/Epilogue
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//
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// References to the previous stack (to obtain arguments) are done
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// with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1))
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//
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// Examples:
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// - reference to the actual stack frame
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//   for any local area var there is smt like : FI >= 0, StackOffset: 4
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//     sw REGX, 4(SP)
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//
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// - reference to previous stack frame
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//   suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16.
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//   The emitted instruction will be something like:
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//     lw REGX, 16+StackSize(SP)
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//
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// Since the total stack size is unknown on LowerFormalArguments, all
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// stack references (ObjectOffset) created to reference the function
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// arguments, are negative numbers. This way, on eliminateFrameIndex it's
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// possible to detect those references and the offsets are adjusted to
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// their real location.
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//
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//===----------------------------------------------------------------------===//
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const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) {
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  if (ST.inMips16Mode())
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    return llvm::createMips16FrameLowering(ST);
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  return llvm::createMipsSEFrameLowering(ST);
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}
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// hasFP - Return true if the specified function should have a dedicated frame
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// pointer register.  This is true if the function has variable sized allocas,
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// if it needs dynamic stack realignment, if frame pointer elimination is
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// disabled, or if the frame address is taken.
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bool MipsFrameLowering::hasFP(const MachineFunction &MF) const {
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  const MachineFrameInfo &MFI = MF.getFrameInfo();
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  const TargetRegisterInfo *TRI = STI.getRegisterInfo();
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  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
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MFI.hasVarSizedObjects()143k
||
MFI.isFrameAddressTaken()142k
||
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TRI->needsStackRealignment(MF)142k
;
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}
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bool MipsFrameLowering::hasBP(const MachineFunction &MF) const {
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  const MachineFrameInfo &MFI = MF.getFrameInfo();
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  const TargetRegisterInfo *TRI = STI.getRegisterInfo();
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  return MFI.hasVarSizedObjects() && 
TRI->needsStackRealignment(MF)115
;
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}
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// Estimate the size of the stack, including the incoming arguments. We need to
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// account for register spills, local objects, reserved call frame and incoming
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// arguments. This is required to determine the largest possible positive offset
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// from $sp so that it can be determined if an emergency spill slot for stack
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// addresses is required.
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uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const {
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  const MachineFrameInfo &MFI = MF.getFrameInfo();
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  const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
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  int64_t Size = 0;
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  // Iterate over fixed sized objects which are incoming arguments.
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  for (int I = MFI.getObjectIndexBegin(); I != 0; 
++I2.24k
)
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    if (MFI.getObjectOffset(I) > 0)
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      Size += MFI.getObjectSize(I);
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  // Conservatively assume all callee-saved registers will be saved.
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  for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; 
++R221k
) {
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    unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R));
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    Size = alignTo(Size + RegSize, RegSize);
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  }
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  // Get the size of the rest of the frame objects and any possible reserved
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  // call frame, accounting for alignment.
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  return Size + MFI.estimateStackSize(MF);
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}
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// Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions
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MachineBasicBlock::iterator MipsFrameLowering::
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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                              MachineBasicBlock::iterator I) const {
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  unsigned SP = STI.getABI().IsN64() ? 
Mips::SP_641.57k
:
Mips::SP4.67k
;
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  if (!hasReservedCallFrame(MF)) {
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    int64_t Amount = I->getOperand(0).getImm();
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    if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
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      Amount = -Amount;
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    STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I);
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  }
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  return MBB.erase(I);
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}