Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/Mips/MipsMachineFunction.h
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//===- MipsMachineFunctionInfo.h - Private data used for Mips ---*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the Mips specific subclass of MachineFunctionInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSMACHINEFUNCTION_H
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#define LLVM_LIB_TARGET_MIPS_MIPSMACHINEFUNCTION_H
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#include "Mips16HardFloatInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include <map>
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namespace llvm {
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/// MipsFunctionInfo - This class is derived from MachineFunction private
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/// Mips target-specific information for each MachineFunction.
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class MipsFunctionInfo : public MachineFunctionInfo {
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public:
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  MipsFunctionInfo(MachineFunction &MF) : MF(MF) {}
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  ~MipsFunctionInfo() override;
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  unsigned getSRetReturnReg() const { return SRetReturnReg; }
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  void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; }
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  bool globalBaseRegSet() const;
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  Register getGlobalBaseReg();
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  Register getGlobalBaseRegForGlobalISel();
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  // Insert instructions to initialize the global base register in the
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  // first MBB of the function.
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  void initGlobalBaseReg();
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  int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
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  void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
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  bool hasByvalArg() const { return HasByvalArg; }
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  void setFormalArgInfo(unsigned Size, bool HasByval) {
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    IncomingArgSize = Size;
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    HasByvalArg = HasByval;
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  }
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  unsigned getIncomingArgSize() const { return IncomingArgSize; }
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  bool callsEhReturn() const { return CallsEhReturn; }
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  void setCallsEhReturn() { CallsEhReturn = true; }
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  void createEhDataRegsFI();
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  int getEhDataRegFI(unsigned Reg) const { return EhDataRegFI[Reg]; }
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  bool isEhDataRegFI(int FI) const;
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  /// Create a MachinePointerInfo that has an ExternalSymbolPseudoSourceValue
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  /// object representing a GOT entry for an external function.
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  MachinePointerInfo callPtrInfo(const char *ES);
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  // Functions with the "interrupt" attribute require special prologues,
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  // epilogues and additional spill slots.
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  bool isISR() const { return IsISR; }
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  void setISR() { IsISR = true; }
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  void createISRRegFI();
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  int getISRRegFI(unsigned Reg) const { return ISRDataRegFI[Reg]; }
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  bool isISRRegFI(int FI) const;
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  /// Create a MachinePointerInfo that has a GlobalValuePseudoSourceValue object
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  /// representing a GOT entry for a global function.
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  MachinePointerInfo callPtrInfo(const GlobalValue *GV);
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  void setSaveS2() { SaveS2 = true; }
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  bool hasSaveS2() const { return SaveS2; }
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  int getMoveF64ViaSpillFI(const TargetRegisterClass *RC);
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  std::map<const char *, const Mips16HardFloatInfo::FuncSignature *>
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  StubsNeeded;
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private:
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  virtual void anchor();
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  MachineFunction& MF;
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  /// SRetReturnReg - Some subtargets require that sret lowering includes
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  /// returning the value of the returned struct in a register. This field
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  /// holds the virtual register into which the sret argument is passed.
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  unsigned SRetReturnReg = 0;
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  /// GlobalBaseReg - keeps track of the virtual register initialized for
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  /// use as the global base register. This is used for PIC in some PIC
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  /// relocation models.
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  unsigned GlobalBaseReg = 0;
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  /// VarArgsFrameIndex - FrameIndex for start of varargs area.
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  int VarArgsFrameIndex = 0;
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  /// True if function has a byval argument.
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  bool HasByvalArg;
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  /// Size of incoming argument area.
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  unsigned IncomingArgSize;
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  /// CallsEhReturn - Whether the function calls llvm.eh.return.
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  bool CallsEhReturn = false;
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  /// Frame objects for spilling eh data registers.
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  int EhDataRegFI[4];
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  /// ISR - Whether the function is an Interrupt Service Routine.
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  bool IsISR = false;
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  /// Frame objects for spilling C0_STATUS, C0_EPC
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  int ISRDataRegFI[2];
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  // saveS2
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  bool SaveS2 = false;
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  /// FrameIndex for expanding BuildPairF64 nodes to spill and reload when the
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  /// O32 FPXX ABI is enabled. -1 is used to denote invalid index.
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  int MoveF64ViaSpillFI = -1;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_MIPS_MIPSMACHINEFUNCTION_H