Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp
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//===-- PPCMachObjectWriter.cpp - PPC Mach-O Writer -----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/PPCFixupKinds.h"
10
#include "MCTargetDesc/PPCMCTargetDesc.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/BinaryFormat/MachO.h"
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#include "llvm/MC/MCAsmLayout.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCMachObjectWriter.h"
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#include "llvm/MC/MCSectionMachO.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Format.h"
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using namespace llvm;
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namespace {
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class PPCMachObjectWriter : public MCMachObjectTargetWriter {
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  bool recordScatteredRelocation(MachObjectWriter *Writer,
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                                 const MCAssembler &Asm,
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                                 const MCAsmLayout &Layout,
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                                 const MCFragment *Fragment,
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                                 const MCFixup &Fixup, MCValue Target,
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                                 unsigned Log2Size, uint64_t &FixedValue);
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  void RecordPPCRelocation(MachObjectWriter *Writer, const MCAssembler &Asm,
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                           const MCAsmLayout &Layout,
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                           const MCFragment *Fragment, const MCFixup &Fixup,
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                           MCValue Target, uint64_t &FixedValue);
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public:
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  PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
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      : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
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  void recordRelocation(MachObjectWriter *Writer, MCAssembler &Asm,
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                        const MCAsmLayout &Layout, const MCFragment *Fragment,
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                        const MCFixup &Fixup, MCValue Target,
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                        uint64_t &FixedValue) override {
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    if (Writer->is64Bit()) {
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0
      report_fatal_error("Relocation emission for MachO/PPC64 unimplemented.");
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0
    } else
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      RecordPPCRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
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6
                          FixedValue);
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6
  }
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};
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}
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/// computes the log2 of the size of the relocation,
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/// used for relocation_info::r_length.
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6
static unsigned getFixupKindLog2Size(unsigned Kind) {
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  switch (Kind) {
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6
  default:
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0
    report_fatal_error("log2size(FixupKind): Unhandled fixup kind!");
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  case FK_PCRel_1:
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0
  case FK_Data_1:
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0
    return 0;
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0
  case FK_PCRel_2:
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0
  case FK_Data_2:
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0
    return 1;
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  case FK_PCRel_4:
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  case PPC::fixup_ppc_brcond14:
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  case PPC::fixup_ppc_half16:
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  case PPC::fixup_ppc_br24:
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  case FK_Data_4:
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    return 2;
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  case FK_PCRel_8:
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0
  case FK_Data_8:
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0
    return 3;
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0
  }
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  return 0;
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0
}
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/// Translates generic PPC fixup kind to Mach-O/PPC relocation type enum.
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/// Outline based on PPCELFObjectWriter::getRelocType().
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static unsigned getRelocType(const MCValue &Target,
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                             const MCFixupKind FixupKind, // from
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                                                          // Fixup.getKind()
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                             const bool IsPCRel) {
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  const MCSymbolRefExpr::VariantKind Modifier =
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      Target.isAbsolute() ? 
MCSymbolRefExpr::VK_None0
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                          : Target.getSymA()->getKind();
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  // determine the type of the relocation
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  unsigned Type = MachO::GENERIC_RELOC_VANILLA;
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  if (IsPCRel) { // relative to PC
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    switch ((unsigned)FixupKind) {
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1
    default:
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0
      report_fatal_error("Unimplemented fixup kind (relative)");
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    case PPC::fixup_ppc_br24:
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      Type = MachO::PPC_RELOC_BR24; // R_PPC_REL24
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      break;
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    case PPC::fixup_ppc_brcond14:
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      Type = MachO::PPC_RELOC_BR14;
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0
      break;
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    case PPC::fixup_ppc_half16:
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      switch (Modifier) {
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0
      default:
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        llvm_unreachable("Unsupported modifier for half16 fixup");
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      case MCSymbolRefExpr::VK_PPC_HA:
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        Type = MachO::PPC_RELOC_HA16;
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        break;
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      case MCSymbolRefExpr::VK_PPC_LO:
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        Type = MachO::PPC_RELOC_LO16;
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0
        break;
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      case MCSymbolRefExpr::VK_PPC_HI:
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0
        Type = MachO::PPC_RELOC_HI16;
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0
        break;
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0
      }
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0
      break;
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    }
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  } else {
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    switch ((unsigned)FixupKind) {
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    default:
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      report_fatal_error("Unimplemented fixup kind (absolute)!");
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    case PPC::fixup_ppc_half16:
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      switch (Modifier) {
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      default:
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        llvm_unreachable("Unsupported modifier for half16 fixup");
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      case MCSymbolRefExpr::VK_PPC_HA:
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        Type = MachO::PPC_RELOC_HA16_SECTDIFF;
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        break;
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      case MCSymbolRefExpr::VK_PPC_LO:
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        Type = MachO::PPC_RELOC_LO16_SECTDIFF;
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        break;
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      case MCSymbolRefExpr::VK_PPC_HI:
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        Type = MachO::PPC_RELOC_HI16_SECTDIFF;
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        break;
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      }
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      break;
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    case FK_Data_4:
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      break;
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    case FK_Data_2:
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0
      break;
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    }
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  }
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  return Type;
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}
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static void makeRelocationInfo(MachO::any_relocation_info &MRE,
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                               const uint32_t FixupOffset, const uint32_t Index,
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                               const unsigned IsPCRel, const unsigned Log2Size,
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                               const unsigned IsExtern, const unsigned Type) {
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  MRE.r_word0 = FixupOffset;
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  // The bitfield offsets that work (as determined by trial-and-error)
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  // are different than what is documented in the mach-o manuals.
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  // This appears to be an endianness issue; reversing the order of the
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  // documented bitfields in <llvm/BinaryFormat/MachO.h> fixes this (but
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  // breaks x86/ARM assembly).
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  MRE.r_word1 = ((Index << 8) |    // was << 0
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                 (IsPCRel << 7) |  // was << 24
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                 (Log2Size << 5) | // was << 25
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                 (IsExtern << 4) | // was << 27
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                 (Type << 0));     // was << 28
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}
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static void
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makeScatteredRelocationInfo(MachO::any_relocation_info &MRE,
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                            const uint32_t Addr, const unsigned Type,
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                            const unsigned Log2Size, const unsigned IsPCRel,
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                            const uint32_t Value2) {
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  // For notes on bitfield positions and endianness, see:
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  // https://developer.apple.com/library/mac/documentation/developertools/conceptual/MachORuntime/Reference/reference.html#//apple_ref/doc/uid/20001298-scattered_relocation_entry
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  MRE.r_word0 = ((Addr << 0) | (Type << 24) | (Log2Size << 28) |
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                 (IsPCRel << 30) | MachO::R_SCATTERED);
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  MRE.r_word1 = Value2;
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}
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/// Compute fixup offset (address).
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static uint32_t getFixupOffset(const MCAsmLayout &Layout,
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                               const MCFragment *Fragment,
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                               const MCFixup &Fixup) {
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  uint32_t FixupOffset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
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  // On Mach-O, ppc_fixup_half16 relocations must refer to the
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  // start of the instruction, not the second halfword, as ELF does
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  if (unsigned(Fixup.getKind()) == PPC::fixup_ppc_half16)
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    FixupOffset &= ~uint32_t(3);
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  return FixupOffset;
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}
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/// \return false if falling back to using non-scattered relocation,
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/// otherwise true for normal scattered relocation.
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/// based on X86MachObjectWriter::recordScatteredRelocation
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/// and ARMMachObjectWriter::recordScatteredRelocation
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bool PPCMachObjectWriter::recordScatteredRelocation(
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    MachObjectWriter *Writer, const MCAssembler &Asm, const MCAsmLayout &Layout,
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    const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target,
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    unsigned Log2Size, uint64_t &FixedValue) {
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  // caller already computes these, can we just pass and reuse?
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  const uint32_t FixupOffset = getFixupOffset(Layout, Fragment, Fixup);
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  const MCFixupKind FK = Fixup.getKind();
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  const unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, FK);
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  const unsigned Type = getRelocType(Target, FK, IsPCRel);
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200
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  // Is this a local or SECTDIFF relocation entry?
201
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  // SECTDIFF relocation entries have symbol subtractions,
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  // and require two entries, the first for the add-symbol value,
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  // the second for the subtract-symbol value.
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205
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  // See <reloc.h>.
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  const MCSymbol *A = &Target.getSymA()->getSymbol();
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  if (!A->getFragment())
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    report_fatal_error("symbol '" + A->getName() +
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                       "' can not be undefined in a subtraction expression");
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  uint32_t Value = Writer->getSymbolAddress(*A, Layout);
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  uint64_t SecAddr = Writer->getSectionAddress(A->getFragment()->getParent());
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  FixedValue += SecAddr;
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  uint32_t Value2 = 0;
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  if (const MCSymbolRefExpr *B = Target.getSymB()) {
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    const MCSymbol *SB = &B->getSymbol();
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220
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    if (!SB->getFragment())
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      report_fatal_error("symbol '" + SB->getName() +
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                         "' can not be undefined in a subtraction expression");
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    // FIXME: is Type correct? see include/llvm/BinaryFormat/MachO.h
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    Value2 = Writer->getSymbolAddress(*SB, Layout);
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    FixedValue -= Writer->getSectionAddress(SB->getFragment()->getParent());
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  }
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  // FIXME: does FixedValue get used??
229
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230
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  // Relocations are written out in reverse order, so the PAIR comes first.
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  if (Type == MachO::PPC_RELOC_SECTDIFF ||
232
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      Type == MachO::PPC_RELOC_HI16_SECTDIFF ||
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      Type == MachO::PPC_RELOC_LO16_SECTDIFF ||
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Type == MachO::PPC_RELOC_HA16_SECTDIFF2
||
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Type == MachO::PPC_RELOC_LO14_SECTDIFF0
||
236
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Type == MachO::PPC_RELOC_LOCAL_SECTDIFF0
) {
237
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    // X86 had this piece, but ARM does not
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    // If the offset is too large to fit in a scattered relocation,
239
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    // we're hosed. It's an unfortunate limitation of the MachO format.
240
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    if (FixupOffset > 0xffffff) {
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0
      char Buffer[32];
242
0
      format("0x%x", FixupOffset).print(Buffer, sizeof(Buffer));
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      Asm.getContext().reportError(Fixup.getLoc(),
244
0
                                  Twine("Section too large, can't encode "
245
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                                        "r_address (") +
246
0
                                      Buffer + ") into 24 bits of scattered "
247
0
                                               "relocation entry.");
248
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      return false;
249
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    }
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251
4
    // Is this supposed to follow MCTarget/PPCAsmBackend.cpp:adjustFixupValue()?
252
4
    // see PPCMCExpr::evaluateAsRelocatableImpl()
253
4
    uint32_t other_half = 0;
254
4
    switch (Type) {
255
4
    case MachO::PPC_RELOC_LO16_SECTDIFF:
256
2
      other_half = (FixedValue >> 16) & 0xffff;
257
2
      // applyFixupOffset longer extracts the high part because it now assumes
258
2
      // this was already done.
259
2
      // It looks like this is not true for the FixedValue needed with Mach-O
260
2
      // relocs.
261
2
      // So we need to adjust FixedValue again here.
262
2
      FixedValue &= 0xffff;
263
2
      break;
264
4
    case MachO::PPC_RELOC_HA16_SECTDIFF:
265
2
      other_half = FixedValue & 0xffff;
266
2
      FixedValue =
267
2
          ((FixedValue >> 16) + ((FixedValue & 0x8000) ? 
10
: 0)) & 0xffff;
268
2
      break;
269
4
    case MachO::PPC_RELOC_HI16_SECTDIFF:
270
0
      other_half = FixedValue & 0xffff;
271
0
      FixedValue = (FixedValue >> 16) & 0xffff;
272
0
      break;
273
4
    default:
274
0
      llvm_unreachable("Invalid PPC scattered relocation type.");
275
4
      
break0
;
276
4
    }
277
4
278
4
    MachO::any_relocation_info MRE;
279
4
    makeScatteredRelocationInfo(MRE, other_half, MachO::GENERIC_RELOC_PAIR,
280
4
                                Log2Size, IsPCRel, Value2);
281
4
    Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
282
4
  } else {
283
0
    // If the offset is more than 24-bits, it won't fit in a scattered
284
0
    // relocation offset field, so we fall back to using a non-scattered
285
0
    // relocation. This is a bit risky, as if the offset reaches out of
286
0
    // the block and the linker is doing scattered loading on this
287
0
    // symbol, things can go badly.
288
0
    //
289
0
    // Required for 'as' compatibility.
290
0
    if (FixupOffset > 0xffffff)
291
0
      return false;
292
4
  }
293
4
  MachO::any_relocation_info MRE;
294
4
  makeScatteredRelocationInfo(MRE, FixupOffset, Type, Log2Size, IsPCRel, Value);
295
4
  Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
296
4
  return true;
297
4
}
298
299
// see PPCELFObjectWriter for a general outline of cases
300
void PPCMachObjectWriter::RecordPPCRelocation(
301
    MachObjectWriter *Writer, const MCAssembler &Asm, const MCAsmLayout &Layout,
302
    const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target,
303
6
    uint64_t &FixedValue) {
304
6
  const MCFixupKind FK = Fixup.getKind(); // unsigned
305
6
  const unsigned Log2Size = getFixupKindLog2Size(FK);
306
6
  const bool IsPCRel = Writer->isFixupKindPCRel(Asm, FK);
307
6
  const unsigned RelocType = getRelocType(Target, FK, IsPCRel);
308
6
309
6
  // If this is a difference or a defined symbol plus an offset, then we need a
310
6
  // scattered relocation entry. Differences always require scattered
311
6
  // relocations.
312
6
  if (Target.getSymB() &&
313
6
      // Q: are branch targets ever scattered?
314
6
      
RelocType != MachO::PPC_RELOC_BR244
&&
315
6
      
RelocType != MachO::PPC_RELOC_BR144
) {
316
4
    recordScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
317
4
                              Log2Size, FixedValue);
318
4
    return;
319
4
  }
320
2
321
2
  // this doesn't seem right for RIT_PPC_BR24
322
2
  // Get the symbol data, if any.
323
2
  const MCSymbol *A = nullptr;
324
2
  if (Target.getSymA())
325
2
    A = &Target.getSymA()->getSymbol();
326
2
327
2
  // See <reloc.h>.
328
2
  const uint32_t FixupOffset = getFixupOffset(Layout, Fragment, Fixup);
329
2
  unsigned Index = 0;
330
2
  unsigned Type = RelocType;
331
2
332
2
  const MCSymbol *RelSymbol = nullptr;
333
2
  if (Target.isAbsolute()) { // constant
334
0
                             // SymbolNum of 0 indicates the absolute section.
335
0
                             //
336
0
    // FIXME: Currently, these are never generated (see code below). I cannot
337
0
    // find a case where they are actually emitted.
338
0
    report_fatal_error("FIXME: relocations to absolute targets "
339
0
                       "not yet implemented");
340
0
    // the above line stolen from ARM, not sure
341
2
  } else {
342
2
    // Resolve constant variables.
343
2
    if (A->isVariable()) {
344
0
      int64_t Res;
345
0
      if (A->getVariableValue()->evaluateAsAbsolute(
346
0
              Res, Layout, Writer->getSectionAddressMap())) {
347
0
        FixedValue = Res;
348
0
        return;
349
0
      }
350
2
    }
351
2
352
2
    // Check whether we need an external or internal relocation.
353
2
    if (Writer->doesSymbolRequireExternRelocation(*A)) {
354
1
      RelSymbol = A;
355
1
      // For external relocations, make sure to offset the fixup value to
356
1
      // compensate for the addend of the symbol address, if it was
357
1
      // undefined. This occurs with weak definitions, for example.
358
1
      if (!A->isUndefined())
359
0
        FixedValue -= Layout.getSymbolOffset(*A);
360
1
    } else {
361
1
      // The index is the section ordinal (1-based).
362
1
      const MCSection &Sec = A->getSection();
363
1
      Index = Sec.getOrdinal() + 1;
364
1
      FixedValue += Writer->getSectionAddress(&Sec);
365
1
    }
366
2
    if (IsPCRel)
367
1
      FixedValue -= Writer->getSectionAddress(Fragment->getParent());
368
2
  }
369
2
370
2
  // struct relocation_info (8 bytes)
371
2
  MachO::any_relocation_info MRE;
372
2
  makeRelocationInfo(MRE, FixupOffset, Index, IsPCRel, Log2Size, false, Type);
373
2
  Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
374
2
}
375
376
std::unique_ptr<MCObjectTargetWriter>
377
llvm::createPPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
378
4
                                uint32_t CPUSubtype) {
379
4
  return llvm::make_unique<PPCMachObjectWriter>(Is64Bit, CPUType, CPUSubtype);
380
4
}