Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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//===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the PPC specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "PPCSubtarget.h"
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#include "PPC.h"
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#include "PPCRegisterInfo.h"
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#include "PPCTargetMachine.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineScheduler.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/GlobalValue.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Target/TargetMachine.h"
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#include <cstdlib>
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using namespace llvm;
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#define DEBUG_TYPE "ppc-subtarget"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "PPCGenSubtargetInfo.inc"
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static cl::opt<bool> UseSubRegLiveness("ppc-track-subreg-liveness",
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cl::desc("Enable subregister liveness tracking for PPC"), cl::Hidden);
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static cl::opt<bool> QPXStackUnaligned("qpx-stack-unaligned",
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  cl::desc("Even when QPX is enabled the stack is not 32-byte aligned"),
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  cl::Hidden);
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static cl::opt<bool>
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    EnableMachinePipeliner("ppc-enable-pipeliner",
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                           cl::desc("Enable Machine Pipeliner for PPC"),
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                           cl::init(false), cl::Hidden);
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PPCSubtarget &PPCSubtarget::initializeSubtargetDependencies(StringRef CPU,
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                                                            StringRef FS) {
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  initializeEnvironment();
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  initSubtargetFeatures(CPU, FS);
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  return *this;
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}
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PPCSubtarget::PPCSubtarget(const Triple &TT, const std::string &CPU,
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                           const std::string &FS, const PPCTargetMachine &TM)
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    : PPCGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT),
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      IsPPC64(TargetTriple.getArch() == Triple::ppc64 ||
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              TargetTriple.getArch() == Triple::ppc64le),
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      TM(TM), FrameLowering(initializeSubtargetDependencies(CPU, FS)),
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      InstrInfo(*this), TLInfo(TM, *this) {}
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void PPCSubtarget::initializeEnvironment() {
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  StackAlignment = 16;
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  DarwinDirective = PPC::DIR_NONE;
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  HasMFOCRF = false;
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  Has64BitSupport = false;
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  Use64BitRegs = false;
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  UseCRBits = false;
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  HasHardFloat = false;
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  HasAltivec = false;
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  HasSPE = false;
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  HasFPU = false;
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  HasQPX = false;
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  HasVSX = false;
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  NeedsTwoConstNR = false;
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  HasP8Vector = false;
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  HasP8Altivec = false;
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  HasP8Crypto = false;
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  HasP9Vector = false;
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  HasP9Altivec = false;
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  HasFCPSGN = false;
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  HasFSQRT = false;
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  HasFRE = false;
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  HasFRES = false;
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  HasFRSQRTE = false;
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  HasFRSQRTES = false;
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  HasRecipPrec = false;
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  HasSTFIWX = false;
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  HasLFIWAX = false;
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  HasFPRND = false;
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  HasFPCVT = false;
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  HasISEL = false;
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  HasBPERMD = false;
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  HasExtDiv = false;
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  HasCMPB = false;
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  HasLDBRX = false;
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  IsBookE = false;
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  HasOnlyMSYNC = false;
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  IsPPC4xx = false;
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  IsPPC6xx = false;
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  IsE500 = false;
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  FeatureMFTB = false;
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  DeprecatedDST = false;
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  HasLazyResolverStubs = false;
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  HasICBT = false;
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  HasInvariantFunctionDescriptors = false;
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  HasPartwordAtomics = false;
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  HasDirectMove = false;
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  IsQPXStackUnaligned = false;
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  HasHTM = false;
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  HasFloat128 = false;
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  IsISA3_0 = false;
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  UseLongCalls = false;
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  SecurePlt = false;
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  VectorsUseTwoUnits = false;
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  UsePPCPreRASchedStrategy = false;
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  UsePPCPostRASchedStrategy = false;
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  HasPOPCNTD = POPCNTD_Unavailable;
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}
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void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
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  // Determine default and user specified characteristics
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  std::string CPUName = CPU;
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  if (CPUName.empty() || 
CPU == "generic"1.15k
) {
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    // If cross-compiling with -march=ppc64le without -mcpu
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    if (TargetTriple.getArch() == Triple::ppc64le)
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      CPUName = "ppc64le";
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    else
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      CPUName = "generic";
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  }
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  // Initialize scheduling itinerary for the specified CPU.
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  InstrItins = getInstrItineraryForCPU(CPUName);
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  // Parse features string.
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  ParseSubtargetFeatures(CPUName, FS);
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  // If the user requested use of 64-bit regs, but the cpu selected doesn't
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  // support it, ignore.
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  if (IsPPC64 && 
has64BitSupport()1.46k
)
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    Use64BitRegs = true;
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  // Set up darwin-specific properties.
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  if (isDarwin())
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    HasLazyResolverStubs = true;
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  if (TargetTriple.isOSNetBSD() || 
TargetTriple.isOSOpenBSD()1.84k
||
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TargetTriple.isMusl()1.84k
)
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    SecurePlt = true;
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  if (HasSPE && 
IsPPC644
)
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    report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
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  if (HasSPE && 
(4
HasAltivec4
||
HasQPX4
||
HasVSX4
||
HasFPU4
))
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    report_fatal_error(
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        "SPE and traditional floating point cannot both be enabled.\n", false);
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  // If not SPE, set standard FPU
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  if (!HasSPE)
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    HasFPU = true;
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  // QPX requires a 32-byte aligned stack. Note that we need to do this if
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  // we're compiling for a BG/Q system regardless of whether or not QPX
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  // is enabled because external functions will assume this alignment.
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  IsQPXStackUnaligned = QPXStackUnaligned;
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  StackAlignment = getPlatformStackAlignment();
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  // Determine endianness.
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  // FIXME: Part of the TargetMachine.
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  IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le);
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}
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/// Return true if accesses to the specified global have to go through a dyld
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/// lazy resolution stub.  This means that an extra load is required to get the
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/// address of the global.
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bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV) const {
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  if (!HasLazyResolverStubs)
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    return false;
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  if (!TM.shouldAssumeDSOLocal(*GV->getParent(), GV))
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    return true;
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  // 32 bit macho has no relocation for a-b if a is undefined, even if b is in
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  // the section that is being relocated. This means we have to use o load even
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  // for GVs that are known to be local to the dso.
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  if (GV->isDeclarationForLinker() || GV->hasCommonLinkage())
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    return true;
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  return false;
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}
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bool PPCSubtarget::enableMachineScheduler() const { return true; }
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bool PPCSubtarget::enableMachinePipeliner() const {
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  return (DarwinDirective == PPC::DIR_PWR9) && 
EnableMachinePipeliner2.46k
;
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}
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bool PPCSubtarget::useDFAforSMS() const { return false; }
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// This overrides the PostRAScheduler bit in the SchedModel for each CPU.
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bool PPCSubtarget::enablePostRAScheduler() const { return true; }
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PPCGenSubtargetInfo::AntiDepBreakMode PPCSubtarget::getAntiDepBreakMode() const {
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  return TargetSubtargetInfo::ANTIDEP_ALL;
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}
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void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
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  CriticalPathRCs.clear();
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  CriticalPathRCs.push_back(isPPC64() ?
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                            &PPC::G8RCRegClass : &PPC::GPRCRegClass);
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}
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void PPCSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
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                                       unsigned NumRegionInstrs) const {
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  // The GenericScheduler that we use defaults to scheduling bottom up only.
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  // We want to schedule from both the top and the bottom and so we set
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  // OnlyBottomUp to false.
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  // We want to do bi-directional scheduling since it provides a more balanced
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  // schedule leading to better performance.
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  Policy.OnlyBottomUp = false;
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  // Spilling is generally expensive on all PPC cores, so always enable
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  // register-pressure tracking.
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  Policy.ShouldTrackPressure = true;
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}
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bool PPCSubtarget::useAA() const {
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  return true;
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}
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bool PPCSubtarget::enableSubRegLiveness() const {
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  return UseSubRegLiveness;
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}
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unsigned char
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PPCSubtarget::classifyGlobalReference(const GlobalValue *GV) const {
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  // Note that currently we don't generate non-pic references.
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  // If a caller wants that, this will have to be updated.
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  // Large code model always uses the TOC even for local symbols.
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  if (TM.getCodeModel() == CodeModel::Large)
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    return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG;
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  if (TM.shouldAssumeDSOLocal(*GV->getParent(), GV))
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    return PPCII::MO_PIC_FLAG;
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  return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG;
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}
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bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); }
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bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); }