Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/RISCV/RISCVFrameLowering.h
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//===-- RISCVFrameLowering.h - Define frame lowering for RISCV -*- C++ -*--===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This class implements RISCV-specific bits of TargetFrameLowering class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_RISCVFRAMELOWERING_H
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#define LLVM_LIB_TARGET_RISCV_RISCVFRAMELOWERING_H
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#include "llvm/CodeGen/TargetFrameLowering.h"
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namespace llvm {
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class RISCVSubtarget;
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class RISCVFrameLowering : public TargetFrameLowering {
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public:
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  explicit RISCVFrameLowering(const RISCVSubtarget &STI)
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      : TargetFrameLowering(StackGrowsDown,
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                            /*StackAlignment=*/16,
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                            /*LocalAreaOffset=*/0),
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        STI(STI) {}
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  void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
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  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
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  int getFrameIndexReference(const MachineFunction &MF, int FI,
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                             unsigned &FrameReg) const override;
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  void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
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                            RegScavenger *RS) const override;
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  void processFunctionBeforeFrameFinalized(MachineFunction &MF,
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                                           RegScavenger *RS) const override;
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  bool hasFP(const MachineFunction &MF) const override;
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  bool hasReservedCallFrame(const MachineFunction &MF) const override;
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  MachineBasicBlock::iterator
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  eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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                                MachineBasicBlock::iterator MI) const override;
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protected:
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  const RISCVSubtarget &STI;
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private:
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  void determineFrameLayout(MachineFunction &MF) const;
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  void adjustReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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                 const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
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                 int64_t Val, MachineInstr::MIFlag Flag) const;
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};
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}
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#endif