Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
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//=- RISCVMachineFunctionInfo.h - RISCV machine function info -----*- C++ -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares RISCV-specific per-machine-function information.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_RISCVMACHINEFUNCTIONINFO_H
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#define LLVM_LIB_TARGET_RISCV_RISCVMACHINEFUNCTIONINFO_H
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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namespace llvm {
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/// RISCVMachineFunctionInfo - This class is derived from MachineFunctionInfo
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/// and contains private RISCV-specific information for each MachineFunction.
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class RISCVMachineFunctionInfo : public MachineFunctionInfo {
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private:
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  MachineFunction &MF;
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  /// FrameIndex for start of varargs area
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  int VarArgsFrameIndex = 0;
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  /// Size of the save area used for varargs
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  int VarArgsSaveSize = 0;
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  /// FrameIndex used for transferring values between 64-bit FPRs and a pair
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  /// of 32-bit GPRs via the stack.
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  int MoveF64FrameIndex = -1;
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public:
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  RISCVMachineFunctionInfo(MachineFunction &MF) : MF(MF) {}
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  int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
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  void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
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  unsigned getVarArgsSaveSize() const { return VarArgsSaveSize; }
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  void setVarArgsSaveSize(int Size) { VarArgsSaveSize = Size; }
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  int getMoveF64FrameIndex() {
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    if (MoveF64FrameIndex == -1)
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      MoveF64FrameIndex = MF.getFrameInfo().CreateStackObject(8, 8, false);
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    return MoveF64FrameIndex;
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  }
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_RISCV_RISCVMACHINEFUNCTIONINFO_H