Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/SystemZ/SystemZMachineScheduler.h
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//==- SystemZMachineScheduler.h - SystemZ Scheduler Interface ----*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// -------------------------- Post RA scheduling ---------------------------- //
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// SystemZPostRASchedStrategy is a scheduling strategy which is plugged into
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// the MachineScheduler. It has a sorted Available set of SUs and a pickNode()
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// implementation that looks to optimize decoder grouping and balance the
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// usage of processor resources. Scheduler states are saved for the end
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// region of each MBB, so that a successor block can learn from it.
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//===----------------------------------------------------------------------===//
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#include "SystemZHazardRecognizer.h"
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#include "llvm/CodeGen/MachineScheduler.h"
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#include "llvm/CodeGen/ScheduleDAG.h"
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#include <set>
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
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#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
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using namespace llvm;
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namespace llvm {
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/// A MachineSchedStrategy implementation for SystemZ post RA scheduling.
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class SystemZPostRASchedStrategy : public MachineSchedStrategy {
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  const MachineLoopInfo *MLI;
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  const SystemZInstrInfo *TII;
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  // A SchedModel is needed before any DAG is built while advancing past
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  // non-scheduled instructions, so it would not always be possible to call
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  // DAG->getSchedClass(SU).
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  TargetSchedModel SchedModel;
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  /// A candidate during instruction evaluation.
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  struct Candidate {
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    SUnit *SU = nullptr;
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    /// The decoding cost.
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    int GroupingCost = 0;
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    /// The processor resources cost.
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    int ResourcesCost = 0;
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    Candidate() = default;
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    Candidate(SUnit *SU_, SystemZHazardRecognizer &HazardRec);
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    // Compare two candidates.
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    bool operator<(const Candidate &other);
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    // Check if this node is free of cost ("as good as any").
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    bool noCost() const {
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      return (GroupingCost <= 0 && 
!ResourcesCost12.4k
);
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    }
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#ifndef NDEBUG
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    void dumpCosts() {
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      if (GroupingCost != 0)
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        dbgs() << "  Grouping cost:" << GroupingCost;
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      if (ResourcesCost != 0)
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        dbgs() << "  Resource cost:" << ResourcesCost;
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    }
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#endif
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  };
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  // A sorter for the Available set that makes sure that SUs are considered
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  // in the best order.
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  struct SUSorter {
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    bool operator() (SUnit *lhs, SUnit *rhs) const {
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      if (lhs->isScheduleHigh && 
!rhs->isScheduleHigh2.06k
)
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        return true;
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      if (!lhs->isScheduleHigh && 
rhs->isScheduleHigh63.4k
)
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        return false;
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      if (lhs->getHeight() > rhs->getHeight())
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        return true;
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      else if (lhs->getHeight() < rhs->getHeight())
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        return false;
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      return (lhs->NodeNum < rhs->NodeNum);
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    }
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  };
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  // A set of SUs with a sorter and dump method.
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  struct SUSet : std::set<SUnit*, SUSorter> {
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    #ifndef NDEBUG
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    void dump(SystemZHazardRecognizer &HazardRec) const;
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    #endif
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  };
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  /// The set of available SUs to schedule next.
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  SUSet Available;
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  /// Current MBB
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  MachineBasicBlock *MBB;
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  /// Maintain hazard recognizers for all blocks, so that the scheduler state
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  /// can be maintained past BB boundaries when appropariate.
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  typedef std::map<MachineBasicBlock*, SystemZHazardRecognizer*> MBB2HazRec;
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  MBB2HazRec SchedStates;
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  /// Pointer to the HazardRecognizer that tracks the scheduler state for
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  /// the current region.
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  SystemZHazardRecognizer *HazardRec;
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  /// Update the scheduler state by emitting (non-scheduled) instructions
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  /// up to, but not including, NextBegin.
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  void advanceTo(MachineBasicBlock::iterator NextBegin);
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public:
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  SystemZPostRASchedStrategy(const MachineSchedContext *C);
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  virtual ~SystemZPostRASchedStrategy();
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  /// Called for a region before scheduling.
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  void initPolicy(MachineBasicBlock::iterator Begin,
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                  MachineBasicBlock::iterator End,
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                  unsigned NumRegionInstrs) override;
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  /// PostRA scheduling does not track pressure.
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  bool shouldTrackPressure() const override { return false; }
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  // Process scheduling regions top-down so that scheduler states can be
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  // transferrred over scheduling boundaries.
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  bool doMBBSchedRegionsTopDown() const override { return true; }
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  void initialize(ScheduleDAGMI *dag) override;
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  /// Tell the strategy that MBB is about to be processed.
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  void enterMBB(MachineBasicBlock *NextMBB) override;
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  /// Tell the strategy that current MBB is done.
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  void leaveMBB() override;
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  /// Pick the next node to schedule, or return NULL.
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  SUnit *pickNode(bool &IsTopNode) override;
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  /// ScheduleDAGMI has scheduled an instruction - tell HazardRec
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  /// about it.
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  void schedNode(SUnit *SU, bool IsTopNode) override;
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  /// SU has had all predecessor dependencies resolved. Put it into
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  /// Available.
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  void releaseTopNode(SUnit *SU) override;
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  /// Currently only scheduling top-down, so this method is empty.
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  void releaseBottomNode(SUnit *SU) override {};
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H