Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
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//===-- SystemZTargetMachine.cpp - Define TargetMachine for SystemZ -------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZTargetMachine.h"
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#include "MCTargetDesc/SystemZMCTargetDesc.h"
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#include "SystemZ.h"
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#include "SystemZMachineScheduler.h"
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#include "SystemZTargetTransformInfo.h"
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#include "TargetInfo/SystemZTargetInfo.h"
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#include "llvm/ADT/Optional.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Target/TargetLoweringObjectFile.h"
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#include "llvm/Transforms/Scalar.h"
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#include <string>
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using namespace llvm;
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extern "C" void LLVMInitializeSystemZTarget() {
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  // Register the target.
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  RegisterTargetMachine<SystemZTargetMachine> X(getTheSystemZTarget());
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}
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// Determine whether we use the vector ABI.
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static bool UsesVectorABI(StringRef CPU, StringRef FS) {
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  // We use the vector ABI whenever the vector facility is avaiable.
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  // This is the case by default if CPU is z13 or later, and can be
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  // overridden via "[+-]vector" feature string elements.
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  bool VectorABI = true;
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  if (CPU.empty() || 
CPU == "generic"624
||
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CPU == "z10"623
||
CPU == "z196"494
||
CPU == "zEC12"427
)
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    VectorABI = false;
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  SmallVector<StringRef, 3> Features;
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  FS.split(Features, ',', -1, false /* KeepEmpty */);
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  for (auto &Feature : Features) {
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    if (Feature == "vector" || Feature == "+vector")
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      VectorABI = true;
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    if (Feature == "-vector")
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      VectorABI = false;
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  }
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  return VectorABI;
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}
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static std::string computeDataLayout(const Triple &TT, StringRef CPU,
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                                     StringRef FS) {
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  bool VectorABI = UsesVectorABI(CPU, FS);
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  std::string Ret;
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  // Big endian.
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  Ret += "E";
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  // Data mangling.
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  Ret += DataLayout::getManglingComponent(TT);
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  // Make sure that global data has at least 16 bits of alignment by
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  // default, so that we can refer to it using LARL.  We don't have any
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  // special requirements for stack variables though.
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  Ret += "-i1:8:16-i8:8:16";
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  // 64-bit integers are naturally aligned.
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  Ret += "-i64:64";
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  // 128-bit floats are aligned only to 64 bits.
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  Ret += "-f128:64";
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  // When using the vector ABI, 128-bit vectors are also aligned to 64 bits.
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  if (VectorABI)
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    Ret += "-v128:64";
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  // We prefer 16 bits of aligned for all globals; see above.
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  Ret += "-a:8:16";
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  // Integer registers are 32 or 64 bits.
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  Ret += "-n32:64";
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  return Ret;
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}
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static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
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  // Static code is suitable for use in a dynamic executable; there is no
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  // separate DynamicNoPIC model.
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  if (!RM.hasValue() || 
*RM == Reloc::DynamicNoPIC114
)
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    return Reloc::Static;
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  return *RM;
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}
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// For SystemZ we define the models as follows:
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//
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// Small:  BRASL can call any function and will use a stub if necessary.
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//         Locally-binding symbols will always be in range of LARL.
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//
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// Medium: BRASL can call any function and will use a stub if necessary.
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//         GOT slots and locally-defined text will always be in range
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//         of LARL, but other symbols might not be.
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//
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// Large:  Equivalent to Medium for now.
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//
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// Kernel: Equivalent to Medium for now.
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//
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// This means that any PIC module smaller than 4GB meets the
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// requirements of Small, so Small seems like the best default there.
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//
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// All symbols bind locally in a non-PIC module, so the choice is less
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// obvious.  There are two cases:
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//
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// - When creating an executable, PLTs and copy relocations allow
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//   us to treat external symbols as part of the executable.
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//   Any executable smaller than 4GB meets the requirements of Small,
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//   so that seems like the best default.
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//
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// - When creating JIT code, stubs will be in range of BRASL if the
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//   image is less than 4GB in size.  GOT entries will likewise be
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//   in range of LARL.  However, the JIT environment has no equivalent
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//   of copy relocs, so locally-binding data symbols might not be in
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//   the range of LARL.  We need the Medium model in that case.
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static CodeModel::Model
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getEffectiveSystemZCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM,
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                             bool JIT) {
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  if (CM) {
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    if (*CM == CodeModel::Tiny)
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      report_fatal_error("Target does not support the tiny CodeModel", false);
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    if (*CM == CodeModel::Kernel)
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      report_fatal_error("Target does not support the kernel CodeModel", false);
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    return *CM;
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  }
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  if (JIT)
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    return RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;
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  return CodeModel::Small;
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}
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SystemZTargetMachine::SystemZTargetMachine(const Target &T, const Triple &TT,
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                                           StringRef CPU, StringRef FS,
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                                           const TargetOptions &Options,
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                                           Optional<Reloc::Model> RM,
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                                           Optional<CodeModel::Model> CM,
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                                           CodeGenOpt::Level OL, bool JIT)
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    : LLVMTargetMachine(
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          T, computeDataLayout(TT, CPU, FS), TT, CPU, FS, Options,
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          getEffectiveRelocModel(RM),
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          getEffectiveSystemZCodeModel(CM, getEffectiveRelocModel(RM), JIT),
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          OL),
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      TLOF(llvm::make_unique<TargetLoweringObjectFileELF>()),
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      Subtarget(TT, CPU, FS, *this) {
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  initAsmInfo();
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}
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SystemZTargetMachine::~SystemZTargetMachine() = default;
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namespace {
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/// SystemZ Code Generator Pass Configuration Options.
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class SystemZPassConfig : public TargetPassConfig {
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public:
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  SystemZPassConfig(SystemZTargetMachine &TM, PassManagerBase &PM)
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    : TargetPassConfig(TM, PM) {}
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  SystemZTargetMachine &getSystemZTargetMachine() const {
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    return getTM<SystemZTargetMachine>();
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  }
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  ScheduleDAGInstrs *
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  createPostMachineScheduler(MachineSchedContext *C) const override {
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    return new ScheduleDAGMI(C,
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                             llvm::make_unique<SystemZPostRASchedStrategy>(C),
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                             /*RemoveKillFlags=*/true);
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  }
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  void addIRPasses() override;
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  bool addInstSelector() override;
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  bool addILPOpts() override;
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  void addPostRewrite() override;
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  void addPreSched2() override;
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  void addPreEmitPass() override;
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};
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} // end anonymous namespace
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void SystemZPassConfig::addIRPasses() {
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  if (getOptLevel() != CodeGenOpt::None) {
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    addPass(createSystemZTDCPass());
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    addPass(createLoopDataPrefetchPass());
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  }
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  TargetPassConfig::addIRPasses();
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}
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bool SystemZPassConfig::addInstSelector() {
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  addPass(createSystemZISelDag(getSystemZTargetMachine(), getOptLevel()));
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 if (getOptLevel() != CodeGenOpt::None)
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    addPass(createSystemZLDCleanupPass(getSystemZTargetMachine()));
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  return false;
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}
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bool SystemZPassConfig::addILPOpts() {
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  addPass(&EarlyIfConverterID);
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  return true;
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}
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void SystemZPassConfig::addPostRewrite() {
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  addPass(createSystemZPostRewritePass(getSystemZTargetMachine()));
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}
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void SystemZPassConfig::addPreSched2() {
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  // PostRewrite needs to be run at -O0 also (in which case addPostRewrite()
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  // is not called).
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  if (getOptLevel() == CodeGenOpt::None)
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    addPass(createSystemZPostRewritePass(getSystemZTargetMachine()));
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  addPass(createSystemZExpandPseudoPass(getSystemZTargetMachine()));
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  if (getOptLevel() != CodeGenOpt::None)
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    addPass(&IfConverterID);
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}
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void SystemZPassConfig::addPreEmitPass() {
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  // Do instruction shortening before compare elimination because some
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  // vector instructions will be shortened into opcodes that compare
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  // elimination recognizes.
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  if (getOptLevel() != CodeGenOpt::None)
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    addPass(createSystemZShortenInstPass(getSystemZTargetMachine()), false);
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  // We eliminate comparisons here rather than earlier because some
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  // transformations can change the set of available CC values and we
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  // generally want those transformations to have priority.  This is
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  // especially true in the commonest case where the result of the comparison
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  // is used by a single in-range branch instruction, since we will then
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  // be able to fuse the compare and the branch instead.
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  //
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  // For example, two-address NILF can sometimes be converted into
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  // three-address RISBLG.  NILF produces a CC value that indicates whether
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  // the low word is zero, but RISBLG does not modify CC at all.  On the
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  // other hand, 64-bit ANDs like NILL can sometimes be converted to RISBG.
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  // The CC value produced by NILL isn't useful for our purposes, but the
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  // value produced by RISBG can be used for any comparison with zero
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  // (not just equality).  So there are some transformations that lose
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  // CC values (while still being worthwhile) and others that happen to make
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  // the CC result more useful than it was originally.
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  //
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  // Another reason is that we only want to use BRANCH ON COUNT in cases
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  // where we know that the count register is not going to be spilled.
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  //
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  // Doing it so late makes it more likely that a register will be reused
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  // between the comparison and the branch, but it isn't clear whether
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  // preventing that would be a win or not.
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  if (getOptLevel() != CodeGenOpt::None)
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    addPass(createSystemZElimComparePass(getSystemZTargetMachine()), false);
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  addPass(createSystemZLongBranchPass(getSystemZTargetMachine()));
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  // Do final scheduling after all other optimizations, to get an
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  // optimal input for the decoder (branch relaxation must happen
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  // after block placement).
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  if (getOptLevel() != CodeGenOpt::None)
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    addPass(&PostMachineSchedulerID);
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}
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TargetPassConfig *SystemZTargetMachine::createPassConfig(PassManagerBase &PM) {
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  return new SystemZPassConfig(*this, PM);
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}
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TargetTransformInfo
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SystemZTargetMachine::getTargetTransformInfo(const Function &F) {
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  return TargetTransformInfo(SystemZTTIImpl(this, F));
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}