Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp
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//===- WebAssemblyPrepareForLiveIntervals.cpp - Prepare for LiveIntervals -===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// Fix up code to meet LiveInterval's requirements.
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///
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/// Some CodeGen passes don't preserve LiveInterval's requirements, because
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/// they run after register allocation and it isn't important. However,
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/// WebAssembly runs LiveIntervals in a late pass. This pass transforms code
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/// to meet LiveIntervals' requirements; primarily, it ensures that all
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/// virtual register uses have definitions (IMPLICIT_DEF definitions if
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/// nothing else).
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///
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssembly.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblySubtarget.h"
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#include "WebAssemblyUtilities.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-prepare-for-live-intervals"
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namespace {
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class WebAssemblyPrepareForLiveIntervals final : public MachineFunctionPass {
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public:
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  static char ID; // Pass identification, replacement for typeid
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  WebAssemblyPrepareForLiveIntervals() : MachineFunctionPass(ID) {}
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private:
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  StringRef getPassName() const override {
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    return "WebAssembly Prepare For LiveIntervals";
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  }
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  void getAnalysisUsage(AnalysisUsage &AU) const override {
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    AU.setPreservesCFG();
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    MachineFunctionPass::getAnalysisUsage(AU);
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  }
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  bool runOnMachineFunction(MachineFunction &MF) override;
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};
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} // end anonymous namespace
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char WebAssemblyPrepareForLiveIntervals::ID = 0;
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INITIALIZE_PASS(WebAssemblyPrepareForLiveIntervals, DEBUG_TYPE,
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                "Fix up code for LiveIntervals", false, false)
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FunctionPass *llvm::createWebAssemblyPrepareForLiveIntervals() {
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  return new WebAssemblyPrepareForLiveIntervals();
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}
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// Test whether the given register has an ARGUMENT def.
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static bool hasArgumentDef(unsigned Reg, const MachineRegisterInfo &MRI) {
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  for (const auto &Def : MRI.def_instructions(Reg))
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    if (WebAssembly::isArgument(Def.getOpcode()))
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      return true;
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return false23.0k
;
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}
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bool WebAssemblyPrepareForLiveIntervals::runOnMachineFunction(
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    MachineFunction &MF) {
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  LLVM_DEBUG({
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    dbgs() << "********** Prepare For LiveIntervals **********\n"
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           << "********** Function: " << MF.getName() << '\n';
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  });
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  bool Changed = false;
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  MachineRegisterInfo &MRI = MF.getRegInfo();
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  const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
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  MachineBasicBlock &Entry = *MF.begin();
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  assert(!mustPreserveAnalysisID(LiveIntervalsID) &&
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         "LiveIntervals shouldn't be active yet!");
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  // We don't preserve SSA form.
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  MRI.leaveSSA();
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  // BranchFolding and perhaps other passes don't preserve IMPLICIT_DEF
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  // instructions. LiveIntervals requires that all paths to virtual register
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  // uses provide a definition. Insert IMPLICIT_DEFs in the entry block to
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  // conservatively satisfy this.
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  //
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  // TODO: This is fairly heavy-handed; find a better approach.
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  //
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  for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; 
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) {
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    unsigned Reg = TargetRegisterInfo::index2VirtReg(I);
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    // Skip unused registers.
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    if (MRI.use_nodbg_empty(Reg))
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      continue;
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    // Skip registers that have an ARGUMENT definition.
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    if (hasArgumentDef(Reg, MRI))
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      continue;
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    BuildMI(Entry, Entry.begin(), DebugLoc(),
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            TII.get(WebAssembly::IMPLICIT_DEF), Reg);
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    Changed = true;
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  }
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  // Move ARGUMENT_* instructions to the top of the entry block, so that their
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  // liveness reflects the fact that these really are live-in values.
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  for (auto MII = Entry.begin(), MIE = Entry.end(); MII != MIE;) {
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    MachineInstr &MI = *MII++;
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    if (WebAssembly::isArgument(MI.getOpcode())) {
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      MI.removeFromParent();
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      Entry.insert(Entry.begin(), &MI);
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    }
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  }
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  // Ok, we're now ready to run the LiveIntervals analysis again.
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  MF.getProperties().set(MachineFunctionProperties::Property::TracksLiveness);
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  return Changed;
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}