Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
Line
Count
Source
1
//===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
//
9
// This file includes code for rendering MCInst instances as AT&T-style
10
// assembly.
11
//
12
//===----------------------------------------------------------------------===//
13
14
#include "X86ATTInstPrinter.h"
15
#include "X86BaseInfo.h"
16
#include "X86InstComments.h"
17
#include "llvm/MC/MCExpr.h"
18
#include "llvm/MC/MCInst.h"
19
#include "llvm/MC/MCInstrInfo.h"
20
#include "llvm/MC/MCSubtargetInfo.h"
21
#include "llvm/Support/Casting.h"
22
#include "llvm/Support/ErrorHandling.h"
23
#include "llvm/Support/Format.h"
24
#include "llvm/Support/raw_ostream.h"
25
#include <cassert>
26
#include <cinttypes>
27
#include <cstdint>
28
29
using namespace llvm;
30
31
#define DEBUG_TYPE "asm-printer"
32
33
// Include the auto-generated portion of the assembly writer.
34
#define PRINT_ALIAS_INSTR
35
#include "X86GenAsmWriter.inc"
36
37
1.93M
void X86ATTInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
38
1.93M
  OS << markup("<reg:") << '%' << getRegisterName(RegNo) << markup(">");
39
1.93M
}
40
41
void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
42
1.14M
                                  StringRef Annot, const MCSubtargetInfo &STI) {
43
1.14M
  // If verbose assembly is enabled, we can print some informative comments.
44
1.14M
  if (CommentStream)
45
890k
    HasCustomInstComment = EmitAnyX86InstComments(MI, *CommentStream, MII);
46
1.14M
47
1.14M
  printInstFlags(MI, OS);
48
1.14M
49
1.14M
  // Output CALLpcrel32 as "callq" in 64-bit mode.
50
1.14M
  // In Intel annotation it's always emitted as "call".
51
1.14M
  //
52
1.14M
  // TODO: Probably this hack should be redesigned via InstAlias in
53
1.14M
  // InstrInfo.td as soon as Requires clause is supported properly
54
1.14M
  // for InstAlias.
55
1.14M
  if (MI->getOpcode() == X86::CALLpcrel32 &&
56
1.14M
      
(STI.getFeatureBits()[X86::Mode64Bit])3.98k
) {
57
53
    OS << "\tcallq\t";
58
53
    printPCRelImm(MI, 0, OS);
59
53
  }
60
1.14M
  // data16 and data32 both have the same encoding of 0x66. While data32 is
61
1.14M
  // valid only in 16 bit systems, data16 is valid in the rest.
62
1.14M
  // There seems to be some lack of support of the Requires clause that causes
63
1.14M
  // 0x66 to be interpreted as "data16" by the asm printer.
64
1.14M
  // Thus we add an adjustment here in order to print the "right" instruction.
65
1.14M
  else if (MI->getOpcode() == X86::DATA16_PREFIX &&
66
1.14M
           
STI.getFeatureBits()[X86::Mode16Bit]65
) {
67
4
   OS << "\tdata32";
68
4
  }
69
1.14M
  // Try to print any aliases first.
70
1.14M
  else if (!printAliasInstr(MI, OS) &&
71
1.14M
           
!printVecCompareInstr(MI, OS)1.14M
)
72
1.13M
    printInstruction(MI, OS);
73
1.14M
74
1.14M
  // Next always print the annotation.
75
1.14M
  printAnnotation(OS, Annot);
76
1.14M
}
77
78
bool X86ATTInstPrinter::printVecCompareInstr(const MCInst *MI,
79
1.14M
                                             raw_ostream &OS) {
80
1.14M
  if (MI->getNumOperands() == 0 ||
81
1.14M
      
!MI->getOperand(MI->getNumOperands() - 1).isImm()1.07M
)
82
885k
    return false;
83
262k
84
262k
  int64_t Imm = MI->getOperand(MI->getNumOperands() - 1).getImm();
85
262k
86
262k
  const MCInstrDesc &Desc = MII.get(MI->getOpcode());
87
262k
88
262k
  // Custom print the vector compare instructions to get the immediate
89
262k
  // translated into the mnemonic.
90
262k
  switch (MI->getOpcode()) {
91
262k
  
case X86::CMPPDrmi: 1.06k
case X86::CMPPDrri:
92
1.06k
  case X86::CMPPSrmi:    case X86::CMPPSrri:
93
1.06k
  case X86::CMPSDrm:     case X86::CMPSDrr:
94
1.06k
  case X86::CMPSDrm_Int: case X86::CMPSDrr_Int:
95
1.06k
  case X86::CMPSSrm:     case X86::CMPSSrr:
96
1.06k
  case X86::CMPSSrm_Int: case X86::CMPSSrr_Int:
97
1.06k
    if (Imm >= 0 && Imm <= 7) {
98
1.06k
      OS << '\t';
99
1.06k
      printCMPMnemonic(MI, /*IsVCMP*/false, OS);
100
1.06k
101
1.06k
      if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) {
102
230
        if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XS)
103
47
          printdwordmem(MI, 2, OS);
104
183
        else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD)
105
41
          printqwordmem(MI, 2, OS);
106
142
        else
107
142
          printxmmwordmem(MI, 2, OS);
108
230
      } else
109
835
        printOperand(MI, 2, OS);
110
1.06k
111
1.06k
      // Skip operand 1 as its tied to the dest.
112
1.06k
113
1.06k
      OS << ", ";
114
1.06k
      printOperand(MI, 0, OS);
115
1.06k
      return true;
116
1.06k
    }
117
4
    break;
118
4
119
4.03k
  case X86::VCMPPDrmi:      case X86::VCMPPDrri:
120
4.03k
  case X86::VCMPPDYrmi:     case X86::VCMPPDYrri:
121
4.03k
  case X86::VCMPPDZ128rmi:  case X86::VCMPPDZ128rri:
122
4.03k
  case X86::VCMPPDZ256rmi:  case X86::VCMPPDZ256rri:
123
4.03k
  case X86::VCMPPDZrmi:     case X86::VCMPPDZrri:
124
4.03k
  case X86::VCMPPSrmi:      case X86::VCMPPSrri:
125
4.03k
  case X86::VCMPPSYrmi:     case X86::VCMPPSYrri:
126
4.03k
  case X86::VCMPPSZ128rmi:  case X86::VCMPPSZ128rri:
127
4.03k
  case X86::VCMPPSZ256rmi:  case X86::VCMPPSZ256rri:
128
4.03k
  case X86::VCMPPSZrmi:     case X86::VCMPPSZrri:
129
4.03k
  case X86::VCMPSDrm:       case X86::VCMPSDrr:
130
4.03k
  case X86::VCMPSDZrm:      case X86::VCMPSDZrr:
131
4.03k
  case X86::VCMPSDrm_Int:   case X86::VCMPSDrr_Int:
132
4.03k
  case X86::VCMPSDZrm_Int:  case X86::VCMPSDZrr_Int:
133
4.03k
  case X86::VCMPSSrm:       case X86::VCMPSSrr:
134
4.03k
  case X86::VCMPSSZrm:      case X86::VCMPSSZrr:
135
4.03k
  case X86::VCMPSSrm_Int:   case X86::VCMPSSrr_Int:
136
4.03k
  case X86::VCMPSSZrm_Int:  case X86::VCMPSSZrr_Int:
137
4.03k
  case X86::VCMPPDZ128rmik: case X86::VCMPPDZ128rrik:
138
4.03k
  case X86::VCMPPDZ256rmik: case X86::VCMPPDZ256rrik:
139
4.03k
  case X86::VCMPPDZrmik:    case X86::VCMPPDZrrik:
140
4.03k
  case X86::VCMPPSZ128rmik: case X86::VCMPPSZ128rrik:
141
4.03k
  case X86::VCMPPSZ256rmik: case X86::VCMPPSZ256rrik:
142
4.03k
  case X86::VCMPPSZrmik:    case X86::VCMPPSZrrik:
143
4.03k
  case X86::VCMPSDZrm_Intk: case X86::VCMPSDZrr_Intk:
144
4.03k
  case X86::VCMPSSZrm_Intk: case X86::VCMPSSZrr_Intk:
145
4.03k
  case X86::VCMPPDZ128rmbi: case X86::VCMPPDZ128rmbik:
146
4.03k
  case X86::VCMPPDZ256rmbi: case X86::VCMPPDZ256rmbik:
147
4.03k
  case X86::VCMPPDZrmbi:    case X86::VCMPPDZrmbik:
148
4.03k
  case X86::VCMPPSZ128rmbi: case X86::VCMPPSZ128rmbik:
149
4.03k
  case X86::VCMPPSZ256rmbi: case X86::VCMPPSZ256rmbik:
150
4.03k
  case X86::VCMPPSZrmbi:    case X86::VCMPPSZrmbik:
151
4.03k
  case X86::VCMPPDZrrib:    case X86::VCMPPDZrribk:
152
4.03k
  case X86::VCMPPSZrrib:    case X86::VCMPPSZrribk:
153
4.03k
  case X86::VCMPSDZrrb_Int: case X86::VCMPSDZrrb_Intk:
154
4.03k
  case X86::VCMPSSZrrb_Int: case X86::VCMPSSZrrb_Intk:
155
4.03k
    if (Imm >= 0 && 
Imm <= 314.03k
) {
156
3.88k
      OS << '\t';
157
3.88k
      printCMPMnemonic(MI, /*IsVCMP*/true, OS);
158
3.88k
159
3.88k
      unsigned CurOp = (Desc.TSFlags & X86II::EVEX_K) ? 
3262
:
23.62k
;
160
3.88k
161
3.88k
      if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) {
162
854
        if (Desc.TSFlags & X86II::EVEX_B) {
163
139
          // Broadcast form.
164
139
          // Load size is based on W-bit.
165
139
          if (Desc.TSFlags & X86II::VEX_W)
166
88
            printqwordmem(MI, CurOp--, OS);
167
51
          else
168
51
            printdwordmem(MI, CurOp--, OS);
169
139
170
139
          // Print the number of elements broadcasted.
171
139
          unsigned NumElts;
172
139
          if (Desc.TSFlags & X86II::EVEX_L2)
173
103
            NumElts = (Desc.TSFlags & X86II::VEX_W) ? 
868
:
1635
;
174
36
          else if (Desc.TSFlags & X86II::VEX_L)
175
16
            NumElts = (Desc.TSFlags & X86II::VEX_W) ? 
49
:
87
;
176
20
          else
177
20
            NumElts = (Desc.TSFlags & X86II::VEX_W) ? 
211
:
49
;
178
139
          OS << "{1to" << NumElts << "}";
179
715
        } else {
180
715
          if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XS)
181
129
            printdwordmem(MI, CurOp--, OS);
182
586
          else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD)
183
114
            printqwordmem(MI, CurOp--, OS);
184
472
          else if (Desc.TSFlags & X86II::EVEX_L2)
185
108
            printzmmwordmem(MI, CurOp--, OS);
186
364
          else if (Desc.TSFlags & X86II::VEX_L)
187
158
            printymmwordmem(MI, CurOp--, OS);
188
206
          else
189
206
            printxmmwordmem(MI, CurOp--, OS);
190
715
        }
191
3.03k
      } else {
192
3.03k
        if (Desc.TSFlags & X86II::EVEX_B)
193
64
          OS << "{sae}, ";
194
3.03k
        printOperand(MI, CurOp--, OS);
195
3.03k
      }
196
3.88k
197
3.88k
      OS << ", ";
198
3.88k
      printOperand(MI, CurOp--, OS);
199
3.88k
      OS << ", ";
200
3.88k
      printOperand(MI, 0, OS);
201
3.88k
      if (CurOp > 0) {
202
262
        // Print mask operand.
203
262
        OS << " {";
204
262
        printOperand(MI, CurOp--, OS);
205
262
        OS << "}";
206
262
      }
207
3.88k
208
3.88k
      return true;
209
3.88k
    }
210
149
    break;
211
149
212
682
  case X86::VPCOMBmi:  case X86::VPCOMBri:
213
682
  case X86::VPCOMDmi:  case X86::VPCOMDri:
214
682
  case X86::VPCOMQmi:  case X86::VPCOMQri:
215
682
  case X86::VPCOMUBmi: case X86::VPCOMUBri:
216
682
  case X86::VPCOMUDmi: case X86::VPCOMUDri:
217
682
  case X86::VPCOMUQmi: case X86::VPCOMUQri:
218
682
  case X86::VPCOMUWmi: case X86::VPCOMUWri:
219
682
  case X86::VPCOMWmi:  case X86::VPCOMWri:
220
682
    if (Imm >= 0 && Imm <= 7) {
221
664
      OS << '\t';
222
664
      printVPCOMMnemonic(MI, OS);
223
664
224
664
      if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem)
225
201
        printxmmwordmem(MI, 2, OS);
226
463
      else
227
463
        printOperand(MI, 2, OS);
228
664
229
664
      OS << ", ";
230
664
      printOperand(MI, 1, OS);
231
664
      OS << ", ";
232
664
      printOperand(MI, 0, OS);
233
664
      return true;
234
664
    }
235
18
    break;
236
18
237
2.24k
  case X86::VPCMPBZ128rmi:   case X86::VPCMPBZ128rri:
238
2.24k
  case X86::VPCMPBZ256rmi:   case X86::VPCMPBZ256rri:
239
2.24k
  case X86::VPCMPBZrmi:      case X86::VPCMPBZrri:
240
2.24k
  case X86::VPCMPDZ128rmi:   case X86::VPCMPDZ128rri:
241
2.24k
  case X86::VPCMPDZ256rmi:   case X86::VPCMPDZ256rri:
242
2.24k
  case X86::VPCMPDZrmi:      case X86::VPCMPDZrri:
243
2.24k
  case X86::VPCMPQZ128rmi:   case X86::VPCMPQZ128rri:
244
2.24k
  case X86::VPCMPQZ256rmi:   case X86::VPCMPQZ256rri:
245
2.24k
  case X86::VPCMPQZrmi:      case X86::VPCMPQZrri:
246
2.24k
  case X86::VPCMPUBZ128rmi:  case X86::VPCMPUBZ128rri:
247
2.24k
  case X86::VPCMPUBZ256rmi:  case X86::VPCMPUBZ256rri:
248
2.24k
  case X86::VPCMPUBZrmi:     case X86::VPCMPUBZrri:
249
2.24k
  case X86::VPCMPUDZ128rmi:  case X86::VPCMPUDZ128rri:
250
2.24k
  case X86::VPCMPUDZ256rmi:  case X86::VPCMPUDZ256rri:
251
2.24k
  case X86::VPCMPUDZrmi:     case X86::VPCMPUDZrri:
252
2.24k
  case X86::VPCMPUQZ128rmi:  case X86::VPCMPUQZ128rri:
253
2.24k
  case X86::VPCMPUQZ256rmi:  case X86::VPCMPUQZ256rri:
254
2.24k
  case X86::VPCMPUQZrmi:     case X86::VPCMPUQZrri:
255
2.24k
  case X86::VPCMPUWZ128rmi:  case X86::VPCMPUWZ128rri:
256
2.24k
  case X86::VPCMPUWZ256rmi:  case X86::VPCMPUWZ256rri:
257
2.24k
  case X86::VPCMPUWZrmi:     case X86::VPCMPUWZrri:
258
2.24k
  case X86::VPCMPWZ128rmi:   case X86::VPCMPWZ128rri:
259
2.24k
  case X86::VPCMPWZ256rmi:   case X86::VPCMPWZ256rri:
260
2.24k
  case X86::VPCMPWZrmi:      case X86::VPCMPWZrri:
261
2.24k
  case X86::VPCMPBZ128rmik:  case X86::VPCMPBZ128rrik:
262
2.24k
  case X86::VPCMPBZ256rmik:  case X86::VPCMPBZ256rrik:
263
2.24k
  case X86::VPCMPBZrmik:     case X86::VPCMPBZrrik:
264
2.24k
  case X86::VPCMPDZ128rmik:  case X86::VPCMPDZ128rrik:
265
2.24k
  case X86::VPCMPDZ256rmik:  case X86::VPCMPDZ256rrik:
266
2.24k
  case X86::VPCMPDZrmik:     case X86::VPCMPDZrrik:
267
2.24k
  case X86::VPCMPQZ128rmik:  case X86::VPCMPQZ128rrik:
268
2.24k
  case X86::VPCMPQZ256rmik:  case X86::VPCMPQZ256rrik:
269
2.24k
  case X86::VPCMPQZrmik:     case X86::VPCMPQZrrik:
270
2.24k
  case X86::VPCMPUBZ128rmik: case X86::VPCMPUBZ128rrik:
271
2.24k
  case X86::VPCMPUBZ256rmik: case X86::VPCMPUBZ256rrik:
272
2.24k
  case X86::VPCMPUBZrmik:    case X86::VPCMPUBZrrik:
273
2.24k
  case X86::VPCMPUDZ128rmik: case X86::VPCMPUDZ128rrik:
274
2.24k
  case X86::VPCMPUDZ256rmik: case X86::VPCMPUDZ256rrik:
275
2.24k
  case X86::VPCMPUDZrmik:    case X86::VPCMPUDZrrik:
276
2.24k
  case X86::VPCMPUQZ128rmik: case X86::VPCMPUQZ128rrik:
277
2.24k
  case X86::VPCMPUQZ256rmik: case X86::VPCMPUQZ256rrik:
278
2.24k
  case X86::VPCMPUQZrmik:    case X86::VPCMPUQZrrik:
279
2.24k
  case X86::VPCMPUWZ128rmik: case X86::VPCMPUWZ128rrik:
280
2.24k
  case X86::VPCMPUWZ256rmik: case X86::VPCMPUWZ256rrik:
281
2.24k
  case X86::VPCMPUWZrmik:    case X86::VPCMPUWZrrik:
282
2.24k
  case X86::VPCMPWZ128rmik:  case X86::VPCMPWZ128rrik:
283
2.24k
  case X86::VPCMPWZ256rmik:  case X86::VPCMPWZ256rrik:
284
2.24k
  case X86::VPCMPWZrmik:     case X86::VPCMPWZrrik:
285
2.24k
  case X86::VPCMPDZ128rmib:  case X86::VPCMPDZ128rmibk:
286
2.24k
  case X86::VPCMPDZ256rmib:  case X86::VPCMPDZ256rmibk:
287
2.24k
  case X86::VPCMPDZrmib:     case X86::VPCMPDZrmibk:
288
2.24k
  case X86::VPCMPQZ128rmib:  case X86::VPCMPQZ128rmibk:
289
2.24k
  case X86::VPCMPQZ256rmib:  case X86::VPCMPQZ256rmibk:
290
2.24k
  case X86::VPCMPQZrmib:     case X86::VPCMPQZrmibk:
291
2.24k
  case X86::VPCMPUDZ128rmib: case X86::VPCMPUDZ128rmibk:
292
2.24k
  case X86::VPCMPUDZ256rmib: case X86::VPCMPUDZ256rmibk:
293
2.24k
  case X86::VPCMPUDZrmib:    case X86::VPCMPUDZrmibk:
294
2.24k
  case X86::VPCMPUQZ128rmib: case X86::VPCMPUQZ128rmibk:
295
2.24k
  case X86::VPCMPUQZ256rmib: case X86::VPCMPUQZ256rmibk:
296
2.24k
  case X86::VPCMPUQZrmib:    case X86::VPCMPUQZrmibk:
297
2.24k
    if ((Imm >= 0 && Imm <= 2) || 
(1.37k
Imm >= 41.37k
&&
Imm <= 61.37k
)) {
298
1.96k
      OS << '\t';
299
1.96k
      printVPCMPMnemonic(MI, OS);
300
1.96k
301
1.96k
      unsigned CurOp = (Desc.TSFlags & X86II::EVEX_K) ? 
3587
:
21.37k
;
302
1.96k
303
1.96k
      if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) {
304
774
        if (Desc.TSFlags & X86II::EVEX_B) {
305
274
          // Broadcast form.
306
274
          // Load size is based on W-bit as only D and Q are supported.
307
274
          if (Desc.TSFlags & X86II::VEX_W)
308
146
            printqwordmem(MI, CurOp--, OS);
309
128
          else
310
128
            printdwordmem(MI, CurOp--, OS);
311
274
312
274
          // Print the number of elements broadcasted.
313
274
          unsigned NumElts;
314
274
          if (Desc.TSFlags & X86II::EVEX_L2)
315
204
            NumElts = (Desc.TSFlags & X86II::VEX_W) ? 
8106
:
1698
;
316
70
          else if (Desc.TSFlags & X86II::VEX_L)
317
33
            NumElts = (Desc.TSFlags & X86II::VEX_W) ? 
420
:
813
;
318
37
          else
319
37
            NumElts = (Desc.TSFlags & X86II::VEX_W) ? 
220
:
417
;
320
274
          OS << "{1to" << NumElts << "}";
321
500
        } else {
322
500
          if (Desc.TSFlags & X86II::EVEX_L2)
323
379
            printzmmwordmem(MI, CurOp--, OS);
324
121
          else if (Desc.TSFlags & X86II::VEX_L)
325
52
            printymmwordmem(MI, CurOp--, OS);
326
69
          else
327
69
            printxmmwordmem(MI, CurOp--, OS);
328
500
        }
329
1.18k
      } else {
330
1.18k
        printOperand(MI, CurOp--, OS);
331
1.18k
      }
332
1.96k
333
1.96k
      OS << ", ";
334
1.96k
      printOperand(MI, CurOp--, OS);
335
1.96k
      OS << ", ";
336
1.96k
      printOperand(MI, 0, OS);
337
1.96k
      if (CurOp > 0) {
338
587
        // Print mask operand.
339
587
        OS << " {";
340
587
        printOperand(MI, CurOp--, OS);
341
587
        OS << "}";
342
587
      }
343
1.96k
344
1.96k
      return true;
345
1.96k
    }
346
285
    break;
347
254k
  }
348
254k
349
254k
  return false;
350
254k
}
351
352
void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
353
2.00M
                                     raw_ostream &O) {
354
2.00M
  const MCOperand &Op = MI->getOperand(OpNo);
355
2.00M
  if (Op.isReg()) {
356
1.92M
    printRegName(O, Op.getReg());
357
1.92M
  } else 
if (78.5k
Op.isImm()78.5k
) {
358
76.7k
    // Print immediates as signed values.
359
76.7k
    int64_t Imm = Op.getImm();
360
76.7k
    O << markup("<imm:") << '$' << formatImm(Imm) << markup(">");
361
76.7k
362
76.7k
    // TODO: This should be in a helper function in the base class, so it can
363
76.7k
    // be used by other printers.
364
76.7k
365
76.7k
    // If there are no instruction-specific comments, add a comment clarifying
366
76.7k
    // the hex value of the immediate operand when it isn't in the range
367
76.7k
    // [-256,255].
368
76.7k
    if (CommentStream && 
!HasCustomInstComment47.0k
&&
(47.0k
Imm > 25547.0k
||
Imm < -25641.7k
)) {
369
6.21k
      // Don't print unnecessary hex sign bits.
370
6.21k
      if (Imm == (int16_t)(Imm))
371
2.77k
        *CommentStream << format("imm = 0x%" PRIX16 "\n", (uint16_t)Imm);
372
3.43k
      else if (Imm == (int32_t)(Imm))
373
2.62k
        *CommentStream << format("imm = 0x%" PRIX32 "\n", (uint32_t)Imm);
374
815
      else
375
815
        *CommentStream << format("imm = 0x%" PRIX64 "\n", (uint64_t)Imm);
376
6.21k
    }
377
76.7k
  } else {
378
1.83k
    assert(Op.isExpr() && "unknown operand kind in printOperand");
379
1.83k
    O << markup("<imm:") << '$';
380
1.83k
    Op.getExpr()->print(O, &MAI);
381
1.83k
    O << markup(">");
382
1.83k
  }
383
2.00M
}
384
385
void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
386
332k
                                          raw_ostream &O) {
387
332k
  const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg);
388
332k
  const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg);
389
332k
  const MCOperand &DispSpec = MI->getOperand(Op + X86::AddrDisp);
390
332k
391
332k
  O << markup("<mem:");
392
332k
393
332k
  // If this has a segment register, print it.
394
332k
  printOptionalSegReg(MI, Op + X86::AddrSegmentReg, O);
395
332k
396
332k
  if (DispSpec.isImm()) {
397
294k
    int64_t DispVal = DispSpec.getImm();
398
294k
    if (DispVal || 
(105k
!IndexReg.getReg()105k
&&
!BaseReg.getReg()98.1k
))
399
189k
      O << formatImm(DispVal);
400
294k
  } else {
401
38.2k
    assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
402
38.2k
    DispSpec.getExpr()->print(O, &MAI);
403
38.2k
  }
404
332k
405
332k
  if (IndexReg.getReg() || 
BaseReg.getReg()295k
) {
406
318k
    O << '(';
407
318k
    if (BaseReg.getReg())
408
315k
      printOperand(MI, Op + X86::AddrBaseReg, O);
409
318k
410
318k
    if (IndexReg.getReg()) {
411
37.5k
      O << ',';
412
37.5k
      printOperand(MI, Op + X86::AddrIndexReg, O);
413
37.5k
      unsigned ScaleVal = MI->getOperand(Op + X86::AddrScaleAmt).getImm();
414
37.5k
      if (ScaleVal != 1) {
415
24.1k
        O << ',' << markup("<imm:") << ScaleVal // never printed in hex.
416
24.1k
          << markup(">");
417
24.1k
      }
418
37.5k
    }
419
318k
    O << ')';
420
318k
  }
421
332k
422
332k
  O << markup(">");
423
332k
}
424
425
void X86ATTInstPrinter::printSrcIdx(const MCInst *MI, unsigned Op,
426
738
                                    raw_ostream &O) {
427
738
  O << markup("<mem:");
428
738
429
738
  // If this has a segment register, print it.
430
738
  printOptionalSegReg(MI, Op + 1, O);
431
738
432
738
  O << "(";
433
738
  printOperand(MI, Op, O);
434
738
  O << ")";
435
738
436
738
  O << markup(">");
437
738
}
438
439
void X86ATTInstPrinter::printDstIdx(const MCInst *MI, unsigned Op,
440
874
                                    raw_ostream &O) {
441
874
  O << markup("<mem:");
442
874
443
874
  O << "%es:(";
444
874
  printOperand(MI, Op, O);
445
874
  O << ")";
446
874
447
874
  O << markup(">");
448
874
}
449
450
void X86ATTInstPrinter::printMemOffset(const MCInst *MI, unsigned Op,
451
1.05k
                                       raw_ostream &O) {
452
1.05k
  const MCOperand &DispSpec = MI->getOperand(Op);
453
1.05k
454
1.05k
  O << markup("<mem:");
455
1.05k
456
1.05k
  // If this has a segment register, print it.
457
1.05k
  printOptionalSegReg(MI, Op + 1, O);
458
1.05k
459
1.05k
  if (DispSpec.isImm()) {
460
417
    O << formatImm(DispSpec.getImm());
461
639
  } else {
462
639
    assert(DispSpec.isExpr() && "non-immediate displacement?");
463
639
    DispSpec.getExpr()->print(O, &MAI);
464
639
  }
465
1.05k
466
1.05k
  O << markup(">");
467
1.05k
}
468
469
void X86ATTInstPrinter::printU8Imm(const MCInst *MI, unsigned Op,
470
120k
                                   raw_ostream &O) {
471
120k
  if (MI->getOperand(Op).isExpr())
472
5
    return printOperand(MI, Op, O);
473
120k
474
120k
  O << markup("<imm:") << '$' << formatImm(MI->getOperand(Op).getImm() & 0xff)
475
120k
    << markup(">");
476
120k
}
477
478
void X86ATTInstPrinter::printSTiRegOperand(const MCInst *MI, unsigned OpNo,
479
3.79k
                                           raw_ostream &OS) {
480
3.79k
  const MCOperand &Op = MI->getOperand(OpNo);
481
3.79k
  unsigned Reg = Op.getReg();
482
3.79k
  // Override the default printing to print st(0) instead st.
483
3.79k
  if (Reg == X86::ST0)
484
445
    OS << markup("<reg:") << "%st(0)" << markup(">");
485
3.34k
  else
486
3.34k
    printRegName(OS, Reg);
487
3.79k
}