Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
Line
Count
Source (jump to first uncovered line)
1
//===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
//
9
// This defines functionality used to emit comments about X86 instructions to
10
// an output stream for -fverbose-asm.
11
//
12
//===----------------------------------------------------------------------===//
13
14
#include "X86InstComments.h"
15
#include "X86ATTInstPrinter.h"
16
#include "X86BaseInfo.h"
17
#include "X86MCTargetDesc.h"
18
#include "Utils/X86ShuffleDecode.h"
19
#include "llvm/MC/MCInst.h"
20
#include "llvm/MC/MCInstrInfo.h"
21
#include "llvm/Support/raw_ostream.h"
22
23
using namespace llvm;
24
25
#define CASE_SSE_INS_COMMON(Inst, src)            \
26
87.7k
  case X86::Inst##src:
27
28
#define CASE_AVX_INS_COMMON(Inst, Suffix, src)    \
29
831k
  case X86::V##Inst##Suffix##src:
30
31
#define CASE_MASK_INS_COMMON(Inst, Suffix, src)   \
32
496k
  case X86::V##Inst##Suffix##src##k:
33
34
#define CASE_MASKZ_INS_COMMON(Inst, Suffix, src)  \
35
496k
  case X86::V##Inst##Suffix##src##kz:
36
37
#define CASE_AVX512_INS_COMMON(Inst, Suffix, src) \
38
496k
  CASE_AVX_INS_COMMON(Inst, Suffix, src)          \
39
496k
  CASE_MASK_INS_COMMON(Inst, Suffix, src)         \
40
496k
  CASE_MASKZ_INS_COMMON(Inst, Suffix, src)
41
42
#define CASE_MOVDUP(Inst, src)                    \
43
3.96k
  
CASE_AVX512_INS_COMMON3.43k
(Inst, Z, r##src) \
44
3.96k
  CASE_AVX512_INS_COMMON(Inst, Z256, r##src)      \
45
3.96k
  CASE_AVX512_INS_COMMON(Inst, Z128, r##src)      \
46
3.96k
  CASE_AVX_INS_COMMON(Inst, , r##src)             \
47
3.96k
  CASE_AVX_INS_COMMON(Inst, Y, r##src)            \
48
3.96k
  CASE_SSE_INS_COMMON(Inst, r##src)
49
50
#define CASE_MASK_MOVDUP(Inst, src)               \
51
  CASE_MASK_INS_COMMON(Inst, Z, r##src)           \
52
  CASE_MASK_INS_COMMON(Inst, Z256, r##src)        \
53
  CASE_MASK_INS_COMMON(Inst, Z128, r##src)
54
55
#define CASE_MASKZ_MOVDUP(Inst, src)              \
56
  CASE_MASKZ_INS_COMMON(Inst, Z, r##src)          \
57
  CASE_MASKZ_INS_COMMON(Inst, Z256, r##src)       \
58
  CASE_MASKZ_INS_COMMON(Inst, Z128, r##src)
59
60
#define CASE_PMOVZX(Inst, src)                    \
61
12.5k
  
CASE_AVX512_INS_COMMON11.7k
(Inst, Z, r##src) \
62
12.5k
  CASE_AVX512_INS_COMMON(Inst, Z256, r##src)      \
63
12.5k
  CASE_AVX512_INS_COMMON(Inst, Z128, r##src)      \
64
12.5k
  CASE_AVX_INS_COMMON(Inst, , r##src)             \
65
12.5k
  CASE_AVX_INS_COMMON(Inst, Y, r##src)            \
66
12.5k
  CASE_SSE_INS_COMMON(Inst, r##src)
67
68
#define CASE_MASK_PMOVZX(Inst, src)               \
69
  CASE_MASK_INS_COMMON(Inst, Z, r##src)           \
70
  CASE_MASK_INS_COMMON(Inst, Z256, r##src)        \
71
  CASE_MASK_INS_COMMON(Inst, Z128, r##src)
72
73
#define CASE_MASKZ_PMOVZX(Inst, src)              \
74
  CASE_MASKZ_INS_COMMON(Inst, Z, r##src)          \
75
  CASE_MASKZ_INS_COMMON(Inst, Z256, r##src)       \
76
  CASE_MASKZ_INS_COMMON(Inst, Z128, r##src)
77
78
#define CASE_UNPCK(Inst, src)                     \
79
25.7k
  
CASE_AVX512_INS_COMMON24.0k
(Inst, Z, r##src) \
80
25.7k
  CASE_AVX512_INS_COMMON(Inst, Z256, r##src)      \
81
25.7k
  CASE_AVX512_INS_COMMON(Inst, Z128, r##src)      \
82
25.7k
  CASE_AVX_INS_COMMON(Inst, , r##src)             \
83
25.7k
  CASE_AVX_INS_COMMON(Inst, Y, r##src)            \
84
25.7k
  CASE_SSE_INS_COMMON(Inst, r##src)
85
86
#define CASE_MASK_UNPCK(Inst, src)                \
87
  CASE_MASK_INS_COMMON(Inst, Z, r##src)           \
88
  CASE_MASK_INS_COMMON(Inst, Z256, r##src)        \
89
  CASE_MASK_INS_COMMON(Inst, Z128, r##src)
90
91
#define CASE_MASKZ_UNPCK(Inst, src)               \
92
  CASE_MASKZ_INS_COMMON(Inst, Z, r##src)          \
93
  CASE_MASKZ_INS_COMMON(Inst, Z256, r##src)       \
94
  CASE_MASKZ_INS_COMMON(Inst, Z128, r##src)
95
96
#define CASE_SHUF(Inst, suf)                      \
97
45.5k
  
CASE_AVX512_INS_COMMON41.6k
(Inst, Z, suf) \
98
45.5k
  CASE_AVX512_INS_COMMON(Inst, Z256, suf)         \
99
45.5k
  CASE_AVX512_INS_COMMON(Inst, Z128, suf)         \
100
45.5k
  CASE_AVX_INS_COMMON(Inst, , suf)                \
101
45.5k
  CASE_AVX_INS_COMMON(Inst, Y, suf)               \
102
45.5k
  CASE_SSE_INS_COMMON(Inst, suf)
103
104
#define CASE_MASK_SHUF(Inst, src)                 \
105
  CASE_MASK_INS_COMMON(Inst, Z, r##src##i)        \
106
  CASE_MASK_INS_COMMON(Inst, Z256, r##src##i)     \
107
  CASE_MASK_INS_COMMON(Inst, Z128, r##src##i)
108
109
#define CASE_MASKZ_SHUF(Inst, src)                \
110
  CASE_MASKZ_INS_COMMON(Inst, Z, r##src##i)       \
111
  CASE_MASKZ_INS_COMMON(Inst, Z256, r##src##i)    \
112
  CASE_MASKZ_INS_COMMON(Inst, Z128, r##src##i)
113
114
#define CASE_VPERMILPI(Inst, src)                 \
115
7.07k
  
CASE_AVX512_INS_COMMON5.60k
(Inst, Z, src##i) \
116
7.07k
  CASE_AVX512_INS_COMMON(Inst, Z256, src##i)      \
117
7.07k
  CASE_AVX512_INS_COMMON(Inst, Z128, src##i)      \
118
7.07k
  CASE_AVX_INS_COMMON(Inst, , src##i)             \
119
7.07k
  CASE_AVX_INS_COMMON(Inst, Y, src##i)
120
121
#define CASE_MASK_VPERMILPI(Inst, src)            \
122
  CASE_MASK_INS_COMMON(Inst, Z, src##i)           \
123
  CASE_MASK_INS_COMMON(Inst, Z256, src##i)        \
124
  CASE_MASK_INS_COMMON(Inst, Z128, src##i)
125
126
#define CASE_MASKZ_VPERMILPI(Inst, src)           \
127
  CASE_MASKZ_INS_COMMON(Inst, Z, src##i)          \
128
  CASE_MASKZ_INS_COMMON(Inst, Z256, src##i)       \
129
  CASE_MASKZ_INS_COMMON(Inst, Z128, src##i)
130
131
#define CASE_VPERM(Inst, src)                     \
132
3.49k
  
CASE_AVX512_INS_COMMON2.65k
(Inst, Z, src##i) \
133
3.49k
  CASE_AVX512_INS_COMMON(Inst, Z256, src##i)      \
134
3.49k
  CASE_AVX_INS_COMMON(Inst, Y, src##i)
135
136
#define CASE_MASK_VPERM(Inst, src)                \
137
  CASE_MASK_INS_COMMON(Inst, Z, src##i)           \
138
  CASE_MASK_INS_COMMON(Inst, Z256, src##i)
139
140
#define CASE_MASKZ_VPERM(Inst, src)               \
141
  CASE_MASKZ_INS_COMMON(Inst, Z, src##i)          \
142
  CASE_MASKZ_INS_COMMON(Inst, Z256, src##i)
143
144
#define CASE_VSHUF(Inst, src)                          \
145
3.40k
  CASE_AVX512_INS_COMMON(SHUFF##Inst, Z, r##src##i)    \
146
806
  CASE_AVX512_INS_COMMON(SHUFI##Inst, Z, r##src##i)    \
147
806
  CASE_AVX512_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \
148
3.40k
  CASE_AVX512_INS_COMMON(SHUFI##Inst, Z256, r##src##i)
149
150
#define CASE_MASK_VSHUF(Inst, src)                    \
151
  CASE_MASK_INS_COMMON(SHUFF##Inst, Z, r##src##i)     \
152
  CASE_MASK_INS_COMMON(SHUFI##Inst, Z, r##src##i)     \
153
  CASE_MASK_INS_COMMON(SHUFF##Inst, Z256, r##src##i)  \
154
  CASE_MASK_INS_COMMON(SHUFI##Inst, Z256, r##src##i)
155
156
#define CASE_MASKZ_VSHUF(Inst, src)                   \
157
  CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z, r##src##i)    \
158
  CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z, r##src##i)    \
159
  CASE_MASKZ_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \
160
  CASE_MASKZ_INS_COMMON(SHUFI##Inst, Z256, r##src##i)
161
162
#define CASE_AVX512_FMA(Inst, suf)                \
163
949k
  CASE_AVX512_INS_COMMON(Inst, Z, suf)            \
164
57.5k
  CASE_AVX512_INS_COMMON(Inst, Z256, suf)         \
165
940k
  CASE_AVX512_INS_COMMON(Inst, Z128, suf)
166
167
#define CASE_FMA(Inst, suf)                       \
168
924k
  CASE_AVX512_FMA(Inst, suf)                      \
169
32.5k
  CASE_AVX_INS_COMMON(Inst, , suf)                \
170
32.5k
  CASE_AVX_INS_COMMON(Inst, Y, suf)
171
172
#define CASE_FMA_PACKED_REG(Inst)                 \
173
904k
  CASE_FMA(Inst##PD, r)                           \
174
904k
  CASE_FMA(Inst##PS, r)
175
176
#define CASE_FMA_PACKED_MEM(Inst)                 \
177
12.4k
  
CASE_FMA3.80k
(Inst##PD, m) \
178
12.4k
  CASE_FMA(Inst##PS, m)                           \
179
12.4k
  CASE_AVX512_FMA(Inst##PD, mb)                   \
180
12.4k
  
CASE_AVX512_FMA3.80k
(Inst##PS, mb)
181
182
#define CASE_FMA_SCALAR_REG(Inst)                 \
183
3.02k
  CASE_AVX_INS_COMMON(Inst##SD, , r)              \
184
3.02k
  CASE_AVX_INS_COMMON(Inst##SS, , r)              \
185
3.02k
  CASE_AVX_INS_COMMON(Inst##SD, , r_Int)          \
186
3.02k
  CASE_AVX_INS_COMMON(Inst##SS, , r_Int)          \
187
3.02k
  CASE_AVX_INS_COMMON(Inst##SD, Z, r)             \
188
3.02k
  CASE_AVX_INS_COMMON(Inst##SS, Z, r)             \
189
3.02k
  CASE_AVX512_INS_COMMON(Inst##SD, Z, r_Int)      \
190
3.02k
  CASE_AVX512_INS_COMMON(Inst##SS, Z, r_Int)
191
192
#define CASE_FMA_SCALAR_MEM(Inst)                 \
193
9.68k
  CASE_AVX_INS_COMMON(Inst##SD, , m)              \
194
9.68k
  CASE_AVX_INS_COMMON(Inst##SS, , m)              \
195
9.68k
  CASE_AVX_INS_COMMON(Inst##SD, , m_Int)          \
196
9.68k
  CASE_AVX_INS_COMMON(Inst##SS, , m_Int)          \
197
9.68k
  CASE_AVX_INS_COMMON(Inst##SD, Z, m)             \
198
9.68k
  CASE_AVX_INS_COMMON(Inst##SS, Z, m)             \
199
9.68k
  CASE_AVX512_INS_COMMON(Inst##SD, Z, m_Int)      \
200
9.68k
  CASE_AVX512_INS_COMMON(Inst##SS, Z, m_Int)
201
202
59.3k
static unsigned getVectorRegSize(unsigned RegNo) {
203
59.3k
  if (X86::ZMM0 <= RegNo && 
RegNo <= X86::ZMM314.55k
)
204
4.55k
    return 512;
205
54.7k
  if (X86::YMM0 <= RegNo && 
RegNo <= X86::YMM318.42k
)
206
8.42k
    return 256;
207
46.3k
  if (X86::XMM0 <= RegNo && 
RegNo <= X86::XMM3145.8k
)
208
45.8k
    return 128;
209
544
  if (X86::MM0 <= RegNo && RegNo <= X86::MM7)
210
544
    return 64;
211
0
212
0
  llvm_unreachable("Unknown vector reg!");
213
0
}
214
215
static unsigned getRegOperandNumElts(const MCInst *MI, unsigned ScalarSize,
216
59.3k
                                     unsigned OperandIndex) {
217
59.3k
  unsigned OpReg = MI->getOperand(OperandIndex).getReg();
218
59.3k
  return getVectorRegSize(OpReg) / ScalarSize;
219
59.3k
}
220
221
202k
static const char *getRegName(unsigned Reg) {
222
202k
  return X86ATTInstPrinter::getRegisterName(Reg);
223
202k
}
224
225
/// Wraps the destination register name with AVX512 mask/maskz filtering.
226
static void printMasking(raw_ostream &OS, const MCInst *MI,
227
72.3k
                         const MCInstrInfo &MCII) {
228
72.3k
  const MCInstrDesc &Desc = MCII.get(MI->getOpcode());
229
72.3k
  uint64_t TSFlags = Desc.TSFlags;
230
72.3k
231
72.3k
  if (!(TSFlags & X86II::EVEX_K))
232
69.2k
    return;
233
3.06k
234
3.06k
  bool MaskWithZero = (TSFlags & X86II::EVEX_Z);
235
3.06k
  unsigned MaskOp = Desc.getNumDefs();
236
3.06k
237
3.06k
  if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1)
238
1.55k
    ++MaskOp;
239
3.06k
240
3.06k
  const char *MaskRegName = getRegName(MI->getOperand(MaskOp).getReg());
241
3.06k
242
3.06k
  // MASK: zmmX {%kY}
243
3.06k
  OS << " {%" << MaskRegName << "}";
244
3.06k
245
3.06k
  // MASKZ: zmmX {%kY} {z}
246
3.06k
  if (MaskWithZero)
247
1.50k
    OS << " {z}";
248
3.06k
}
249
250
904k
static bool printFMA3Comments(const MCInst *MI, raw_ostream &OS) {
251
904k
  const char *Mul1Name = nullptr, *Mul2Name = nullptr, *AccName = nullptr;
252
904k
  unsigned NumOperands = MI->getNumOperands();
253
904k
  bool RegForm = false;
254
904k
  bool Negate = false;
255
904k
  StringRef AccStr = "+";
256
904k
257
904k
  // The operands for FMA instructions without rounding fall into two forms.
258
904k
  //  dest, src1, src2, src3
259
904k
  //  dest, src1, mask, src2, src3
260
904k
  // Where src3 is either a register or 5 memory address operands. So to find
261
904k
  // dest and src1 we can index from the front. To find src2 and src3 we can
262
904k
  // index from the end by taking into account memory vs register form when
263
904k
  // finding src2.
264
904k
265
904k
  switch (MI->getOpcode()) {
266
904k
  default:
267
892k
    return false;
268
904k
  
CASE_FMA_PACKED_REG892k
(FMADD132)
269
6.55k
  
CASE_FMA_SCALAR_REG298
(FMADD132)
270
3.57k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
271
3.57k
    RegForm = true;
272
3.57k
    
LLVM_FALLTHROUGH298
;
273
35.4k
  
CASE_FMA_PACKED_MEM298
(FMADD132)
274
35.4k
  
CASE_FMA_SCALAR_MEM887
(FMADD132)
275
887
    AccName = getRegName(MI->getOperand(NumOperands-(RegForm?
2298
:
6589
)).getReg());
276
887
    Mul1Name = getRegName(MI->getOperand(1).getReg());
277
887
    break;
278
9.75k
279
10.9k
  
CASE_FMA_PACKED_REG887
(FMADD213)
280
10.9k
  
CASE_FMA_SCALAR_REG498
(FMADD213)
281
5.97k
    AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
282
5.97k
    RegForm = true;
283
5.97k
    
LLVM_FALLTHROUGH498
;
284
45.4k
  
CASE_FMA_PACKED_MEM498
(FMADD213)
285
45.4k
  
CASE_FMA_SCALAR_MEM1.13k
(FMADD213)
286
1.13k
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2498
:
6639
)).getReg());
287
1.13k
    Mul2Name = getRegName(MI->getOperand(1).getReg());
288
1.13k
    break;
289
12.5k
290
12.5k
  
CASE_FMA_PACKED_REG1.13k
(FMADD231)
291
4.81k
  
CASE_FMA_SCALAR_REG219
(FMADD231)
292
2.62k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
293
2.62k
    RegForm = true;
294
2.62k
    
LLVM_FALLTHROUGH219
;
295
31.3k
  
CASE_FMA_PACKED_MEM219
(FMADD231)
296
31.3k
  
CASE_FMA_SCALAR_MEM783
(FMADD231)
297
783
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2219
:
6564
)).getReg());
298
783
    AccName = getRegName(MI->getOperand(1).getReg());
299
783
    break;
300
8.61k
301
8.61k
  
CASE_FMA_PACKED_REG783
(FMSUB132)
302
2.81k
  
CASE_FMA_SCALAR_REG128
(FMSUB132)
303
1.53k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
304
1.53k
    RegForm = true;
305
1.53k
    
LLVM_FALLTHROUGH128
;
306
27.2k
  
CASE_FMA_PACKED_MEM128
(FMSUB132)
307
27.2k
  
CASE_FMA_SCALAR_MEM682
(FMSUB132)
308
682
    AccName = getRegName(MI->getOperand(NumOperands-(RegForm?
2128
:
6554
)).getReg());
309
682
    Mul1Name = getRegName(MI->getOperand(1).getReg());
310
682
    AccStr = "-";
311
682
    break;
312
7.50k
313
7.50k
  
CASE_FMA_PACKED_REG682
(FMSUB213)
314
6.55k
  
CASE_FMA_SCALAR_REG298
(FMSUB213)
315
3.57k
    AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
316
3.57k
    RegForm = true;
317
3.57k
    
LLVM_FALLTHROUGH298
;
318
33.9k
  
CASE_FMA_PACKED_MEM298
(FMSUB213)
319
33.9k
  
CASE_FMA_SCALAR_MEM848
(FMSUB213)
320
848
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2298
:
6550
)).getReg());
321
848
    Mul2Name = getRegName(MI->getOperand(1).getReg());
322
848
    AccStr = "-";
323
848
    break;
324
9.32k
325
9.32k
  
CASE_FMA_PACKED_REG848
(FMSUB231)
326
4.22k
  
CASE_FMA_SCALAR_REG192
(FMSUB231)
327
2.30k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
328
2.30k
    RegForm = true;
329
2.30k
    
LLVM_FALLTHROUGH192
;
330
29.0k
  
CASE_FMA_PACKED_MEM192
(FMSUB231)
331
29.0k
  
CASE_FMA_SCALAR_MEM727
(FMSUB231)
332
727
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2192
:
6535
)).getReg());
333
727
    AccName = getRegName(MI->getOperand(1).getReg());
334
727
    AccStr = "-";
335
727
    break;
336
7.99k
337
7.99k
  
CASE_FMA_PACKED_REG727
(FNMADD132)
338
3.43k
  
CASE_FMA_SCALAR_REG156
(FNMADD132)
339
1.87k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
340
1.87k
    RegForm = true;
341
1.87k
    
LLVM_FALLTHROUGH156
;
342
27.8k
  
CASE_FMA_PACKED_MEM156
(FNMADD132)
343
27.8k
  
CASE_FMA_SCALAR_MEM695
(FNMADD132)
344
695
    AccName = getRegName(MI->getOperand(NumOperands-(RegForm?
2156
:
6539
)).getReg());
345
695
    Mul1Name = getRegName(MI->getOperand(1).getReg());
346
695
    Negate = true;
347
695
    break;
348
7.64k
349
9.28k
  
CASE_FMA_PACKED_REG695
(FNMADD213)
350
9.28k
  
CASE_FMA_SCALAR_REG422
(FNMADD213)
351
5.06k
    AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
352
5.06k
    RegForm = true;
353
5.06k
    
LLVM_FALLTHROUGH422
;
354
40.0k
  
CASE_FMA_PACKED_MEM422
(FNMADD213)
355
40.0k
  
CASE_FMA_SCALAR_MEM1.00k
(FNMADD213)
356
1.00k
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2422
:
6578
)).getReg());
357
1.00k
    Mul2Name = getRegName(MI->getOperand(1).getReg());
358
1.00k
    Negate = true;
359
1.00k
    break;
360
11.0k
361
11.0k
  
CASE_FMA_PACKED_REG1.00k
(FNMADD231)
362
3.27k
  
CASE_FMA_SCALAR_REG149
(FNMADD231)
363
1.78k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
364
1.78k
    RegForm = true;
365
1.78k
    
LLVM_FALLTHROUGH149
;
366
27.1k
  
CASE_FMA_PACKED_MEM149
(FNMADD231)
367
27.1k
  
CASE_FMA_SCALAR_MEM679
(FNMADD231)
368
679
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2149
:
6530
)).getReg());
369
679
    AccName = getRegName(MI->getOperand(1).getReg());
370
679
    Negate = true;
371
679
    break;
372
7.46k
373
7.46k
  
CASE_FMA_PACKED_REG679
(FNMSUB132)
374
3.49k
  
CASE_FMA_SCALAR_REG159
(FNMSUB132)
375
1.90k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
376
1.90k
    RegForm = true;
377
1.90k
    
LLVM_FALLTHROUGH159
;
378
28.0k
  
CASE_FMA_PACKED_MEM159
(FNMSUB132)
379
28.0k
  
CASE_FMA_SCALAR_MEM701
(FNMSUB132)
380
701
    AccName = getRegName(MI->getOperand(NumOperands-(RegForm?
2159
:
6542
)).getReg());
381
701
    Mul1Name = getRegName(MI->getOperand(1).getReg());
382
701
    AccStr = "-";
383
701
    Negate = true;
384
701
    break;
385
7.71k
386
7.71k
  
CASE_FMA_PACKED_REG701
(FNMSUB213)
387
7.28k
  
CASE_FMA_SCALAR_REG331
(FNMSUB213)
388
3.97k
    AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
389
3.97k
    RegForm = true;
390
3.97k
    
LLVM_FALLTHROUGH331
;
391
35.1k
  
CASE_FMA_PACKED_MEM331
(FNMSUB213)
392
35.1k
  
CASE_FMA_SCALAR_MEM879
(FNMSUB213)
393
879
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2331
:
6548
)).getReg());
394
879
    Mul2Name = getRegName(MI->getOperand(1).getReg());
395
879
    AccStr = "-";
396
879
    Negate = true;
397
879
    break;
398
9.66k
399
9.66k
  
CASE_FMA_PACKED_REG879
(FNMSUB231)
400
3.93k
  
CASE_FMA_SCALAR_REG179
(FNMSUB231)
401
2.14k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
402
2.14k
    RegForm = true;
403
2.14k
    
LLVM_FALLTHROUGH179
;
404
26.7k
  
CASE_FMA_PACKED_MEM179
(FNMSUB231)
405
26.7k
  
CASE_FMA_SCALAR_MEM668
(FNMSUB231)
406
668
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2179
:
6489
)).getReg());
407
668
    AccName = getRegName(MI->getOperand(1).getReg());
408
668
    AccStr = "-";
409
668
    Negate = true;
410
668
    break;
411
7.34k
412
7.34k
  
CASE_FMA_PACKED_REG668
(FMADDSUB132)
413
2.50k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
414
2.50k
    RegForm = true;
415
2.50k
    
LLVM_FALLTHROUGH114
;
416
2.50k
  
CASE_FMA_PACKED_MEM114
(FMADDSUB132)
417
448
    AccName = getRegName(MI->getOperand(NumOperands-(RegForm?
2114
:
6334
)).getReg());
418
448
    Mul1Name = getRegName(MI->getOperand(1).getReg());
419
448
    AccStr = "+/-";
420
448
    break;
421
17.4k
422
17.4k
  
CASE_FMA_PACKED_REG448
(FMADDSUB213)
423
4.26k
    AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
424
4.26k
    RegForm = true;
425
4.26k
    
LLVM_FALLTHROUGH194
;
426
4.26k
  
CASE_FMA_PACKED_MEM194
(FMADDSUB213)
427
540
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2194
:
6346
)).getReg());
428
540
    Mul2Name = getRegName(MI->getOperand(1).getReg());
429
540
    AccStr = "+/-";
430
540
    break;
431
21.0k
432
21.0k
  
CASE_FMA_PACKED_REG540
(FMADDSUB231)
433
2.48k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
434
2.48k
    RegForm = true;
435
2.48k
    
LLVM_FALLTHROUGH113
;
436
2.48k
  
CASE_FMA_PACKED_MEM113
(FMADDSUB231)
437
447
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2113
:
6334
)).getReg());
438
447
    AccName = getRegName(MI->getOperand(1).getReg());
439
447
    AccStr = "+/-";
440
447
    break;
441
17.4k
442
17.4k
  
CASE_FMA_PACKED_REG447
(FMSUBADD132)
443
1.93k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
444
1.93k
    RegForm = true;
445
1.93k
    
LLVM_FALLTHROUGH88
;
446
1.93k
  
CASE_FMA_PACKED_MEM88
(FMSUBADD132)
447
422
    AccName = getRegName(MI->getOperand(NumOperands-(RegForm?
288
:
6334
)).getReg());
448
422
    Mul1Name = getRegName(MI->getOperand(1).getReg());
449
422
    AccStr = "-/+";
450
422
    break;
451
16.4k
452
16.4k
  
CASE_FMA_PACKED_REG422
(FMSUBADD213)
453
3.30k
    AccName = getRegName(MI->getOperand(NumOperands - 1).getReg());
454
3.30k
    RegForm = true;
455
3.30k
    
LLVM_FALLTHROUGH150
;
456
3.30k
  
CASE_FMA_PACKED_MEM150
(FMSUBADD213)
457
496
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2150
:
6346
)).getReg());
458
496
    Mul2Name = getRegName(MI->getOperand(1).getReg());
459
496
    AccStr = "-/+";
460
496
    break;
461
19.3k
462
19.3k
  
CASE_FMA_PACKED_REG496
(FMSUBADD231)
463
2.48k
    Mul2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
464
2.48k
    RegForm = true;
465
2.48k
    
LLVM_FALLTHROUGH113
;
466
17.8k
  
CASE_FMA_PACKED_MEM113
(FMSUBADD231)
467
17.8k
    Mul1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2113
:
6334
)).getReg());
468
17.8k
    AccName = getRegName(MI->getOperand(1).getReg());
469
17.8k
    AccStr = "-/+";
470
17.8k
    break;
471
12.4k
  }
472
12.4k
473
12.4k
  const char *DestName = getRegName(MI->getOperand(0).getReg());
474
12.4k
475
12.4k
  if (!Mul1Name) 
Mul1Name = "mem"0
;
476
12.4k
  if (!Mul2Name) 
Mul2Name = "mem"5.67k
;
477
12.4k
  if (!AccName)  
AccName = "mem"3.00k
;
478
12.4k
479
12.4k
  OS << DestName << " = ";
480
12.4k
  // TODO: Print masking information?
481
12.4k
482
12.4k
  if (Negate)
483
4.62k
    OS << '-';
484
12.4k
485
12.4k
  OS << '(' << Mul1Name << " * " << Mul2Name << ") " << AccStr << ' '
486
12.4k
     << AccName;
487
12.4k
488
12.4k
  return true;
489
12.4k
}
490
491
492
//===----------------------------------------------------------------------===//
493
// Top Level Entrypoint
494
//===----------------------------------------------------------------------===//
495
496
/// EmitAnyX86InstComments - This function decodes x86 instructions and prints
497
/// newline terminated strings to the specified string if desired.  This
498
/// information is shown in disassembly dumps when verbose assembly is enabled.
499
bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
500
904k
                                  const MCInstrInfo &MCII) {
501
904k
  // If this is a shuffle operation, the switch should fill in this state.
502
904k
  SmallVector<int, 8> ShuffleMask;
503
904k
  const char *DestName = nullptr, *Src1Name = nullptr, *Src2Name = nullptr;
504
904k
  unsigned NumOperands = MI->getNumOperands();
505
904k
  bool RegForm = false;
506
904k
507
904k
  if (printFMA3Comments(MI, OS))
508
12.4k
    return true;
509
892k
510
892k
  switch (MI->getOpcode()) {
511
892k
  default:
512
819k
    // Not an instruction for which we can decode comments.
513
819k
    return false;
514
892k
515
892k
  case X86::BLENDPDrri:
516
113
  case X86::VBLENDPDrri:
517
113
  case X86::VBLENDPDYrri:
518
113
    Src2Name = getRegName(MI->getOperand(2).getReg());
519
113
    LLVM_FALLTHROUGH;
520
175
  case X86::BLENDPDrmi:
521
175
  case X86::VBLENDPDrmi:
522
175
  case X86::VBLENDPDYrmi:
523
175
    if (MI->getOperand(NumOperands - 1).isImm())
524
175
      DecodeBLENDMask(getRegOperandNumElts(MI, 64, 0),
525
175
                      MI->getOperand(NumOperands - 1).getImm(),
526
175
                      ShuffleMask);
527
175
    Src1Name = getRegName(MI->getOperand(1).getReg());
528
175
    DestName = getRegName(MI->getOperand(0).getReg());
529
175
    break;
530
175
531
1.36k
  case X86::BLENDPSrri:
532
1.36k
  case X86::VBLENDPSrri:
533
1.36k
  case X86::VBLENDPSYrri:
534
1.36k
    Src2Name = getRegName(MI->getOperand(2).getReg());
535
1.36k
    LLVM_FALLTHROUGH;
536
1.51k
  case X86::BLENDPSrmi:
537
1.51k
  case X86::VBLENDPSrmi:
538
1.51k
  case X86::VBLENDPSYrmi:
539
1.51k
    if (MI->getOperand(NumOperands - 1).isImm())
540
1.51k
      DecodeBLENDMask(getRegOperandNumElts(MI, 32, 0),
541
1.51k
                      MI->getOperand(NumOperands - 1).getImm(),
542
1.51k
                      ShuffleMask);
543
1.51k
    Src1Name = getRegName(MI->getOperand(1).getReg());
544
1.51k
    DestName = getRegName(MI->getOperand(0).getReg());
545
1.51k
    break;
546
1.51k
547
2.66k
  case X86::PBLENDWrri:
548
2.66k
  case X86::VPBLENDWrri:
549
2.66k
  case X86::VPBLENDWYrri:
550
2.66k
    Src2Name = getRegName(MI->getOperand(2).getReg());
551
2.66k
    LLVM_FALLTHROUGH;
552
2.75k
  case X86::PBLENDWrmi:
553
2.75k
  case X86::VPBLENDWrmi:
554
2.75k
  case X86::VPBLENDWYrmi:
555
2.75k
    if (MI->getOperand(NumOperands - 1).isImm())
556
2.75k
      DecodeBLENDMask(getRegOperandNumElts(MI, 16, 0),
557
2.75k
                      MI->getOperand(NumOperands - 1).getImm(),
558
2.75k
                      ShuffleMask);
559
2.75k
    Src1Name = getRegName(MI->getOperand(1).getReg());
560
2.75k
    DestName = getRegName(MI->getOperand(0).getReg());
561
2.75k
    break;
562
2.75k
563
2.75k
  case X86::VPBLENDDrri:
564
904
  case X86::VPBLENDDYrri:
565
904
    Src2Name = getRegName(MI->getOperand(2).getReg());
566
904
    LLVM_FALLTHROUGH;
567
951
  case X86::VPBLENDDrmi:
568
951
  case X86::VPBLENDDYrmi:
569
951
    if (MI->getOperand(NumOperands - 1).isImm())
570
951
      DecodeBLENDMask(getRegOperandNumElts(MI, 32, 0),
571
951
                      MI->getOperand(NumOperands - 1).getImm(),
572
951
                      ShuffleMask);
573
951
    Src1Name = getRegName(MI->getOperand(1).getReg());
574
951
    DestName = getRegName(MI->getOperand(0).getReg());
575
951
    break;
576
951
577
1.53k
  case X86::INSERTPSrr:
578
1.53k
  case X86::VINSERTPSrr:
579
1.53k
  case X86::VINSERTPSZrr:
580
1.53k
    Src2Name = getRegName(MI->getOperand(2).getReg());
581
1.53k
    LLVM_FALLTHROUGH;
582
1.99k
  case X86::INSERTPSrm:
583
1.99k
  case X86::VINSERTPSrm:
584
1.99k
  case X86::VINSERTPSZrm:
585
1.99k
    DestName = getRegName(MI->getOperand(0).getReg());
586
1.99k
    Src1Name = getRegName(MI->getOperand(1).getReg());
587
1.99k
    if (MI->getOperand(NumOperands - 1).isImm())
588
1.99k
      DecodeINSERTPSMask(MI->getOperand(NumOperands - 1).getImm(),
589
1.99k
                         ShuffleMask);
590
1.99k
    break;
591
1.99k
592
1.99k
  case X86::MOVLHPSrr:
593
984
  case X86::VMOVLHPSrr:
594
984
  case X86::VMOVLHPSZrr:
595
984
    Src2Name = getRegName(MI->getOperand(2).getReg());
596
984
    Src1Name = getRegName(MI->getOperand(1).getReg());
597
984
    DestName = getRegName(MI->getOperand(0).getReg());
598
984
    DecodeMOVLHPSMask(2, ShuffleMask);
599
984
    break;
600
984
601
984
  case X86::MOVHLPSrr:
602
249
  case X86::VMOVHLPSrr:
603
249
  case X86::VMOVHLPSZrr:
604
249
    Src2Name = getRegName(MI->getOperand(2).getReg());
605
249
    Src1Name = getRegName(MI->getOperand(1).getReg());
606
249
    DestName = getRegName(MI->getOperand(0).getReg());
607
249
    DecodeMOVHLPSMask(2, ShuffleMask);
608
249
    break;
609
249
610
249
  case X86::MOVHPDrm:
611
70
  case X86::VMOVHPDrm:
612
70
  case X86::VMOVHPDZ128rm:
613
70
    Src1Name = getRegName(MI->getOperand(1).getReg());
614
70
    DestName = getRegName(MI->getOperand(0).getReg());
615
70
    DecodeInsertElementMask(2, 1, 1, ShuffleMask);
616
70
    break;
617
70
618
343
  case X86::MOVHPSrm:
619
343
  case X86::VMOVHPSrm:
620
343
  case X86::VMOVHPSZ128rm:
621
343
    Src1Name = getRegName(MI->getOperand(1).getReg());
622
343
    DestName = getRegName(MI->getOperand(0).getReg());
623
343
    DecodeInsertElementMask(4, 2, 2, ShuffleMask);
624
343
    break;
625
343
626
343
  case X86::MOVLPDrm:
627
60
  case X86::VMOVLPDrm:
628
60
  case X86::VMOVLPDZ128rm:
629
60
    Src1Name = getRegName(MI->getOperand(1).getReg());
630
60
    DestName = getRegName(MI->getOperand(0).getReg());
631
60
    DecodeInsertElementMask(2, 0, 1, ShuffleMask);
632
60
    break;
633
60
634
239
  case X86::MOVLPSrm:
635
239
  case X86::VMOVLPSrm:
636
239
  case X86::VMOVLPSZ128rm:
637
239
    Src1Name = getRegName(MI->getOperand(1).getReg());
638
239
    DestName = getRegName(MI->getOperand(0).getReg());
639
239
    DecodeInsertElementMask(4, 0, 2, ShuffleMask);
640
239
    break;
641
239
642
2.18k
  
CASE_MOVDUP239
(MOVSLDUP, r)
643
2.18k
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
644
2.18k
    
LLVM_FALLTHROUGH182
;
645
2.18k
646
2.18k
  
CASE_MOVDUP182
(MOVSLDUP, m)
647
350
    DestName = getRegName(MI->getOperand(0).getReg());
648
350
    DecodeMOVSLDUPMask(getRegOperandNumElts(MI, 32, 0), ShuffleMask);
649
350
    break;
650
3.85k
651
12.5k
  
CASE_MOVDUP350
(MOVSHDUP, r)
652
12.5k
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
653
12.5k
    
LLVM_FALLTHROUGH1.04k
;
654
12.5k
655
12.5k
  
CASE_MOVDUP1.04k
(MOVSHDUP, m)
656
1.22k
    DestName = getRegName(MI->getOperand(0).getReg());
657
1.22k
    DecodeMOVSHDUPMask(getRegOperandNumElts(MI, 32, 0), ShuffleMask);
658
1.22k
    break;
659
13.4k
660
13.4k
  
CASE_MOVDUP1.22k
(MOVDDUP, r)
661
4.70k
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
662
4.70k
    
LLVM_FALLTHROUGH392
;
663
4.70k
664
4.70k
  
CASE_MOVDUP392
(MOVDDUP, m)
665
769
    DestName = getRegName(MI->getOperand(0).getReg());
666
769
    DecodeMOVDDUPMask(getRegOperandNumElts(MI, 64, 0), ShuffleMask);
667
769
    break;
668
8.45k
669
8.45k
  case X86::PSLLDQri:
670
415
  case X86::VPSLLDQri:
671
415
  case X86::VPSLLDQYri:
672
415
  case X86::VPSLLDQZ128rr:
673
415
  case X86::VPSLLDQZ256rr:
674
415
  case X86::VPSLLDQZrr:
675
415
    Src1Name = getRegName(MI->getOperand(1).getReg());
676
415
    LLVM_FALLTHROUGH;
677
450
  case X86::VPSLLDQZ128rm:
678
450
  case X86::VPSLLDQZ256rm:
679
450
  case X86::VPSLLDQZrm:
680
450
    DestName = getRegName(MI->getOperand(0).getReg());
681
450
    if (MI->getOperand(NumOperands - 1).isImm())
682
450
      DecodePSLLDQMask(getRegOperandNumElts(MI, 8, 0),
683
450
                       MI->getOperand(NumOperands - 1).getImm(),
684
450
                       ShuffleMask);
685
450
    break;
686
450
687
479
  case X86::PSRLDQri:
688
479
  case X86::VPSRLDQri:
689
479
  case X86::VPSRLDQYri:
690
479
  case X86::VPSRLDQZ128rr:
691
479
  case X86::VPSRLDQZ256rr:
692
479
  case X86::VPSRLDQZrr:
693
479
    Src1Name = getRegName(MI->getOperand(1).getReg());
694
479
    LLVM_FALLTHROUGH;
695
514
  case X86::VPSRLDQZ128rm:
696
514
  case X86::VPSRLDQZ256rm:
697
514
  case X86::VPSRLDQZrm:
698
514
    DestName = getRegName(MI->getOperand(0).getReg());
699
514
    if (MI->getOperand(NumOperands - 1).isImm())
700
514
      DecodePSRLDQMask(getRegOperandNumElts(MI, 8, 0),
701
514
                       MI->getOperand(NumOperands - 1).getImm(),
702
514
                       ShuffleMask);
703
514
    break;
704
514
705
10.3k
  
CASE_SHUF514
(PALIGNR, rri)
706
10.3k
    Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
707
10.3k
    RegForm = true;
708
10.3k
    
LLVM_FALLTHROUGH863
;
709
10.3k
710
10.3k
  
CASE_SHUF863
(PALIGNR, rmi)
711
962
    Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?
3863
:
799
)).getReg());
712
962
    DestName = getRegName(MI->getOperand(0).getReg());
713
962
    if (MI->getOperand(NumOperands - 1).isImm())
714
962
      DecodePALIGNRMask(getRegOperandNumElts(MI, 8, 0),
715
962
                        MI->getOperand(NumOperands - 1).getImm(),
716
962
                        ShuffleMask);
717
962
    break;
718
10.5k
719
10.5k
  
CASE_AVX512_INS_COMMON962
(ALIGNQ, Z, rri)
720
174
  
CASE_AVX512_INS_COMMON58
(ALIGNQ, Z256, rri)
721
174
  
CASE_AVX512_INS_COMMON58
(ALIGNQ, Z128, rri)
722
174
    Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
723
174
    RegForm = true;
724
174
    
LLVM_FALLTHROUGH58
;
725
174
726
387
  
CASE_AVX512_INS_COMMON58
(ALIGNQ, Z, rmi)
727
387
  
CASE_AVX512_INS_COMMON129
(ALIGNQ, Z256, rmi)
728
387
  
CASE_AVX512_INS_COMMON129
(ALIGNQ, Z128, rmi)
729
129
    Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?
358
:
771
)).getReg());
730
129
    DestName = getRegName(MI->getOperand(0).getReg());
731
129
    if (MI->getOperand(NumOperands - 1).isImm())
732
129
      DecodeVALIGNMask(getRegOperandNumElts(MI, 64, 0),
733
129
                       MI->getOperand(NumOperands - 1).getImm(),
734
129
                       ShuffleMask);
735
129
    break;
736
258
737
258
  
CASE_AVX512_INS_COMMON129
(ALIGND, Z, rri)
738
168
  
CASE_AVX512_INS_COMMON56
(ALIGND, Z256, rri)
739
168
  
CASE_AVX512_INS_COMMON56
(ALIGND, Z128, rri)
740
168
    Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
741
168
    RegForm = true;
742
168
    
LLVM_FALLTHROUGH56
;
743
168
744
330
  
CASE_AVX512_INS_COMMON56
(ALIGND, Z, rmi)
745
330
  
CASE_AVX512_INS_COMMON110
(ALIGND, Z256, rmi)
746
330
  
CASE_AVX512_INS_COMMON110
(ALIGND, Z128, rmi)
747
110
    Src2Name = getRegName(MI->getOperand(NumOperands-(RegForm?
356
:
754
)).getReg());
748
110
    DestName = getRegName(MI->getOperand(0).getReg());
749
110
    if (MI->getOperand(NumOperands - 1).isImm())
750
110
      DecodeVALIGNMask(getRegOperandNumElts(MI, 32, 0),
751
110
                       MI->getOperand(NumOperands - 1).getImm(),
752
110
                       ShuffleMask);
753
110
    break;
754
220
755
192k
  
CASE_SHUF110
(PSHUFD, ri)
756
192k
    Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
757
192k
    
LLVM_FALLTHROUGH16.0k
;
758
192k
759
192k
  
CASE_SHUF16.0k
(PSHUFD, mi)
760
16.3k
    DestName = getRegName(MI->getOperand(0).getReg());
761
16.3k
    if (MI->getOperand(NumOperands - 1).isImm())
762
16.3k
      DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32,
763
16.3k
                      MI->getOperand(NumOperands - 1).getImm(),
764
16.3k
                      ShuffleMask);
765
16.3k
    break;
766
179k
767
179k
  
CASE_SHUF16.3k
(PSHUFHW, ri)
768
7.27k
    Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
769
7.27k
    
LLVM_FALLTHROUGH606
;
770
7.27k
771
7.27k
  
CASE_SHUF606
(PSHUFHW, mi)
772
728
    DestName = getRegName(MI->getOperand(0).getReg());
773
728
    if (MI->getOperand(NumOperands - 1).isImm())
774
728
      DecodePSHUFHWMask(getRegOperandNumElts(MI, 16, 0),
775
728
                        MI->getOperand(NumOperands - 1).getImm(),
776
728
                        ShuffleMask);
777
728
    break;
778
8.00k
779
23.8k
  
CASE_SHUF728
(PSHUFLW, ri)
780
23.8k
    Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
781
23.8k
    
LLVM_FALLTHROUGH1.98k
;
782
23.8k
783
23.8k
  
CASE_SHUF1.98k
(PSHUFLW, mi)
784
2.13k
    DestName = getRegName(MI->getOperand(0).getReg());
785
2.13k
    if (MI->getOperand(NumOperands - 1).isImm())
786
2.13k
      DecodePSHUFLWMask(getRegOperandNumElts(MI, 16, 0),
787
2.13k
                        MI->getOperand(NumOperands - 1).getImm(),
788
2.13k
                        ShuffleMask);
789
2.13k
    break;
790
23.4k
791
23.4k
  case X86::MMX_PSHUFWri:
792
63
    Src1Name = getRegName(MI->getOperand(1).getReg());
793
63
    LLVM_FALLTHROUGH;
794
63
795
86
  case X86::MMX_PSHUFWmi:
796
86
    DestName = getRegName(MI->getOperand(0).getReg());
797
86
    if (MI->getOperand(NumOperands - 1).isImm())
798
86
      DecodePSHUFMask(4, 16, MI->getOperand(NumOperands - 1).getImm(),
799
86
                      ShuffleMask);
800
86
    break;
801
63
802
63
  case X86::PSWAPDrr:
803
6
    Src1Name = getRegName(MI->getOperand(1).getReg());
804
6
    LLVM_FALLTHROUGH;
805
6
806
7
  case X86::PSWAPDrm:
807
7
    DestName = getRegName(MI->getOperand(0).getReg());
808
7
    DecodePSWAPMask(2, ShuffleMask);
809
7
    break;
810
6
811
15.2k
  
CASE_UNPCK7
(PUNPCKHBW, r)
812
15.2k
  case X86::MMX_PUNPCKHBWirr:
813
1.27k
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
814
1.27k
    RegForm = true;
815
1.27k
    LLVM_FALLTHROUGH;
816
1.27k
817
16.8k
  
CASE_UNPCK1.27k
(PUNPCKHBW, m)
818
16.8k
  case X86::MMX_PUNPCKHBWirm:
819
1.40k
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
21.27k
:
6130
)).getReg());
820
1.40k
    DestName = getRegName(MI->getOperand(0).getReg());
821
1.40k
    DecodeUNPCKHMask(getRegOperandNumElts(MI, 8, 0), 8, ShuffleMask);
822
1.40k
    break;
823
16.8k
824
16.8k
  
CASE_UNPCK1.40k
(PUNPCKHWD, r)
825
10.5k
  case X86::MMX_PUNPCKHWDirr:
826
879
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
827
879
    RegForm = true;
828
879
    LLVM_FALLTHROUGH;
829
879
830
12.0k
  
CASE_UNPCK879
(PUNPCKHWD, m)
831
12.0k
  case X86::MMX_PUNPCKHWDirm:
832
1.00k
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2879
:
6121
)).getReg());
833
1.00k
    DestName = getRegName(MI->getOperand(0).getReg());
834
1.00k
    DecodeUNPCKHMask(getRegOperandNumElts(MI, 16, 0), 16, ShuffleMask);
835
1.00k
    break;
836
12.0k
837
12.0k
  
CASE_UNPCK1.00k
(PUNPCKHDQ, r)
838
4.05k
  case X86::MMX_PUNPCKHDQirr:
839
338
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
840
338
    RegForm = true;
841
338
    LLVM_FALLTHROUGH;
842
338
843
5.94k
  
CASE_UNPCK338
(PUNPCKHDQ, m)
844
5.94k
  case X86::MMX_PUNPCKHDQirm:
845
495
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2338
:
6157
)).getReg());
846
495
    DestName = getRegName(MI->getOperand(0).getReg());
847
495
    DecodeUNPCKHMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);
848
495
    break;
849
5.94k
850
5.94k
  
CASE_UNPCK495
(PUNPCKHQDQ, r)
851
2.97k
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
852
2.97k
    RegForm = true;
853
2.97k
    
LLVM_FALLTHROUGH248
;
854
2.97k
855
2.97k
  
CASE_UNPCK248
(PUNPCKHQDQ, m)
856
382
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2248
:
6134
)).getReg());
857
382
    DestName = getRegName(MI->getOperand(0).getReg());
858
382
    DecodeUNPCKHMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);
859
382
    break;
860
4.20k
861
22.7k
  
CASE_UNPCK382
(PUNPCKLBW, r)
862
22.7k
  case X86::MMX_PUNPCKLBWirr:
863
1.89k
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
864
1.89k
    RegForm = true;
865
1.89k
    LLVM_FALLTHROUGH;
866
1.89k
867
24.2k
  
CASE_UNPCK1.89k
(PUNPCKLBW, m)
868
24.2k
  case X86::MMX_PUNPCKLBWirm:
869
2.02k
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
21.89k
:
6122
)).getReg());
870
2.02k
    DestName = getRegName(MI->getOperand(0).getReg());
871
2.02k
    DecodeUNPCKLMask(getRegOperandNumElts(MI, 8, 0), 8, ShuffleMask);
872
2.02k
    break;
873
24.2k
874
24.2k
  
CASE_UNPCK2.02k
(PUNPCKLWD, r)
875
19.9k
  case X86::MMX_PUNPCKLWDirr:
876
1.66k
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
877
1.66k
    RegForm = true;
878
1.66k
    LLVM_FALLTHROUGH;
879
1.66k
880
21.6k
  
CASE_UNPCK1.66k
(PUNPCKLWD, m)
881
21.6k
  case X86::MMX_PUNPCKLWDirm:
882
1.80k
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
21.66k
:
6141
)).getReg());
883
1.80k
    DestName = getRegName(MI->getOperand(0).getReg());
884
1.80k
    DecodeUNPCKLMask(getRegOperandNumElts(MI, 16, 0), 16, ShuffleMask);
885
1.80k
    break;
886
21.6k
887
25.2k
  
CASE_UNPCK1.80k
(PUNPCKLDQ, r)
888
25.2k
  case X86::MMX_PUNPCKLDQirr:
889
2.10k
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
890
2.10k
    RegForm = true;
891
2.10k
    LLVM_FALLTHROUGH;
892
2.10k
893
27.2k
  
CASE_UNPCK2.10k
(PUNPCKLDQ, m)
894
27.2k
  case X86::MMX_PUNPCKLDQirm:
895
2.27k
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
22.10k
:
6165
)).getReg());
896
2.27k
    DestName = getRegName(MI->getOperand(0).getReg());
897
2.27k
    DecodeUNPCKLMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);
898
2.27k
    break;
899
27.2k
900
27.2k
  
CASE_UNPCK2.27k
(PUNPCKLQDQ, r)
901
16.1k
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
902
16.1k
    RegForm = true;
903
16.1k
    
LLVM_FALLTHROUGH1.34k
;
904
16.1k
905
16.1k
  
CASE_UNPCK1.34k
(PUNPCKLQDQ, m)
906
1.48k
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
21.34k
:
6142
)).getReg());
907
1.48k
    DestName = getRegName(MI->getOperand(0).getReg());
908
1.48k
    DecodeUNPCKLMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);
909
1.48k
    break;
910
16.3k
911
16.3k
  
CASE_SHUF1.48k
(SHUFPD, rri)
912
1.62k
    Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
913
1.62k
    RegForm = true;
914
1.62k
    
LLVM_FALLTHROUGH135
;
915
1.62k
916
1.62k
  
CASE_SHUF135
(SHUFPD, rmi)
917
289
    if (MI->getOperand(NumOperands - 1).isImm())
918
289
      DecodeSHUFPMask(getRegOperandNumElts(MI, 64, 0), 64,
919
289
                      MI->getOperand(NumOperands - 1).getImm(), ShuffleMask);
920
289
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
3135
:
7154
)).getReg());
921
289
    DestName = getRegName(MI->getOperand(0).getReg());
922
289
    break;
923
3.17k
924
31.6k
  
CASE_SHUF289
(SHUFPS, rri)
925
31.6k
    Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
926
31.6k
    RegForm = true;
927
31.6k
    
LLVM_FALLTHROUGH2.63k
;
928
31.6k
929
31.6k
  
CASE_SHUF2.63k
(SHUFPS, rmi)
930
2.86k
    if (MI->getOperand(NumOperands - 1).isImm())
931
2.86k
      DecodeSHUFPMask(getRegOperandNumElts(MI, 32, 0), 32,
932
2.86k
                      MI->getOperand(NumOperands - 1).getImm(),
933
2.86k
                      ShuffleMask);
934
2.86k
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
32.63k
:
7224
)).getReg());
935
2.86k
    DestName = getRegName(MI->getOperand(0).getReg());
936
2.86k
    break;
937
31.4k
938
31.4k
  
CASE_VSHUF2.86k
(64X2, r)
939
1.86k
    Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
940
1.86k
    RegForm = true;
941
1.86k
    
LLVM_FALLTHROUGH155
;
942
1.86k
943
1.86k
  
CASE_VSHUF155
(64X2, m)
944
293
    decodeVSHUF64x2FamilyMask(getRegOperandNumElts(MI, 64, 0), 64,
945
293
                              MI->getOperand(NumOperands - 1).getImm(),
946
293
                              ShuffleMask);
947
293
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
3155
:
7138
)).getReg());
948
293
    DestName = getRegName(MI->getOperand(0).getReg());
949
293
    break;
950
3.22k
951
3.22k
  
CASE_VSHUF293
(32X4, r)
952
1.20k
    Src2Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
953
1.20k
    RegForm = true;
954
1.20k
    
LLVM_FALLTHROUGH100
;
955
1.20k
956
1.20k
  
CASE_VSHUF100
(32X4, m)
957
258
    decodeVSHUF64x2FamilyMask(getRegOperandNumElts(MI, 32, 0), 32,
958
258
                              MI->getOperand(NumOperands - 1).getImm(),
959
258
                              ShuffleMask);
960
258
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
3100
:
7158
)).getReg());
961
258
    DestName = getRegName(MI->getOperand(0).getReg());
962
258
    break;
963
2.83k
964
2.92k
  
CASE_UNPCK258
(UNPCKLPD, r)
965
2.92k
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
966
2.92k
    RegForm = true;
967
2.92k
    
LLVM_FALLTHROUGH244
;
968
2.92k
969
2.92k
  
CASE_UNPCK244
(UNPCKLPD, m)
970
554
    DecodeUNPCKLMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);
971
554
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2244
:
6310
)).getReg());
972
554
    DestName = getRegName(MI->getOperand(0).getReg());
973
554
    break;
974
6.09k
975
9.06k
  
CASE_UNPCK554
(UNPCKLPS, r)
976
9.06k
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
977
9.06k
    RegForm = true;
978
9.06k
    
LLVM_FALLTHROUGH755
;
979
9.06k
980
9.06k
  
CASE_UNPCK755
(UNPCKLPS, m)
981
943
    DecodeUNPCKLMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);
982
943
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2755
:
6188
)).getReg());
983
943
    DestName = getRegName(MI->getOperand(0).getReg());
984
943
    break;
985
10.3k
986
10.6k
  
CASE_UNPCK943
(UNPCKHPD, r)
987
10.6k
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
988
10.6k
    RegForm = true;
989
10.6k
    
LLVM_FALLTHROUGH887
;
990
10.6k
991
10.6k
  
CASE_UNPCK887
(UNPCKHPD, m)
992
1.06k
    DecodeUNPCKHMask(getRegOperandNumElts(MI, 64, 0), 64, ShuffleMask);
993
1.06k
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2887
:
6173
)).getReg());
994
1.06k
    DestName = getRegName(MI->getOperand(0).getReg());
995
1.06k
    break;
996
11.6k
997
11.6k
  
CASE_UNPCK1.06k
(UNPCKHPS, r)
998
2.92k
    Src2Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
999
2.92k
    RegForm = true;
1000
2.92k
    
LLVM_FALLTHROUGH244
;
1001
2.92k
1002
2.92k
  
CASE_UNPCK244
(UNPCKHPS, m)
1003
409
    DecodeUNPCKHMask(getRegOperandNumElts(MI, 32, 0), 32, ShuffleMask);
1004
409
    Src1Name = getRegName(MI->getOperand(NumOperands-(RegForm?
2244
:
6165
)).getReg());
1005
409
    DestName = getRegName(MI->getOperand(0).getReg());
1006
409
    break;
1007
4.49k
1008
18.2k
  
CASE_VPERMILPI409
(PERMILPS, r)
1009
18.2k
    Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1010
18.2k
    
LLVM_FALLTHROUGH1.65k
;
1011
18.2k
1012
18.2k
  
CASE_VPERMILPI1.65k
(PERMILPS, m)
1013
1.87k
    if (MI->getOperand(NumOperands - 1).isImm())
1014
1.87k
      DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32,
1015
1.87k
                      MI->getOperand(NumOperands - 1).getImm(),
1016
1.87k
                      ShuffleMask);
1017
1.87k
    DestName = getRegName(MI->getOperand(0).getReg());
1018
1.87k
    break;
1019
18.7k
1020
18.7k
  
CASE_VPERMILPI1.87k
(PERMILPD, r)
1021
18.3k
    Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1022
18.3k
    
LLVM_FALLTHROUGH1.66k
;
1023
18.3k
1024
18.3k
  
CASE_VPERMILPI1.66k
(PERMILPD, m)
1025
1.88k
    if (MI->getOperand(NumOperands - 1).isImm())
1026
1.88k
      DecodePSHUFMask(getRegOperandNumElts(MI, 64, 0), 64,
1027
1.88k
                      MI->getOperand(NumOperands - 1).getImm(),
1028
1.88k
                      ShuffleMask);
1029
1.88k
    DestName = getRegName(MI->getOperand(0).getReg());
1030
1.88k
    break;
1031
18.8k
1032
18.8k
  case X86::VPERM2F128rr:
1033
343
  case X86::VPERM2I128rr:
1034
343
    Src2Name = getRegName(MI->getOperand(2).getReg());
1035
343
    LLVM_FALLTHROUGH;
1036
343
1037
421
  case X86::VPERM2F128rm:
1038
421
  case X86::VPERM2I128rm:
1039
421
    // For instruction comments purpose, assume the 256-bit vector is v4i64.
1040
421
    if (MI->getOperand(NumOperands - 1).isImm())
1041
421
      DecodeVPERM2X128Mask(4, MI->getOperand(NumOperands - 1).getImm(),
1042
421
                           ShuffleMask);
1043
421
    Src1Name = getRegName(MI->getOperand(1).getReg());
1044
421
    DestName = getRegName(MI->getOperand(0).getReg());
1045
421
    break;
1046
421
1047
3.33k
  
CASE_VPERM421
(PERMPD, r)
1048
3.33k
    Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1049
3.33k
    
LLVM_FALLTHROUGH476
;
1050
3.33k
1051
3.33k
  
CASE_VPERM476
(PERMPD, m)
1052
584
    if (MI->getOperand(NumOperands - 1).isImm())
1053
584
      DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0),
1054
584
                      MI->getOperand(NumOperands - 1).getImm(),
1055
584
                      ShuffleMask);
1056
584
    DestName = getRegName(MI->getOperand(0).getReg());
1057
584
    break;
1058
3.50k
1059
8.19k
  
CASE_VPERM584
(PERMQ, r)
1060
8.19k
    Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg());
1061
8.19k
    
LLVM_FALLTHROUGH1.17k
;
1062
8.19k
1063
8.19k
  
CASE_VPERM1.17k
(PERMQ, m)
1064
1.26k
    if (MI->getOperand(NumOperands - 1).isImm())
1065
1.26k
      DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0),
1066
1.26k
                      MI->getOperand(NumOperands - 1).getImm(),
1067
1.26k
                      ShuffleMask);
1068
1.26k
    DestName = getRegName(MI->getOperand(0).getReg());
1069
1.26k
    break;
1070
7.61k
1071
7.61k
  case X86::MOVSDrr:
1072
572
  case X86::VMOVSDrr:
1073
572
  case X86::VMOVSDZrr:
1074
572
    Src2Name = getRegName(MI->getOperand(2).getReg());
1075
572
    Src1Name = getRegName(MI->getOperand(1).getReg());
1076
572
    LLVM_FALLTHROUGH;
1077
572
1078
2.67k
  case X86::MOVSDrm_alt:
1079
2.67k
  case X86::MOVSDrm:
1080
2.67k
  case X86::VMOVSDrm_alt:
1081
2.67k
  case X86::VMOVSDrm:
1082
2.67k
  case X86::VMOVSDZrm:
1083
2.67k
  case X86::VMOVSDZrm_alt:
1084
2.67k
    DecodeScalarMoveMask(2, nullptr == Src2Name, ShuffleMask);
1085
2.67k
    DestName = getRegName(MI->getOperand(0).getReg());
1086
2.67k
    break;
1087
2.67k
1088
2.67k
  case X86::MOVSSrr:
1089
219
  case X86::VMOVSSrr:
1090
219
  case X86::VMOVSSZrr:
1091
219
    Src2Name = getRegName(MI->getOperand(2).getReg());
1092
219
    Src1Name = getRegName(MI->getOperand(1).getReg());
1093
219
    LLVM_FALLTHROUGH;
1094
219
1095
2.47k
  case X86::MOVSSrm:
1096
2.47k
  case X86::MOVSSrm_alt:
1097
2.47k
  case X86::VMOVSSrm:
1098
2.47k
  case X86::VMOVSSrm_alt:
1099
2.47k
  case X86::VMOVSSZrm:
1100
2.47k
  case X86::VMOVSSZrm_alt:
1101
2.47k
    DecodeScalarMoveMask(4, nullptr == Src2Name, ShuffleMask);
1102
2.47k
    DestName = getRegName(MI->getOperand(0).getReg());
1103
2.47k
    break;
1104
2.47k
1105
2.47k
  case X86::MOVPQI2QIrr:
1106
267
  case X86::MOVZPQILo2PQIrr:
1107
267
  case X86::VMOVPQI2QIrr:
1108
267
  case X86::VMOVPQI2QIZrr:
1109
267
  case X86::VMOVZPQILo2PQIrr:
1110
267
  case X86::VMOVZPQILo2PQIZrr:
1111
267
    Src1Name = getRegName(MI->getOperand(1).getReg());
1112
267
    LLVM_FALLTHROUGH;
1113
267
1114
1.00k
  case X86::MOVQI2PQIrm:
1115
1.00k
  case X86::VMOVQI2PQIrm:
1116
1.00k
  case X86::VMOVQI2PQIZrm:
1117
1.00k
    DecodeZeroMoveLowMask(2, ShuffleMask);
1118
1.00k
    DestName = getRegName(MI->getOperand(0).getReg());
1119
1.00k
    break;
1120
1.00k
1121
1.05k
  case X86::MOVDI2PDIrm:
1122
1.05k
  case X86::VMOVDI2PDIrm:
1123
1.05k
  case X86::VMOVDI2PDIZrm:
1124
1.05k
    DecodeZeroMoveLowMask(4, ShuffleMask);
1125
1.05k
    DestName = getRegName(MI->getOperand(0).getReg());
1126
1.05k
    break;
1127
1.05k
1128
1.05k
  case X86::EXTRQI:
1129
59
    if (MI->getOperand(2).isImm() &&
1130
59
        MI->getOperand(3).isImm())
1131
59
      DecodeEXTRQIMask(16, 8, MI->getOperand(2).getImm(),
1132
59
                       MI->getOperand(3).getImm(), ShuffleMask);
1133
59
1134
59
    DestName = getRegName(MI->getOperand(0).getReg());
1135
59
    Src1Name = getRegName(MI->getOperand(1).getReg());
1136
59
    break;
1137
1.05k
1138
1.05k
  case X86::INSERTQI:
1139
61
    if (MI->getOperand(3).isImm() &&
1140
61
        MI->getOperand(4).isImm())
1141
61
      DecodeINSERTQIMask(16, 8, MI->getOperand(3).getImm(),
1142
61
                         MI->getOperand(4).getImm(), ShuffleMask);
1143
61
1144
61
    DestName = getRegName(MI->getOperand(0).getReg());
1145
61
    Src1Name = getRegName(MI->getOperand(1).getReg());
1146
61
    Src2Name = getRegName(MI->getOperand(2).getReg());
1147
61
    break;
1148
1.05k
1149
1.05k
  case X86::VBROADCASTF128:
1150
474
  case X86::VBROADCASTI128:
1151
1.42k
  
CASE_AVX512_INS_COMMON474
(BROADCASTF64X2, Z128, rm)
1152
1.42k
  
CASE_AVX512_INS_COMMON474
(BROADCASTI64X2, Z128, rm)
1153
474
    DecodeSubVectorBroadcast(4, 2, ShuffleMask);
1154
474
    DestName = getRegName(MI->getOperand(0).getReg());
1155
474
    break;
1156
948
  
CASE_AVX512_INS_COMMON474
(BROADCASTF64X2, , rm)
1157
120
  
CASE_AVX512_INS_COMMON40
(BROADCASTI64X2, , rm)
1158
40
    DecodeSubVectorBroadcast(8, 2, ShuffleMask);
1159
40
    DestName = getRegName(MI->getOperand(0).getReg());
1160
40
    break;
1161
615
  
CASE_AVX512_INS_COMMON40
(BROADCASTF64X4, , rm)
1162
615
  
CASE_AVX512_INS_COMMON205
(BROADCASTI64X4, , rm)
1163
205
    DecodeSubVectorBroadcast(8, 4, ShuffleMask);
1164
205
    DestName = getRegName(MI->getOperand(0).getReg());
1165
205
    break;
1166
410
  
CASE_AVX512_INS_COMMON205
(BROADCASTF32X4, Z256, rm)
1167
120
  
CASE_AVX512_INS_COMMON40
(BROADCASTI32X4, Z256, rm)
1168
40
    DecodeSubVectorBroadcast(8, 4, ShuffleMask);
1169
40
    DestName = getRegName(MI->getOperand(0).getReg());
1170
40
    break;
1171
780
  
CASE_AVX512_INS_COMMON40
(BROADCASTF32X4, , rm)
1172
780
  
CASE_AVX512_INS_COMMON260
(BROADCASTI32X4, , rm)
1173
260
    DecodeSubVectorBroadcast(16, 4, ShuffleMask);
1174
260
    DestName = getRegName(MI->getOperand(0).getReg());
1175
260
    break;
1176
520
  
CASE_AVX512_INS_COMMON260
(BROADCASTF32X8, , rm)
1177
228
  
CASE_AVX512_INS_COMMON76
(BROADCASTI32X8, , rm)
1178
76
    DecodeSubVectorBroadcast(16, 8, ShuffleMask);
1179
76
    DestName = getRegName(MI->getOperand(0).getReg());
1180
76
    break;
1181
152
  
CASE_AVX512_INS_COMMON76
(BROADCASTI32X2, Z128, r)
1182
48
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1183
48
    
LLVM_FALLTHROUGH16
;
1184
48
  
CASE_AVX512_INS_COMMON16
(BROADCASTI32X2, Z128, m)
1185
36
    DecodeSubVectorBroadcast(4, 2, ShuffleMask);
1186
36
    DestName = getRegName(MI->getOperand(0).getReg());
1187
36
    break;
1188
96
  
CASE_AVX512_INS_COMMON36
(BROADCASTF32X2, Z256, r)
1189
96
  
CASE_AVX512_INS_COMMON32
(BROADCASTI32X2, Z256, r)
1190
96
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1191
96
    
LLVM_FALLTHROUGH32
;
1192
219
  
CASE_AVX512_INS_COMMON32
(BROADCASTF32X2, Z256, m)
1193
219
  
CASE_AVX512_INS_COMMON73
(BROADCASTI32X2, Z256, m)
1194
73
    DecodeSubVectorBroadcast(8, 2, ShuffleMask);
1195
73
    DestName = getRegName(MI->getOperand(0).getReg());
1196
73
    break;
1197
146
  
CASE_AVX512_INS_COMMON73
(BROADCASTF32X2, Z, r)
1198
96
  
CASE_AVX512_INS_COMMON32
(BROADCASTI32X2, Z, r)
1199
96
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1200
96
    
LLVM_FALLTHROUGH32
;
1201
216
  
CASE_AVX512_INS_COMMON32
(BROADCASTF32X2, Z, m)
1202
216
  
CASE_AVX512_INS_COMMON72
(BROADCASTI32X2, Z, m)
1203
72
    DecodeSubVectorBroadcast(16, 2, ShuffleMask);
1204
72
    DestName = getRegName(MI->getOperand(0).getReg());
1205
72
    break;
1206
144
1207
17.3k
  
CASE_PMOVZX72
(PMOVZXBW, r)
1208
17.3k
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1209
17.3k
    
LLVM_FALLTHROUGH1.44k
;
1210
17.3k
  
CASE_PMOVZX1.44k
(PMOVZXBW, m)
1211
1.60k
    DecodeZeroExtendMask(8, 16, getRegOperandNumElts(MI, 16, 0), false,
1212
1.60k
                         ShuffleMask);
1213
1.60k
    DestName = getRegName(MI->getOperand(0).getReg());
1214
1.60k
    break;
1215
17.6k
1216
17.6k
  
CASE_PMOVZX1.60k
(PMOVZXBD, r)
1217
10.5k
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1218
10.5k
    
LLVM_FALLTHROUGH882
;
1219
10.5k
  
CASE_PMOVZX882
(PMOVZXBD, m)
1220
1.32k
    DecodeZeroExtendMask(8, 32, getRegOperandNumElts(MI, 32, 0), false,
1221
1.32k
                         ShuffleMask);
1222
1.32k
    DestName = getRegName(MI->getOperand(0).getReg());
1223
1.32k
    break;
1224
14.5k
1225
14.5k
  
CASE_PMOVZX1.32k
(PMOVZXBQ, r)
1226
5.16k
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1227
5.16k
    
LLVM_FALLTHROUGH430
;
1228
5.16k
  
CASE_PMOVZX430
(PMOVZXBQ, m)
1229
681
    DecodeZeroExtendMask(8, 64, getRegOperandNumElts(MI, 64, 0), false,
1230
681
                         ShuffleMask);
1231
681
    DestName = getRegName(MI->getOperand(0).getReg());
1232
681
    break;
1233
7.49k
1234
16.1k
  
CASE_PMOVZX681
(PMOVZXWD, r)
1235
16.1k
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1236
16.1k
    
LLVM_FALLTHROUGH1.34k
;
1237
16.1k
  
CASE_PMOVZX1.34k
(PMOVZXWD, m)
1238
1.78k
    DecodeZeroExtendMask(16, 32, getRegOperandNumElts(MI, 32, 0), false,
1239
1.78k
                         ShuffleMask);
1240
1.78k
    DestName = getRegName(MI->getOperand(0).getReg());
1241
1.78k
    break;
1242
19.6k
1243
19.6k
  
CASE_PMOVZX1.78k
(PMOVZXWQ, r)
1244
7.50k
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1245
7.50k
    
LLVM_FALLTHROUGH625
;
1246
7.50k
  
CASE_PMOVZX625
(PMOVZXWQ, m)
1247
837
    DecodeZeroExtendMask(16, 64, getRegOperandNumElts(MI, 64, 0), false,
1248
837
                         ShuffleMask);
1249
837
    DestName = getRegName(MI->getOperand(0).getReg());
1250
837
    break;
1251
9.20k
1252
9.20k
  
CASE_PMOVZX837
(PMOVZXDQ, r)
1253
8.37k
    Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
1254
8.37k
    
LLVM_FALLTHROUGH698
;
1255
10.8k
  
CASE_PMOVZX698
(PMOVZXDQ, m)
1256
10.8k
    DecodeZeroExtendMask(32, 64, getRegOperandNumElts(MI, 64, 0), false,
1257
10.8k
                         ShuffleMask);
1258
10.8k
    DestName = getRegName(MI->getOperand(0).getReg());
1259
10.8k
    break;
1260
72.3k
  }
1261
72.3k
1262
72.3k
  // The only comments we decode are shuffles, so give up if we were unable to
1263
72.3k
  // decode a shuffle mask.
1264
72.3k
  if (ShuffleMask.empty())
1265
30
    return false;
1266
72.3k
1267
72.3k
  if (!DestName) 
DestName = Src1Name0
;
1268
72.3k
  if (DestName) {
1269
72.3k
    OS << DestName;
1270
72.3k
    printMasking(OS, MI, MCII);
1271
72.3k
  } else
1272
0
    OS << "mem";
1273
72.3k
1274
72.3k
  OS << " = ";
1275
72.3k
1276
72.3k
  // If the two sources are the same, canonicalize the input elements to be
1277
72.3k
  // from the first src so that we get larger element spans.
1278
72.3k
  if (Src1Name == Src2Name) {
1279
130k
    for (unsigned i = 0, e = ShuffleMask.size(); i != e; 
++i116k
) {
1280
116k
      if ((int)ShuffleMask[i] >= 0 && // Not sentinel.
1281
116k
          
ShuffleMask[i] >= (int)e76.2k
) // From second mask.
1282
20.6k
        ShuffleMask[i] -= e;
1283
116k
    }
1284
14.0k
  }
1285
72.3k
1286
72.3k
  // The shuffle mask specifies which elements of the src1/src2 fill in the
1287
72.3k
  // destination, with a few sentinel values.  Loop through and print them
1288
72.3k
  // out.
1289
439k
  for (unsigned i = 0, e = ShuffleMask.size(); i != e; 
++i367k
) {
1290
367k
    if (i != 0)
1291
294k
      OS << ',';
1292
367k
    if (ShuffleMask[i] == SM_SentinelZero) {
1293
125k
      OS << "zero";
1294
125k
      continue;
1295
125k
    }
1296
241k
1297
241k
    // Otherwise, it must come from src1 or src2.  Print the span of elements
1298
241k
    // that comes from this src.
1299
241k
    bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size();
1300
241k
    const char *SrcName = isSrc1 ? 
Src1Name170k
:
Src2Name71.0k
;
1301
241k
    OS << (SrcName ? 
SrcName209k
:
"mem"31.6k
) << '[';
1302
241k
    bool IsFirst = true;
1303
687k
    while (i != e && 
(int)ShuffleMask[i] != SM_SentinelZero629k
&&
1304
687k
           
(ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1563k
) {
1305
445k
      if (!IsFirst)
1306
204k
        OS << ',';
1307
241k
      else
1308
241k
        IsFirst = false;
1309
445k
      if (ShuffleMask[i] == SM_SentinelUndef)
1310
768
        OS << "u";
1311
444k
      else
1312
444k
        OS << ShuffleMask[i] % ShuffleMask.size();
1313
445k
      ++i;
1314
445k
    }
1315
241k
    OS << ']';
1316
241k
    --i; // For loop increments element #.
1317
241k
  }
1318
72.3k
  OS << '\n';
1319
72.3k
1320
72.3k
  // We successfully added a comment to this instruction.
1321
72.3k
  return true;
1322
72.3k
}