Coverage Report

Created: 2017-10-03 07:32

/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
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//===-- MSP430TargetMachine.cpp - Define TargetMachine for MSP430 ---------===//
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//
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//                     The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Top-level implementation for the MSP430 target.
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//
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//===----------------------------------------------------------------------===//
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#include "MSP430TargetMachine.h"
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#include "MSP430.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/LegacyPassManager.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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extern "C" void LLVMInitializeMSP430Target() {
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  // Register the target.
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  RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target());
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}
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static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
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  if (!RM.hasValue())
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    return Reloc::Static;
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  return *RM;
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}
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static CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM) {
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  if (CM)
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    return *CM;
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  return CodeModel::Small;
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}
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static std::string computeDataLayout(const Triple &TT, StringRef CPU,
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                                     const TargetOptions &Options) {
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  return "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16";
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}
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MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT,
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                                         StringRef CPU, StringRef FS,
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                                         const TargetOptions &Options,
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                                         Optional<Reloc::Model> RM,
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                                         Optional<CodeModel::Model> CM,
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                                         CodeGenOpt::Level OL, bool JIT)
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    : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
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                        Options, getEffectiveRelocModel(RM),
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                        getEffectiveCodeModel(CM), OL),
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      TLOF(make_unique<TargetLoweringObjectFileELF>()),
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      Subtarget(TT, CPU, FS, *this) {
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  initAsmInfo();
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}
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MSP430TargetMachine::~MSP430TargetMachine() {}
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namespace {
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/// MSP430 Code Generator Pass Configuration Options.
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class MSP430PassConfig : public TargetPassConfig {
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public:
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  MSP430PassConfig(MSP430TargetMachine &TM, PassManagerBase &PM)
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    : TargetPassConfig(TM, PM) {}
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  MSP430TargetMachine &getMSP430TargetMachine() const {
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    return getTM<MSP430TargetMachine>();
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  }
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  bool addInstSelector() override;
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  void addPreEmitPass() override;
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};
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} // namespace
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TargetPassConfig *MSP430TargetMachine::createPassConfig(PassManagerBase &PM) {
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  return new MSP430PassConfig(*this, PM);
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}
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bool MSP430PassConfig::addInstSelector() {
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  // Install an instruction selector.
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  addPass(createMSP430ISelDag(getMSP430TargetMachine(), getOptLevel()));
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  return false;
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}
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void MSP430PassConfig::addPreEmitPass() {
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  // Must run branch selection immediately preceding the asm printer.
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  addPass(createMSP430BranchSelectionPass(), false);
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}