Coverage Report

Created: 2017-08-18 19:41

/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/tools/polly/lib/Analysis/DependenceInfo.cpp
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//===- DependenceInfo.cpp - Calculate dependency information for a Scop. --===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// Calculate the data dependency relations for a Scop using ISL.
11
//
12
// The integer set library (ISL) from Sven, has a integrated dependency analysis
13
// to calculate data dependences. This pass takes advantage of this and
14
// calculate those dependences a Scop.
15
//
16
// The dependences in this pass are exact in terms that for a specific read
17
// statement instance only the last write statement instance is returned. In
18
// case of may writes a set of possible write instances is returned. This
19
// analysis will never produce redundant dependences.
20
//
21
//===----------------------------------------------------------------------===//
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//
23
#include "polly/DependenceInfo.h"
24
#include "polly/LinkAllPasses.h"
25
#include "polly/Options.h"
26
#include "polly/ScopInfo.h"
27
#include "polly/Support/GICHelper.h"
28
#include "llvm/Support/Debug.h"
29
#include <isl/aff.h>
30
#include <isl/ctx.h>
31
#include <isl/flow.h>
32
#include <isl/map.h>
33
#include <isl/options.h>
34
#include <isl/schedule.h>
35
#include <isl/set.h>
36
#include <isl/union_map.h>
37
#include <isl/union_set.h>
38
39
using namespace polly;
40
using namespace llvm;
41
42
#define DEBUG_TYPE "polly-dependence"
43
44
static cl::opt<int> OptComputeOut(
45
    "polly-dependences-computeout",
46
    cl::desc("Bound the dependence analysis by a maximal amount of "
47
             "computational steps (0 means no bound)"),
48
    cl::Hidden, cl::init(500000), cl::ZeroOrMore, cl::cat(PollyCategory));
49
50
static cl::opt<bool> LegalityCheckDisabled(
51
    "disable-polly-legality", cl::desc("Disable polly legality check"),
52
    cl::Hidden, cl::init(false), cl::ZeroOrMore, cl::cat(PollyCategory));
53
54
static cl::opt<bool>
55
    UseReductions("polly-dependences-use-reductions",
56
                  cl::desc("Exploit reductions in dependence analysis"),
57
                  cl::Hidden, cl::init(true), cl::ZeroOrMore,
58
                  cl::cat(PollyCategory));
59
60
enum AnalysisType { VALUE_BASED_ANALYSIS, MEMORY_BASED_ANALYSIS };
61
62
static cl::opt<enum AnalysisType> OptAnalysisType(
63
    "polly-dependences-analysis-type",
64
    cl::desc("The kind of dependence analysis to use"),
65
    cl::values(clEnumValN(VALUE_BASED_ANALYSIS, "value-based",
66
                          "Exact dependences without transitive dependences"),
67
               clEnumValN(MEMORY_BASED_ANALYSIS, "memory-based",
68
                          "Overapproximation of dependences")),
69
    cl::Hidden, cl::init(VALUE_BASED_ANALYSIS), cl::ZeroOrMore,
70
    cl::cat(PollyCategory));
71
72
static cl::opt<Dependences::AnalysisLevel> OptAnalysisLevel(
73
    "polly-dependences-analysis-level",
74
    cl::desc("The level of dependence analysis"),
75
    cl::values(clEnumValN(Dependences::AL_Statement, "statement-wise",
76
                          "Statement-level analysis"),
77
               clEnumValN(Dependences::AL_Reference, "reference-wise",
78
                          "Memory reference level analysis that distinguish"
79
                          " accessed references in the same statement"),
80
               clEnumValN(Dependences::AL_Access, "access-wise",
81
                          "Memory reference level analysis that distinguish"
82
                          " access instructions in the same statement")),
83
    cl::Hidden, cl::init(Dependences::AL_Statement), cl::ZeroOrMore,
84
    cl::cat(PollyCategory));
85
86
//===----------------------------------------------------------------------===//
87
88
/// Tag the @p Relation domain with @p TagId
89
static __isl_give isl_map *tag(__isl_take isl_map *Relation,
90
126
                               __isl_take isl_id *TagId) {
91
126
  isl_space *Space = isl_map_get_space(Relation);
92
126
  Space = isl_space_drop_dims(Space, isl_dim_out, 0,
93
126
                              isl_map_dim(Relation, isl_dim_out));
94
126
  Space = isl_space_set_tuple_id(Space, isl_dim_out, TagId);
95
126
  isl_multi_aff *Tag = isl_multi_aff_domain_map(Space);
96
126
  Relation = isl_map_preimage_domain_multi_aff(Relation, Tag);
97
126
  return Relation;
98
126
}
99
100
/// Tag the @p Relation domain with either MA->getArrayId() or
101
///        MA->getId() based on @p TagLevel
102
static __isl_give isl_map *tag(__isl_take isl_map *Relation, MemoryAccess *MA,
103
1.37k
                               Dependences::AnalysisLevel TagLevel) {
104
1.37k
  if (TagLevel == Dependences::AL_Reference)
105
10
    return tag(Relation, MA->getArrayId().release());
106
1.37k
107
1.36k
  
if (1.36k
TagLevel == Dependences::AL_Access1.36k
)
108
116
    return tag(Relation, MA->getId().release());
109
1.36k
110
1.36k
  // No need to tag at the statement level.
111
1.24k
  return Relation;
112
1.37k
}
113
114
/// Collect information about the SCoP @p S.
115
static void collectInfo(Scop &S, isl_union_map *&Read,
116
                        isl_union_map *&MustWrite, isl_union_map *&MayWrite,
117
                        isl_union_map *&ReductionTagMap,
118
                        isl_union_set *&TaggedStmtDomain,
119
563
                        Dependences::AnalysisLevel Level) {
120
563
  isl_space *Space = S.getParamSpace().release();
121
563
  Read = isl_union_map_empty(isl_space_copy(Space));
122
563
  MustWrite = isl_union_map_empty(isl_space_copy(Space));
123
563
  MayWrite = isl_union_map_empty(isl_space_copy(Space));
124
563
  ReductionTagMap = isl_union_map_empty(isl_space_copy(Space));
125
563
  isl_union_map *StmtSchedule = isl_union_map_empty(Space);
126
563
127
563
  SmallPtrSet<const ScopArrayInfo *, 8> ReductionArrays;
128
563
  if (UseReductions)
129
563
    for (ScopStmt &Stmt : S)
130
862
      for (MemoryAccess *MA : Stmt)
131
1.68k
        
if (1.68k
MA->isReductionLike()1.68k
)
132
326
          ReductionArrays.insert(MA->getScopArrayInfo());
133
563
134
862
  for (ScopStmt &Stmt : S) {
135
1.68k
    for (MemoryAccess *MA : Stmt) {
136
1.68k
      isl_set *domcp = Stmt.getDomain().release();
137
1.68k
      isl_map *accdom = MA->getAccessRelation().release();
138
1.68k
139
1.68k
      accdom = isl_map_intersect_domain(accdom, domcp);
140
1.68k
141
1.68k
      if (
ReductionArrays.count(MA->getScopArrayInfo())1.68k
)
{370
142
370
        // Wrap the access domain and adjust the schedule accordingly.
143
370
        //
144
370
        // An access domain like
145
370
        //   Stmt[i0, i1] -> MemAcc_A[i0 + i1]
146
370
        // will be transformed into
147
370
        //   [Stmt[i0, i1] -> MemAcc_A[i0 + i1]] -> MemAcc_A[i0 + i1]
148
370
        //
149
370
        // We collect all the access domains in the ReductionTagMap.
150
370
        // This is used in Dependences::calculateDependences to create
151
370
        // a tagged Schedule tree.
152
370
153
370
        ReductionTagMap =
154
370
            isl_union_map_add_map(ReductionTagMap, isl_map_copy(accdom));
155
370
        accdom = isl_map_range_map(accdom);
156
1.68k
      } else {
157
1.31k
        accdom = tag(accdom, MA, Level);
158
1.31k
        if (
Level > Dependences::AL_Statement1.31k
)
{63
159
63
          isl_map *StmtScheduleMap = Stmt.getSchedule().release();
160
63
          assert(StmtScheduleMap &&
161
63
                 "Schedules that contain extension nodes require special "
162
63
                 "handling.");
163
63
          isl_map *Schedule = tag(StmtScheduleMap, MA, Level);
164
63
          StmtSchedule = isl_union_map_add_map(StmtSchedule, Schedule);
165
1.31k
        }
166
1.68k
      }
167
1.68k
168
1.68k
      if (MA->isRead())
169
698
        Read = isl_union_map_add_map(Read, accdom);
170
982
      else 
if (982
MA->isMayWrite()982
)
171
29
        MayWrite = isl_union_map_add_map(MayWrite, accdom);
172
982
      else
173
953
        MustWrite = isl_union_map_add_map(MustWrite, accdom);
174
1.68k
    }
175
862
176
862
    if (
!ReductionArrays.empty() && 862
Level == Dependences::AL_Statement192
)
177
862
      StmtSchedule =
178
862
          isl_union_map_add_map(StmtSchedule, Stmt.getSchedule().release());
179
862
  }
180
563
181
563
  StmtSchedule = isl_union_map_intersect_params(
182
563
      StmtSchedule, S.getAssumedContext().release());
183
563
  TaggedStmtDomain = isl_union_map_domain(StmtSchedule);
184
563
185
563
  ReductionTagMap = isl_union_map_coalesce(ReductionTagMap);
186
563
  Read = isl_union_map_coalesce(Read);
187
563
  MustWrite = isl_union_map_coalesce(MustWrite);
188
563
  MayWrite = isl_union_map_coalesce(MayWrite);
189
563
}
190
191
/// Fix all dimension of @p Zero to 0 and add it to @p user
192
92
static isl_stat fixSetToZero(__isl_take isl_set *Zero, void *user) {
193
92
  isl_union_set **User = (isl_union_set **)user;
194
347
  for (unsigned i = 0; 
i < isl_set_dim(Zero, isl_dim_set)347
;
i++255
)
195
255
    Zero = isl_set_fix_si(Zero, isl_dim_set, i, 0);
196
92
  *User = isl_union_set_add_set(*User, Zero);
197
92
  return isl_stat_ok;
198
92
}
199
200
/// Compute the privatization dependences for a given dependency @p Map
201
///
202
/// Privatization dependences are widened original dependences which originate
203
/// or end in a reduction access. To compute them we apply the transitive close
204
/// of the reduction dependences (which maps each iteration of a reduction
205
/// statement to all following ones) on the RAW/WAR/WAW dependences. The
206
/// dependences which start or end at a reduction statement will be extended to
207
/// depend on all following reduction statement iterations as well.
208
/// Note: "Following" here means according to the reduction dependences.
209
///
210
/// For the input:
211
///
212
///  S0:   *sum = 0;
213
///        for (int i = 0; i < 1024; i++)
214
///  S1:     *sum += i;
215
///  S2:   *sum = *sum * 3;
216
///
217
/// we have the following dependences before we add privatization dependences:
218
///
219
///   RAW:
220
///     { S0[] -> S1[0]; S1[1023] -> S2[] }
221
///   WAR:
222
///     {  }
223
///   WAW:
224
///     { S0[] -> S1[0]; S1[1024] -> S2[] }
225
///   RED:
226
///     { S1[i0] -> S1[1 + i0] : i0 >= 0 and i0 <= 1022 }
227
///
228
/// and afterwards:
229
///
230
///   RAW:
231
///     { S0[] -> S1[i0] : i0 >= 0 and i0 <= 1023;
232
///       S1[i0] -> S2[] : i0 >= 0 and i0 <= 1023}
233
///   WAR:
234
///     {  }
235
///   WAW:
236
///     { S0[] -> S1[i0] : i0 >= 0 and i0 <= 1023;
237
///       S1[i0] -> S2[] : i0 >= 0 and i0 <= 1023}
238
///   RED:
239
///     { S1[i0] -> S1[1 + i0] : i0 >= 0 and i0 <= 1022 }
240
///
241
/// Note: This function also computes the (reverse) transitive closure of the
242
///       reduction dependences.
243
72
void Dependences::addPrivatizationDependences() {
244
72
  isl_union_map *PrivRAW, *PrivWAW, *PrivWAR;
245
72
246
72
  // The transitive closure might be over approximated, thus could lead to
247
72
  // dependency cycles in the privatization dependences. To make sure this
248
72
  // will not happen we remove all negative dependences after we computed
249
72
  // the transitive closure.
250
72
  TC_RED = isl_union_map_transitive_closure(isl_union_map_copy(RED), nullptr);
251
72
252
72
  // FIXME: Apply the current schedule instead of assuming the identity schedule
253
72
  //        here. The current approach is only valid as long as we compute the
254
72
  //        dependences only with the initial (identity schedule). Any other
255
72
  //        schedule could change "the direction of the backward dependences" we
256
72
  //        want to eliminate here.
257
72
  isl_union_set *UDeltas = isl_union_map_deltas(isl_union_map_copy(TC_RED));
258
72
  isl_union_set *Universe = isl_union_set_universe(isl_union_set_copy(UDeltas));
259
72
  isl_union_set *Zero = isl_union_set_empty(isl_union_set_get_space(Universe));
260
72
  isl_union_set_foreach_set(Universe, fixSetToZero, &Zero);
261
72
  isl_union_map *NonPositive = isl_union_set_lex_le_union_set(UDeltas, Zero);
262
72
263
72
  TC_RED = isl_union_map_subtract(TC_RED, NonPositive);
264
72
265
72
  TC_RED = isl_union_map_union(
266
72
      TC_RED, isl_union_map_reverse(isl_union_map_copy(TC_RED)));
267
72
  TC_RED = isl_union_map_coalesce(TC_RED);
268
72
269
72
  isl_union_map **Maps[] = {&RAW, &WAW, &WAR};
270
72
  isl_union_map **PrivMaps[] = {&PrivRAW, &PrivWAW, &PrivWAR};
271
288
  for (unsigned u = 0; 
u < 3288
;
u++216
)
{216
272
216
    isl_union_map **Map = Maps[u], **PrivMap = PrivMaps[u];
273
216
274
216
    *PrivMap = isl_union_map_apply_range(isl_union_map_copy(*Map),
275
216
                                         isl_union_map_copy(TC_RED));
276
216
    *PrivMap = isl_union_map_union(
277
216
        *PrivMap, isl_union_map_apply_range(isl_union_map_copy(TC_RED),
278
216
                                            isl_union_map_copy(*Map)));
279
216
280
216
    *Map = isl_union_map_union(*Map, *PrivMap);
281
216
  }
282
72
283
72
  isl_union_set_free(Universe);
284
72
}
285
286
static __isl_give isl_union_flow *buildFlow(__isl_keep isl_union_map *Snk,
287
                                            __isl_keep isl_union_map *Src,
288
                                            __isl_keep isl_union_map *MaySrc,
289
2.25k
                                            __isl_keep isl_schedule *Schedule) {
290
2.25k
  isl_union_access_info *AI;
291
2.25k
292
2.25k
  AI = isl_union_access_info_from_sink(isl_union_map_copy(Snk));
293
2.25k
  if (MaySrc)
294
2.25k
    AI = isl_union_access_info_set_may_source(AI, isl_union_map_copy(MaySrc));
295
2.25k
  if (Src)
296
2.22k
    AI = isl_union_access_info_set_must_source(AI, isl_union_map_copy(Src));
297
2.25k
  AI = isl_union_access_info_set_schedule(AI, isl_schedule_copy(Schedule));
298
2.25k
  auto Flow = isl_union_access_info_compute_flow(AI);
299
2.25k
  DEBUG(if (!Flow) dbgs() << "last error: "
300
2.25k
                          << isl_ctx_last_error(isl_schedule_get_ctx(Schedule))
301
2.25k
                          << '\n';);
302
2.25k
  return Flow;
303
2.25k
}
304
305
/// Compute exact WAR dependences
306
/// We need exact WAR dependences. That is, if there are
307
/// dependences of the form:
308
/// must-W2 (sink) <- must-W1 (sink) <- R (source)
309
/// We wish to generate *ONLY*:
310
/// { R -> W1 },
311
/// NOT:
312
/// { R -> W2, R -> W1 }
313
///
314
/// However, in the case of may-writes, we do *not* wish to allow
315
/// may-writes to block must-writes. This makes sense, since perhaps the
316
/// may-write will not happen. In that case, the exact dependence will
317
/// be the (read -> must-write).
318
/// Example:
319
/// must-W2 (sink) <- may-W1 (sink) <- R (source)
320
/// We wish to generate:
321
/// { R-> W1, R -> W2 }
322
///
323
/// We use the fact that may dependences are not allowed to flow
324
/// through a must source. That way, reads will be stopped by intermediate
325
/// must-writes.
326
/// However, may-sources may not interfere with one another. Hence, reads
327
/// will not block each other from generating dependences.
328
///
329
/// Write (Sink) <- MustWrite (Must-Source) <- Read (MaySource) is
330
/// present, then the dependence
331
///    { Write <- Read }
332
/// is not tracked.
333
///
334
/// We would like to specify the Must-Write as kills, source as Read
335
/// and sink as Write.
336
/// ISL does not have the functionality currently to support "kills".
337
/// Use the Must-Source as a way to specify "kills".
338
/// The drawback is that we will have both
339
///   { Write <- MustWrite, Write <- Read }
340
///
341
/// We need to filter this to track only { Write <- Read }.
342
///
343
/// Filtering { Write <- Read } from WAROverestimated:
344
/// --------------------------------------------------
345
/// isl_union_flow_get_full_may_dependence gives us dependences of the form
346
///   WAROverestimated = { Read+MustWrite -> [Write -> MemoryAccess]}
347
///
348
///  We need to intersect the domain with Read to get only
349
///  Read dependences.
350
///    Read = { Read -> MemoryAccess }
351
///
352
///
353
/// 1. Construct:
354
///   WARMemAccesses = { Read+Write -> [Read+Write -> MemoryAccess] }
355
/// This takes a Read+Write from WAROverestimated and maps it to the
356
/// corresponding wrapped memory access from WAROverestimated.
357
///
358
/// 2. Apply WARMemAcesses to the domain of WAR Overestimated to give:
359
///   WAR = { [Read+Write -> MemoryAccess] -> [Write -> MemoryAccess] }
360
///
361
/// WAR is in a state where we can intersect with Read, since they
362
/// have the same structure.
363
///
364
/// 3. Intersect this with a wrapped Read. Read is wrapped
365
/// to ensure the domains look the same.
366
///   WAR = WAR \intersect (wrapped Read)
367
///   WAR = { [Read -> MemoryAccesss] -> [Write -> MemoryAccess] }
368
///
369
///  4. Project out the memory access in the domain to get
370
///  WAR = { Read -> Write }
371
static isl_union_map *buildWAR(isl_union_map *Write, isl_union_map *MustWrite,
372
557
                               isl_union_map *Read, isl_schedule *Schedule) {
373
557
  isl_union_flow *Flow = buildFlow(Write, MustWrite, Read, Schedule);
374
557
  auto *WAROverestimated = isl_union_flow_get_full_may_dependence(Flow);
375
557
376
557
  // 1. Constructing WARMemAccesses
377
557
  // WarMemAccesses = { Read+Write -> [Write -> MemAccess] }
378
557
  // Range factor of range product
379
557
  //     { Read+Write -> MemAcesss }
380
557
  // Domain projection
381
557
  //     { [Read+Write -> MemAccess] -> Read+Write }
382
557
  // Reverse
383
557
  //     { Read+Write -> [Read+Write -> MemAccess] }
384
557
  auto WARMemAccesses = isl_union_map_copy(WAROverestimated);
385
557
  WARMemAccesses = isl_union_map_range_factor_range(WAROverestimated);
386
557
  WARMemAccesses = isl_union_map_domain_map(WARMemAccesses);
387
557
  WARMemAccesses = isl_union_map_reverse(WARMemAccesses);
388
557
389
557
  // 2. Apply to get domain tagged with memory accesses
390
557
  isl_union_map *WAR =
391
557
      isl_union_map_apply_domain(WAROverestimated, WARMemAccesses);
392
557
393
557
  // 3. Intersect with Read to extract only reads
394
557
  auto ReadWrapped = isl_union_map_wrap(isl_union_map_copy(Read));
395
557
  WAR = isl_union_map_intersect_domain(WAR, ReadWrapped);
396
557
397
557
  // 4. Project out memory accesses to get usual style dependences
398
557
  WAR = isl_union_map_range_factor_domain(WAR);
399
557
  WAR = isl_union_map_domain_factor_domain(WAR);
400
557
401
557
  isl_union_flow_free(Flow);
402
557
  return WAR;
403
557
}
404
405
563
void Dependences::calculateDependences(Scop &S) {
406
563
  isl_union_map *Read, *MustWrite, *MayWrite, *ReductionTagMap;
407
563
  isl_schedule *Schedule;
408
563
  isl_union_set *TaggedStmtDomain;
409
563
410
563
  DEBUG(dbgs() << "Scop: \n" << S << "\n");
411
563
412
563
  collectInfo(S, Read, MustWrite, MayWrite, ReductionTagMap, TaggedStmtDomain,
413
563
              Level);
414
563
415
563
  bool HasReductions = !isl_union_map_is_empty(ReductionTagMap);
416
563
417
563
  DEBUG(dbgs() << "Read: " << Read << '\n';
418
563
        dbgs() << "MustWrite: " << MustWrite << '\n';
419
563
        dbgs() << "MayWrite: " << MayWrite << '\n';
420
563
        dbgs() << "ReductionTagMap: " << ReductionTagMap << '\n';
421
563
        dbgs() << "TaggedStmtDomain: " << TaggedStmtDomain << '\n';);
422
563
423
563
  Schedule = S.getScheduleTree().release();
424
563
425
563
  if (
!HasReductions563
)
{459
426
459
    isl_union_map_free(ReductionTagMap);
427
459
    // Tag the schedule tree if we want fine-grain dependence info
428
459
    if (
Level > AL_Statement459
)
{23
429
23
      auto TaggedMap =
430
23
          isl_union_set_unwrap(isl_union_set_copy(TaggedStmtDomain));
431
23
      auto Tags = isl_union_map_domain_map_union_pw_multi_aff(TaggedMap);
432
23
      Schedule = isl_schedule_pullback_union_pw_multi_aff(Schedule, Tags);
433
459
    }
434
563
  } else {
435
104
    isl_union_map *IdentityMap;
436
104
    isl_union_pw_multi_aff *ReductionTags, *IdentityTags, *Tags;
437
104
438
104
    // Extract Reduction tags from the combined access domains in the given
439
104
    // SCoP. The result is a map that maps each tagged element in the domain to
440
104
    // the memory location it accesses. ReductionTags = {[Stmt[i] ->
441
104
    // Array[f(i)]] -> Stmt[i] }
442
104
    ReductionTags =
443
104
        isl_union_map_domain_map_union_pw_multi_aff(ReductionTagMap);
444
104
445
104
    // Compute an identity map from each statement in domain to itself.
446
104
    // IdentityTags = { [Stmt[i] -> Stmt[i] }
447
104
    IdentityMap = isl_union_set_identity(isl_union_set_copy(TaggedStmtDomain));
448
104
    IdentityTags = isl_union_pw_multi_aff_from_union_map(IdentityMap);
449
104
450
104
    Tags = isl_union_pw_multi_aff_union_add(ReductionTags, IdentityTags);
451
104
452
104
    // By pulling back Tags from Schedule, we have a schedule tree that can
453
104
    // be used to compute normal dependences, as well as 'tagged' reduction
454
104
    // dependences.
455
104
    Schedule = isl_schedule_pullback_union_pw_multi_aff(Schedule, Tags);
456
563
  }
457
563
458
563
  DEBUG(dbgs() << "Read: " << Read << "\n";
459
563
        dbgs() << "MustWrite: " << MustWrite << "\n";
460
563
        dbgs() << "MayWrite: " << MayWrite << "\n";
461
563
        dbgs() << "Schedule: " << Schedule << "\n");
462
563
463
563
  isl_union_map *StrictWAW = nullptr;
464
563
  {
465
563
    IslMaxOperationsGuard MaxOpGuard(IslCtx.get(), OptComputeOut);
466
563
467
563
    RAW = WAW = WAR = RED = nullptr;
468
563
    isl_union_map *Write = isl_union_map_union(isl_union_map_copy(MustWrite),
469
563
                                               isl_union_map_copy(MayWrite));
470
563
471
563
    // We are interested in detecting reductions that do not have intermediate
472
563
    // computations that are captured by other statements.
473
563
    //
474
563
    // Example:
475
563
    // void f(int *A, int *B) {
476
563
    //     for(int i = 0; i <= 100; i++) {
477
563
    //
478
563
    //            *-WAR (S0[i] -> S0[i + 1] 0 <= i <= 100)------------*
479
563
    //            |                                                   |
480
563
    //            *-WAW (S0[i] -> S0[i + 1] 0 <= i <= 100)------------*
481
563
    //            |                                                   |
482
563
    //            v                                                   |
483
563
    //     S0:    *A += i; >------------------*-----------------------*
484
563
    //                                        |
485
563
    //         if (i >= 98) {          WAR (S0[i] -> S1[i]) 98 <= i <= 100
486
563
    //                                        |
487
563
    //     S1:        *B = *A; <--------------*
488
563
    //         }
489
563
    //     }
490
563
    // }
491
563
    //
492
563
    // S0[0 <= i <= 100] has a reduction. However, the values in
493
563
    // S0[98 <= i <= 100] is captured in S1[98 <= i <= 100].
494
563
    // Since we allow free reordering on our reduction dependences, we need to
495
563
    // remove all instances of a reduction statement that have data dependences
496
563
    // originating from them.
497
563
    // In the case of the example, we need to remove S0[98 <= i <= 100] from
498
563
    // our reduction dependences.
499
563
    //
500
563
    // When we build up the WAW dependences that are used to detect reductions,
501
563
    // we consider only **Writes that have no intermediate Reads**.
502
563
    //
503
563
    // `isl_union_flow_get_must_dependence` gives us dependences of the form:
504
563
    // (sink <- must_source).
505
563
    //
506
563
    // It *will not give* dependences of the form:
507
563
    // 1. (sink <- ... <- may_source <- ... <- must_source)
508
563
    // 2. (sink <- ... <- must_source <- ... <- must_source)
509
563
    //
510
563
    // For a detailed reference on ISL's flow analysis, see:
511
563
    // "Presburger Formulas and Polyhedral Compilation" - Approximate Dataflow
512
563
    //  Analysis.
513
563
    //
514
563
    // Since we set "Write" as a must-source, "Read" as a may-source, and ask
515
563
    // for must dependences, we get all Writes to Writes that **do not flow
516
563
    // through a Read**.
517
563
    //
518
563
    // ScopInfo::checkForReductions makes sure that if something captures
519
563
    // the reduction variable in the same basic block, then it is rejected
520
563
    // before it is even handed here. This makes sure that there is exactly
521
563
    // one read and one write to a reduction variable in a Statement.
522
563
    // Example:
523
563
    //     void f(int *sum, int A[N], int B[N]) {
524
563
    //       for (int i = 0; i < N; i++) {
525
563
    //         *sum += A[i]; < the store and the load is not tagged as a
526
563
    //         B[i] = *sum;  < reduction-like access due to the overlap.
527
563
    //       }
528
563
    //     }
529
563
530
563
    isl_union_flow *Flow = buildFlow(Write, Write, Read, Schedule);
531
563
    StrictWAW = isl_union_flow_get_must_dependence(Flow);
532
563
    isl_union_flow_free(Flow);
533
563
534
563
    if (
OptAnalysisType == VALUE_BASED_ANALYSIS563
)
{557
535
557
      Flow = buildFlow(Read, MustWrite, MayWrite, Schedule);
536
557
      RAW = isl_union_flow_get_may_dependence(Flow);
537
557
      isl_union_flow_free(Flow);
538
557
539
557
      Flow = buildFlow(Write, MustWrite, MayWrite, Schedule);
540
557
      WAW = isl_union_flow_get_may_dependence(Flow);
541
557
      isl_union_flow_free(Flow);
542
557
543
557
      WAR = buildWAR(Write, MustWrite, Read, Schedule);
544
557
      isl_union_map_free(Write);
545
557
      isl_schedule_free(Schedule);
546
563
    } else {
547
6
      isl_union_flow *Flow;
548
6
549
6
      Flow = buildFlow(Read, nullptr, Write, Schedule);
550
6
      RAW = isl_union_flow_get_may_dependence(Flow);
551
6
      isl_union_flow_free(Flow);
552
6
553
6
      Flow = buildFlow(Write, nullptr, Read, Schedule);
554
6
      WAR = isl_union_flow_get_may_dependence(Flow);
555
6
      isl_union_flow_free(Flow);
556
6
557
6
      Flow = buildFlow(Write, nullptr, Write, Schedule);
558
6
      WAW = isl_union_flow_get_may_dependence(Flow);
559
6
      isl_union_flow_free(Flow);
560
6
561
6
      isl_union_map_free(Write);
562
6
      isl_schedule_free(Schedule);
563
563
    }
564
563
565
563
    isl_union_map_free(MustWrite);
566
563
    isl_union_map_free(MayWrite);
567
563
    isl_union_map_free(Read);
568
563
569
563
    RAW = isl_union_map_coalesce(RAW);
570
563
    WAW = isl_union_map_coalesce(WAW);
571
563
    WAR = isl_union_map_coalesce(WAR);
572
563
573
563
    // End of max_operations scope.
574
563
  }
575
563
576
563
  if (
isl_ctx_last_error(IslCtx.get()) == isl_error_quota563
)
{5
577
5
    isl_union_map_free(RAW);
578
5
    isl_union_map_free(WAW);
579
5
    isl_union_map_free(WAR);
580
5
    isl_union_map_free(StrictWAW);
581
5
    RAW = WAW = WAR = StrictWAW = nullptr;
582
5
    isl_ctx_reset_error(IslCtx.get());
583
563
  }
584
563
585
563
  // Drop out early, as the remaining computations are only needed for
586
563
  // reduction dependences or dependences that are finer than statement
587
563
  // level dependences.
588
563
  if (
!HasReductions && 563
Level == AL_Statement459
)
{436
589
436
    RED = isl_union_map_empty(isl_union_map_get_space(RAW));
590
436
    TC_RED = isl_union_map_empty(isl_union_set_get_space(TaggedStmtDomain));
591
436
    isl_union_set_free(TaggedStmtDomain);
592
436
    isl_union_map_free(StrictWAW);
593
436
    return;
594
563
  }
595
563
596
563
  isl_union_map *STMT_RAW, *STMT_WAW, *STMT_WAR;
597
127
  STMT_RAW = isl_union_map_intersect_domain(
598
127
      isl_union_map_copy(RAW), isl_union_set_copy(TaggedStmtDomain));
599
127
  STMT_WAW = isl_union_map_intersect_domain(
600
127
      isl_union_map_copy(WAW), isl_union_set_copy(TaggedStmtDomain));
601
127
  STMT_WAR =
602
127
      isl_union_map_intersect_domain(isl_union_map_copy(WAR), TaggedStmtDomain);
603
127
  DEBUG({
604
127
    dbgs() << "Wrapped Dependences:\n";
605
127
    dump();
606
127
    dbgs() << "\n";
607
127
  });
608
127
609
127
  // To handle reduction dependences we proceed as follows:
610
127
  // 1) Aggregate all possible reduction dependences, namely all self
611
127
  //    dependences on reduction like statements.
612
127
  // 2) Intersect them with the actual RAW & WAW dependences to the get the
613
127
  //    actual reduction dependences. This will ensure the load/store memory
614
127
  //    addresses were __identical__ in the two iterations of the statement.
615
127
  // 3) Relax the original RAW, WAW and WAR dependences by subtracting the
616
127
  //    actual reduction dependences. Binary reductions (sum += A[i]) cause
617
127
  //    the same, RAW, WAW and WAR dependences.
618
127
  // 4) Add the privatization dependences which are widened versions of
619
127
  //    already present dependences. They model the effect of manual
620
127
  //    privatization at the outermost possible place (namely after the last
621
127
  //    write and before the first access to a reduction location).
622
127
623
127
  // Step 1)
624
127
  RED = isl_union_map_empty(isl_union_map_get_space(RAW));
625
229
  for (ScopStmt &Stmt : S) {
626
475
    for (MemoryAccess *MA : Stmt) {
627
475
      if (!MA->isReductionLike())
628
149
        continue;
629
475
      isl_set *AccDomW = isl_map_wrap(MA->getAccessRelation().release());
630
326
      isl_map *Identity =
631
326
          isl_map_from_domain_and_range(isl_set_copy(AccDomW), AccDomW);
632
326
      RED = isl_union_map_add_map(RED, Identity);
633
326
    }
634
229
  }
635
127
636
127
  // Step 2)
637
127
  RED = isl_union_map_intersect(RED, isl_union_map_copy(RAW));
638
127
  RED = isl_union_map_intersect(RED, StrictWAW);
639
127
640
127
  if (
!isl_union_map_is_empty(RED)127
)
{72
641
72
642
72
    // Step 3)
643
72
    RAW = isl_union_map_subtract(RAW, isl_union_map_copy(RED));
644
72
    WAW = isl_union_map_subtract(WAW, isl_union_map_copy(RED));
645
72
    WAR = isl_union_map_subtract(WAR, isl_union_map_copy(RED));
646
72
647
72
    // Step 4)
648
72
    addPrivatizationDependences();
649
127
  }
650
127
651
127
  DEBUG({
652
127
    dbgs() << "Final Wrapped Dependences:\n";
653
127
    dump();
654
127
    dbgs() << "\n";
655
127
  });
656
127
657
127
  // RED_SIN is used to collect all reduction dependences again after we
658
127
  // split them according to the causing memory accesses. The current assumption
659
127
  // is that our method of splitting will not have any leftovers. In the end
660
127
  // we validate this assumption until we have more confidence in this method.
661
127
  isl_union_map *RED_SIN = isl_union_map_empty(isl_union_map_get_space(RAW));
662
127
663
127
  // For each reduction like memory access, check if there are reduction
664
127
  // dependences with the access relation of the memory access as a domain
665
127
  // (wrapped space!). If so these dependences are caused by this memory access.
666
127
  // We then move this portion of reduction dependences back to the statement ->
667
127
  // statement space and add a mapping from the memory access to these
668
127
  // dependences.
669
229
  for (ScopStmt &Stmt : S) {
670
475
    for (MemoryAccess *MA : Stmt) {
671
475
      if (!MA->isReductionLike())
672
149
        continue;
673
475
674
475
      isl_set *AccDomW = isl_map_wrap(MA->getAccessRelation().release());
675
326
      isl_union_map *AccRedDepU = isl_union_map_intersect_domain(
676
326
          isl_union_map_copy(TC_RED), isl_union_set_from_set(AccDomW));
677
326
      if (
isl_union_map_is_empty(AccRedDepU)326
)
{142
678
142
        isl_union_map_free(AccRedDepU);
679
142
        continue;
680
326
      }
681
326
682
326
      isl_map *AccRedDep = isl_map_from_union_map(AccRedDepU);
683
184
      RED_SIN = isl_union_map_add_map(RED_SIN, isl_map_copy(AccRedDep));
684
184
      AccRedDep = isl_map_zip(AccRedDep);
685
184
      AccRedDep = isl_set_unwrap(isl_map_domain(AccRedDep));
686
184
      setReductionDependences(MA, AccRedDep);
687
229
    }
688
229
  }
689
127
690
127
  assert(isl_union_map_is_equal(RED_SIN, TC_RED) &&
691
127
         "Intersecting the reduction dependence domain with the wrapped access "
692
127
         "relation is not enough, we need to loosen the access relation also");
693
127
  isl_union_map_free(RED_SIN);
694
127
695
127
  RAW = isl_union_map_zip(RAW);
696
127
  WAW = isl_union_map_zip(WAW);
697
127
  WAR = isl_union_map_zip(WAR);
698
127
  RED = isl_union_map_zip(RED);
699
127
  TC_RED = isl_union_map_zip(TC_RED);
700
127
701
127
  DEBUG({
702
127
    dbgs() << "Zipped Dependences:\n";
703
127
    dump();
704
127
    dbgs() << "\n";
705
127
  });
706
127
707
127
  RAW = isl_union_set_unwrap(isl_union_map_domain(RAW));
708
127
  WAW = isl_union_set_unwrap(isl_union_map_domain(WAW));
709
127
  WAR = isl_union_set_unwrap(isl_union_map_domain(WAR));
710
127
  RED = isl_union_set_unwrap(isl_union_map_domain(RED));
711
127
  TC_RED = isl_union_set_unwrap(isl_union_map_domain(TC_RED));
712
127
713
127
  DEBUG({
714
127
    dbgs() << "Unwrapped Dependences:\n";
715
127
    dump();
716
127
    dbgs() << "\n";
717
127
  });
718
127
719
127
  RAW = isl_union_map_union(RAW, STMT_RAW);
720
127
  WAW = isl_union_map_union(WAW, STMT_WAW);
721
127
  WAR = isl_union_map_union(WAR, STMT_WAR);
722
127
723
127
  RAW = isl_union_map_coalesce(RAW);
724
127
  WAW = isl_union_map_coalesce(WAW);
725
127
  WAR = isl_union_map_coalesce(WAR);
726
127
  RED = isl_union_map_coalesce(RED);
727
127
  TC_RED = isl_union_map_coalesce(TC_RED);
728
127
729
127
  DEBUG(dump());
730
563
}
731
732
bool Dependences::isValidSchedule(Scop &S,
733
81
                                  StatementToIslMapTy *NewSchedule) const {
734
81
  if (LegalityCheckDisabled)
735
0
    return true;
736
81
737
81
  isl_union_map *Dependences = getDependences(TYPE_RAW | TYPE_WAW | TYPE_WAR);
738
81
  isl_space *Space = S.getParamSpace().release();
739
81
  isl_union_map *Schedule = isl_union_map_empty(Space);
740
81
741
81
  isl_space *ScheduleSpace = nullptr;
742
81
743
120
  for (ScopStmt &Stmt : S) {
744
120
    isl_map *StmtScat;
745
120
746
120
    if (NewSchedule->find(&Stmt) == NewSchedule->end())
747
0
      StmtScat = Stmt.getSchedule().release();
748
120
    else
749
120
      StmtScat = isl_map_copy((*NewSchedule)[&Stmt]);
750
120
    assert(StmtScat &&
751
120
           "Schedules that contain extension nodes require special handling.");
752
120
753
120
    if (!ScheduleSpace)
754
81
      ScheduleSpace = isl_space_range(isl_map_get_space(StmtScat));
755
120
756
120
    Schedule = isl_union_map_add_map(Schedule, StmtScat);
757
120
  }
758
81
759
81
  Dependences =
760
81
      isl_union_map_apply_domain(Dependences, isl_union_map_copy(Schedule));
761
81
  Dependences = isl_union_map_apply_range(Dependences, Schedule);
762
81
763
81
  isl_set *Zero = isl_set_universe(isl_space_copy(ScheduleSpace));
764
291
  for (unsigned i = 0; 
i < isl_set_dim(Zero, isl_dim_set)291
;
i++210
)
765
210
    Zero = isl_set_fix_si(Zero, isl_dim_set, i, 0);
766
81
767
81
  isl_union_set *UDeltas = isl_union_map_deltas(Dependences);
768
81
  isl_set *Deltas = isl_union_set_extract_set(UDeltas, ScheduleSpace);
769
81
  isl_union_set_free(UDeltas);
770
81
771
81
  isl_map *NonPositive = isl_set_lex_le_set(Deltas, Zero);
772
81
  bool IsValid = isl_map_is_empty(NonPositive);
773
81
  isl_map_free(NonPositive);
774
81
775
81
  return IsValid;
776
81
}
777
778
// Check if the current scheduling dimension is parallel.
779
//
780
// We check for parallelism by verifying that the loop does not carry any
781
// dependences.
782
//
783
// Parallelism test: if the distance is zero in all outer dimensions, then it
784
// has to be zero in the current dimension as well.
785
//
786
// Implementation: first, translate dependences into time space, then force
787
// outer dimensions to be equal. If the distance is zero in the current
788
// dimension, then the loop is parallel. The distance is zero in the current
789
// dimension if it is a subset of a map with equal values for the current
790
// dimension.
791
bool Dependences::isParallel(isl_union_map *Schedule, isl_union_map *Deps,
792
385
                             isl_pw_aff **MinDistancePtr) const {
793
385
  isl_set *Deltas, *Distance;
794
385
  isl_map *ScheduleDeps;
795
385
  unsigned Dimension;
796
385
  bool IsParallel;
797
385
798
385
  Deps = isl_union_map_apply_range(Deps, isl_union_map_copy(Schedule));
799
385
  Deps = isl_union_map_apply_domain(Deps, isl_union_map_copy(Schedule));
800
385
801
385
  if (
isl_union_map_is_empty(Deps)385
)
{227
802
227
    isl_union_map_free(Deps);
803
227
    return true;
804
385
  }
805
385
806
385
  ScheduleDeps = isl_map_from_union_map(Deps);
807
158
  Dimension = isl_map_dim(ScheduleDeps, isl_dim_out) - 1;
808
158
809
254
  for (unsigned i = 0; 
i < Dimension254
;
i++96
)
810
96
    ScheduleDeps = isl_map_equate(ScheduleDeps, isl_dim_out, i, isl_dim_in, i);
811
158
812
158
  Deltas = isl_map_deltas(ScheduleDeps);
813
158
  Distance = isl_set_universe(isl_set_get_space(Deltas));
814
158
815
158
  // [0, ..., 0, +] - All zeros and last dimension larger than zero
816
254
  for (unsigned i = 0; 
i < Dimension254
;
i++96
)
817
96
    Distance = isl_set_fix_si(Distance, isl_dim_set, i, 0);
818
158
819
158
  Distance = isl_set_lower_bound_si(Distance, isl_dim_set, Dimension, 1);
820
158
  Distance = isl_set_intersect(Distance, Deltas);
821
158
822
158
  IsParallel = isl_set_is_empty(Distance);
823
158
  if (
IsParallel || 158
!MinDistancePtr122
)
{128
824
128
    isl_set_free(Distance);
825
128
    return IsParallel;
826
158
  }
827
158
828
158
  Distance = isl_set_project_out(Distance, isl_dim_set, 0, Dimension);
829
30
  Distance = isl_set_coalesce(Distance);
830
30
831
30
  // This last step will compute a expression for the minimal value in the
832
30
  // distance polyhedron Distance with regards to the first (outer most)
833
30
  // dimension.
834
30
  *MinDistancePtr = isl_pw_aff_coalesce(isl_set_dim_min(Distance, 0));
835
30
836
158
  return false;
837
385
}
838
839
265
static void printDependencyMap(raw_ostream &OS, __isl_keep isl_union_map *DM) {
840
265
  if (DM)
841
244
    OS << DM << "\n";
842
265
  else
843
21
    OS << "n/a\n";
844
265
}
845
846
53
void Dependences::print(raw_ostream &OS) const {
847
53
  OS << "\tRAW dependences:\n\t\t";
848
53
  printDependencyMap(OS, RAW);
849
53
  OS << "\tWAR dependences:\n\t\t";
850
53
  printDependencyMap(OS, WAR);
851
53
  OS << "\tWAW dependences:\n\t\t";
852
53
  printDependencyMap(OS, WAW);
853
53
  OS << "\tReduction dependences:\n\t\t";
854
53
  printDependencyMap(OS, RED);
855
53
  OS << "\tTransitive closure of reduction dependences:\n\t\t";
856
53
  printDependencyMap(OS, TC_RED);
857
53
}
858
859
0
void Dependences::dump() const { print(dbgs()); }
860
861
541
void Dependences::releaseMemory() {
862
541
  isl_union_map_free(RAW);
863
541
  isl_union_map_free(WAR);
864
541
  isl_union_map_free(WAW);
865
541
  isl_union_map_free(RED);
866
541
  isl_union_map_free(TC_RED);
867
541
868
541
  RED = RAW = WAR = WAW = TC_RED = nullptr;
869
541
870
541
  for (auto &ReductionDeps : ReductionDependences)
871
152
    isl_map_free(ReductionDeps.second);
872
541
  ReductionDependences.clear();
873
541
}
874
875
528
__isl_give isl_union_map *Dependences::getDependences(int Kinds) const {
876
528
  assert(hasValidDependences() && "No valid dependences available");
877
528
  isl_space *Space = isl_union_map_get_space(RAW);
878
528
  isl_union_map *Deps = isl_union_map_empty(Space);
879
528
880
528
  if (Kinds & TYPE_RAW)
881
379
    Deps = isl_union_map_union(Deps, isl_union_map_copy(RAW));
882
528
883
528
  if (Kinds & TYPE_WAR)
884
353
    Deps = isl_union_map_union(Deps, isl_union_map_copy(WAR));
885
528
886
528
  if (Kinds & TYPE_WAW)
887
353
    Deps = isl_union_map_union(Deps, isl_union_map_copy(WAW));
888
528
889
528
  if (Kinds & TYPE_RED)
890
54
    Deps = isl_union_map_union(Deps, isl_union_map_copy(RED));
891
528
892
528
  if (Kinds & TYPE_TC_RED)
893
135
    Deps = isl_union_map_union(Deps, isl_union_map_copy(TC_RED));
894
528
895
528
  Deps = isl_union_map_coalesce(Deps);
896
528
  Deps = isl_union_map_detect_equalities(Deps);
897
528
  return Deps;
898
528
}
899
900
245
bool Dependences::hasValidDependences() const {
901
245
  return (RAW != nullptr) && 
(WAR != nullptr)242
&&
(WAW != nullptr)242
;
902
245
}
903
904
__isl_give isl_map *
905
0
Dependences::getReductionDependences(MemoryAccess *MA) const {
906
0
  return isl_map_copy(ReductionDependences.lookup(MA));
907
0
}
908
909
184
void Dependences::setReductionDependences(MemoryAccess *MA, isl_map *D) {
910
184
  assert(ReductionDependences.count(MA) == 0 &&
911
184
         "Reduction dependences set twice!");
912
184
  ReductionDependences[MA] = D;
913
184
}
914
915
const Dependences &
916
0
DependenceAnalysis::Result::getDependences(Dependences::AnalysisLevel Level) {
917
0
  if (Dependences *d = D[Level].get())
918
0
    return *d;
919
0
920
0
  return recomputeDependences(Level);
921
0
}
922
923
const Dependences &DependenceAnalysis::Result::recomputeDependences(
924
0
    Dependences::AnalysisLevel Level) {
925
0
  D[Level].reset(new Dependences(S.getSharedIslCtx(), Level));
926
0
  D[Level]->calculateDependences(S);
927
0
  return *D[Level];
928
0
}
929
930
DependenceAnalysis::Result
931
DependenceAnalysis::run(Scop &S, ScopAnalysisManager &SAM,
932
0
                        ScopStandardAnalysisResults &SAR) {
933
0
  return {S, {}};
934
0
}
935
936
AnalysisKey DependenceAnalysis::Key;
937
938
PreservedAnalyses
939
DependenceInfoPrinterPass::run(Scop &S, ScopAnalysisManager &SAM,
940
                               ScopStandardAnalysisResults &SAR,
941
0
                               SPMUpdater &U) {
942
0
  auto &DI = SAM.getResult<DependenceAnalysis>(S, SAR);
943
0
944
0
  if (auto 
d0
= DI.D[OptAnalysisLevel].get())
{0
945
0
    d->print(OS);
946
0
    return PreservedAnalyses::all();
947
0
  }
948
0
949
0
  // Otherwise create the dependences on-the-fly and print them
950
0
  Dependences D(S.getSharedIslCtx(), OptAnalysisLevel);
951
0
  D.calculateDependences(S);
952
0
  D.print(OS);
953
0
954
0
  return PreservedAnalyses::all();
955
0
}
956
957
const Dependences &
958
572
DependenceInfo::getDependences(Dependences::AnalysisLevel Level) {
959
572
  if (Dependences *d = D[Level].get())
960
86
    return *d;
961
572
962
486
  return recomputeDependences(Level);
963
572
}
964
965
const Dependences &
966
491
DependenceInfo::recomputeDependences(Dependences::AnalysisLevel Level) {
967
491
  D[Level].reset(new Dependences(S->getSharedIslCtx(), Level));
968
491
  D[Level]->calculateDependences(*S);
969
491
  return *D[Level];
970
491
}
971
972
533
bool DependenceInfo::runOnScop(Scop &ScopVar) {
973
533
  S = &ScopVar;
974
533
  return false;
975
533
}
976
977
/// Print the dependences for the given SCoP to @p OS.
978
979
47
void polly::DependenceInfo::printScop(raw_ostream &OS, Scop &S) const {
980
47
  if (auto 
d47
= D[OptAnalysisLevel].get())
{0
981
0
    d->print(OS);
982
0
    return;
983
47
  }
984
47
985
47
  // Otherwise create the dependences on-the-fly and print it
986
47
  Dependences D(S.getSharedIslCtx(), OptAnalysisLevel);
987
47
  D.calculateDependences(S);
988
47
  D.print(OS);
989
47
}
990
991
546
void DependenceInfo::getAnalysisUsage(AnalysisUsage &AU) const {
992
546
  AU.addRequiredTransitive<ScopInfoRegionPass>();
993
546
  AU.setPreservesAll();
994
546
}
995
996
char DependenceInfo::ID = 0;
997
998
0
Pass *polly::createDependenceInfoPass() { return new DependenceInfo(); }
999
1000
41.9k
INITIALIZE_PASS_BEGIN41.9k
(DependenceInfo, "polly-dependences",41.9k
1001
41.9k
                      "Polly - Calculate dependences", false, false);
1002
41.9k
INITIALIZE_PASS_DEPENDENCY(ScopInfoRegionPass);
1003
41.9k
INITIALIZE_PASS_END(DependenceInfo, "polly-dependences",
1004
                    "Polly - Calculate dependences", false, false)
1005
1006
//===----------------------------------------------------------------------===//
1007
const Dependences &
1008
DependenceInfoWrapperPass::getDependences(Scop *S,
1009
33
                                          Dependences::AnalysisLevel Level) {
1010
33
  auto It = ScopToDepsMap.find(S);
1011
33
  if (It != ScopToDepsMap.end())
1012
33
    
if (33
It->second33
)
{33
1013
33
      if (It->second->getDependenceLevel() == Level)
1014
33
        return *It->second.get();
1015
33
    }
1016
0
  return recomputeDependences(S, Level);
1017
33
}
1018
1019
const Dependences &DependenceInfoWrapperPass::recomputeDependences(
1020
25
    Scop *S, Dependences::AnalysisLevel Level) {
1021
25
  std::unique_ptr<Dependences> D(new Dependences(S->getSharedIslCtx(), Level));
1022
25
  D->calculateDependences(*S);
1023
25
  auto Inserted = ScopToDepsMap.insert(std::make_pair(S, std::move(D)));
1024
25
  return *Inserted.first->second;
1025
25
}
1026
1027
26
bool DependenceInfoWrapperPass::runOnFunction(Function &F) {
1028
26
  auto &SI = *getAnalysis<ScopInfoWrapperPass>().getSI();
1029
26
  for (auto &It : SI) {
1030
25
    assert(It.second && "Invalid SCoP object!");
1031
25
    recomputeDependences(It.second.get(), Dependences::AL_Access);
1032
26
  }
1033
26
  return false;
1034
26
}
1035
1036
7
void DependenceInfoWrapperPass::print(raw_ostream &OS, const Module *M) const {
1037
7
  for (auto &It : ScopToDepsMap) {
1038
6
    assert((It.first && It.second) && "Invalid Scop or Dependence object!\n");
1039
6
    It.second->print(OS);
1040
7
  }
1041
7
}
1042
1043
26
void DependenceInfoWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
1044
26
  AU.addRequiredTransitive<ScopInfoWrapperPass>();
1045
26
  AU.setPreservesAll();
1046
26
}
1047
1048
char DependenceInfoWrapperPass::ID = 0;
1049
1050
0
Pass *polly::createDependenceInfoWrapperPassPass() {
1051
0
  return new DependenceInfoWrapperPass();
1052
0
}
1053
1054
41.9k
INITIALIZE_PASS_BEGIN41.9k
(41.9k
1055
41.9k
    DependenceInfoWrapperPass, "polly-function-dependences",
1056
41.9k
    "Polly - Calculate dependences for all the SCoPs of a function", false,
1057
41.9k
    false)
1058
41.9k
INITIALIZE_PASS_DEPENDENCY(ScopInfoWrapperPass);
1059
41.9k
INITIALIZE_PASS_END(
1060
    DependenceInfoWrapperPass, "polly-function-dependences",
1061
    "Polly - Calculate dependences for all the SCoPs of a function", false,
1062
    false)