Coverage Report

Created: 2017-06-28 17:40

/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/tools/polly/lib/Analysis/DependenceInfo.cpp
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Source (jump to first uncovered line)
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//===- DependenceInfo.cpp - Calculate dependency information for a Scop. --===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// Calculate the data dependency relations for a Scop using ISL.
11
//
12
// The integer set library (ISL) from Sven, has a integrated dependency analysis
13
// to calculate data dependences. This pass takes advantage of this and
14
// calculate those dependences a Scop.
15
//
16
// The dependences in this pass are exact in terms that for a specific read
17
// statement instance only the last write statement instance is returned. In
18
// case of may writes a set of possible write instances is returned. This
19
// analysis will never produce redundant dependences.
20
//
21
//===----------------------------------------------------------------------===//
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//
23
#include "polly/DependenceInfo.h"
24
#include "polly/LinkAllPasses.h"
25
#include "polly/Options.h"
26
#include "polly/ScopInfo.h"
27
#include "polly/Support/GICHelper.h"
28
#include "llvm/Support/Debug.h"
29
#include <isl/aff.h>
30
#include <isl/ctx.h>
31
#include <isl/flow.h>
32
#include <isl/map.h>
33
#include <isl/options.h>
34
#include <isl/schedule.h>
35
#include <isl/set.h>
36
#include <isl/union_map.h>
37
#include <isl/union_set.h>
38
39
using namespace polly;
40
using namespace llvm;
41
42
#define DEBUG_TYPE "polly-dependence"
43
44
static cl::opt<int> OptComputeOut(
45
    "polly-dependences-computeout",
46
    cl::desc("Bound the dependence analysis by a maximal amount of "
47
             "computational steps (0 means no bound)"),
48
    cl::Hidden, cl::init(500000), cl::ZeroOrMore, cl::cat(PollyCategory));
49
50
static cl::opt<bool> LegalityCheckDisabled(
51
    "disable-polly-legality", cl::desc("Disable polly legality check"),
52
    cl::Hidden, cl::init(false), cl::ZeroOrMore, cl::cat(PollyCategory));
53
54
static cl::opt<bool>
55
    UseReductions("polly-dependences-use-reductions",
56
                  cl::desc("Exploit reductions in dependence analysis"),
57
                  cl::Hidden, cl::init(true), cl::ZeroOrMore,
58
                  cl::cat(PollyCategory));
59
60
enum AnalysisType { VALUE_BASED_ANALYSIS, MEMORY_BASED_ANALYSIS };
61
62
static cl::opt<enum AnalysisType> OptAnalysisType(
63
    "polly-dependences-analysis-type",
64
    cl::desc("The kind of dependence analysis to use"),
65
    cl::values(clEnumValN(VALUE_BASED_ANALYSIS, "value-based",
66
                          "Exact dependences without transitive dependences"),
67
               clEnumValN(MEMORY_BASED_ANALYSIS, "memory-based",
68
                          "Overapproximation of dependences")),
69
    cl::Hidden, cl::init(VALUE_BASED_ANALYSIS), cl::ZeroOrMore,
70
    cl::cat(PollyCategory));
71
72
static cl::opt<Dependences::AnalysisLevel> OptAnalysisLevel(
73
    "polly-dependences-analysis-level",
74
    cl::desc("The level of dependence analysis"),
75
    cl::values(clEnumValN(Dependences::AL_Statement, "statement-wise",
76
                          "Statement-level analysis"),
77
               clEnumValN(Dependences::AL_Reference, "reference-wise",
78
                          "Memory reference level analysis that distinguish"
79
                          " accessed references in the same statement"),
80
               clEnumValN(Dependences::AL_Access, "access-wise",
81
                          "Memory reference level analysis that distinguish"
82
                          " access instructions in the same statement")),
83
    cl::Hidden, cl::init(Dependences::AL_Statement), cl::ZeroOrMore,
84
    cl::cat(PollyCategory));
85
86
//===----------------------------------------------------------------------===//
87
88
/// Tag the @p Relation domain with @p TagId
89
static __isl_give isl_map *tag(__isl_take isl_map *Relation,
90
126
                               __isl_take isl_id *TagId) {
91
126
  isl_space *Space = isl_map_get_space(Relation);
92
126
  Space = isl_space_drop_dims(Space, isl_dim_out, 0,
93
126
                              isl_map_dim(Relation, isl_dim_out));
94
126
  Space = isl_space_set_tuple_id(Space, isl_dim_out, TagId);
95
126
  isl_multi_aff *Tag = isl_multi_aff_domain_map(Space);
96
126
  Relation = isl_map_preimage_domain_multi_aff(Relation, Tag);
97
126
  return Relation;
98
126
}
99
100
/// Tag the @p Relation domain with either MA->getArrayId() or
101
///        MA->getId() based on @p TagLevel
102
static __isl_give isl_map *tag(__isl_take isl_map *Relation, MemoryAccess *MA,
103
1.27k
                               Dependences::AnalysisLevel TagLevel) {
104
1.27k
  if (TagLevel == Dependences::AL_Reference)
105
10
    return tag(Relation, MA->getArrayId());
106
1.27k
107
1.26k
  
if (1.26k
TagLevel == Dependences::AL_Access1.26k
)
108
116
    return tag(Relation, MA->getId());
109
1.26k
110
1.26k
  // No need to tag at the statement level.
111
1.15k
  return Relation;
112
1.26k
}
113
114
/// Collect information about the SCoP @p S.
115
static void collectInfo(Scop &S, isl_union_map *&Read,
116
                        isl_union_map *&MustWrite, isl_union_map *&MayWrite,
117
                        isl_union_map *&ReductionTagMap,
118
                        isl_union_set *&TaggedStmtDomain,
119
540
                        Dependences::AnalysisLevel Level) {
120
540
  isl_space *Space = S.getParamSpace();
121
540
  Read = isl_union_map_empty(isl_space_copy(Space));
122
540
  MustWrite = isl_union_map_empty(isl_space_copy(Space));
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540
  MayWrite = isl_union_map_empty(isl_space_copy(Space));
124
540
  ReductionTagMap = isl_union_map_empty(isl_space_copy(Space));
125
540
  isl_union_map *StmtSchedule = isl_union_map_empty(Space);
126
540
127
540
  SmallPtrSet<const ScopArrayInfo *, 8> ReductionArrays;
128
540
  if (UseReductions)
129
540
    for (ScopStmt &Stmt : S)
130
824
      for (MemoryAccess *MA : Stmt)
131
1.58k
        
if (1.58k
MA->isReductionLike()1.58k
)
132
324
          ReductionArrays.insert(MA->getScopArrayInfo());
133
540
134
824
  for (ScopStmt &Stmt : S) {
135
1.58k
    for (MemoryAccess *MA : Stmt) {
136
1.58k
      isl_set *domcp = Stmt.getDomain();
137
1.58k
      isl_map *accdom = MA->getAccessRelation();
138
1.58k
139
1.58k
      accdom = isl_map_intersect_domain(accdom, domcp);
140
1.58k
141
1.58k
      if (
ReductionArrays.count(MA->getScopArrayInfo())1.58k
)
{368
142
368
        // Wrap the access domain and adjust the schedule accordingly.
143
368
        //
144
368
        // An access domain like
145
368
        //   Stmt[i0, i1] -> MemAcc_A[i0 + i1]
146
368
        // will be transformed into
147
368
        //   [Stmt[i0, i1] -> MemAcc_A[i0 + i1]] -> MemAcc_A[i0 + i1]
148
368
        //
149
368
        // We collect all the access domains in the ReductionTagMap.
150
368
        // This is used in Dependences::calculateDependences to create
151
368
        // a tagged Schedule tree.
152
368
153
368
        ReductionTagMap =
154
368
            isl_union_map_add_map(ReductionTagMap, isl_map_copy(accdom));
155
368
        accdom = isl_map_range_map(accdom);
156
1.21k
      } else {
157
1.21k
        accdom = tag(accdom, MA, Level);
158
1.21k
        if (
Level > Dependences::AL_Statement1.21k
)
{63
159
63
          auto *StmtScheduleMap = Stmt.getSchedule();
160
63
          assert(StmtScheduleMap &&
161
63
                 "Schedules that contain extension nodes require special "
162
63
                 "handling.");
163
63
          isl_map *Schedule = tag(StmtScheduleMap, MA, Level);
164
63
          StmtSchedule = isl_union_map_add_map(StmtSchedule, Schedule);
165
63
        }
166
1.21k
      }
167
1.58k
168
1.58k
      if (MA->isRead())
169
656
        Read = isl_union_map_add_map(Read, accdom);
170
925
      else 
if (925
MA->isMayWrite()925
)
171
27
        MayWrite = isl_union_map_add_map(MayWrite, accdom);
172
925
      else
173
898
        MustWrite = isl_union_map_add_map(MustWrite, accdom);
174
1.58k
    }
175
824
176
824
    if (
!ReductionArrays.empty() && 824
Level == Dependences::AL_Statement191
)
177
175
      StmtSchedule = isl_union_map_add_map(StmtSchedule, Stmt.getSchedule());
178
824
  }
179
540
180
540
  StmtSchedule =
181
540
      isl_union_map_intersect_params(StmtSchedule, S.getAssumedContext());
182
540
  TaggedStmtDomain = isl_union_map_domain(StmtSchedule);
183
540
184
540
  ReductionTagMap = isl_union_map_coalesce(ReductionTagMap);
185
540
  Read = isl_union_map_coalesce(Read);
186
540
  MustWrite = isl_union_map_coalesce(MustWrite);
187
540
  MayWrite = isl_union_map_coalesce(MayWrite);
188
540
}
189
190
/// Fix all dimension of @p Zero to 0 and add it to @p user
191
91
static isl_stat fixSetToZero(__isl_take isl_set *Zero, void *user) {
192
91
  isl_union_set **User = (isl_union_set **)user;
193
341
  for (unsigned i = 0; 
i < isl_set_dim(Zero, isl_dim_set)341
;
i++250
)
194
250
    Zero = isl_set_fix_si(Zero, isl_dim_set, i, 0);
195
91
  *User = isl_union_set_add_set(*User, Zero);
196
91
  return isl_stat_ok;
197
91
}
198
199
/// Compute the privatization dependences for a given dependency @p Map
200
///
201
/// Privatization dependences are widened original dependences which originate
202
/// or end in a reduction access. To compute them we apply the transitive close
203
/// of the reduction dependences (which maps each iteration of a reduction
204
/// statement to all following ones) on the RAW/WAR/WAW dependences. The
205
/// dependences which start or end at a reduction statement will be extended to
206
/// depend on all following reduction statement iterations as well.
207
/// Note: "Following" here means according to the reduction dependences.
208
///
209
/// For the input:
210
///
211
///  S0:   *sum = 0;
212
///        for (int i = 0; i < 1024; i++)
213
///  S1:     *sum += i;
214
///  S2:   *sum = *sum * 3;
215
///
216
/// we have the following dependences before we add privatization dependences:
217
///
218
///   RAW:
219
///     { S0[] -> S1[0]; S1[1023] -> S2[] }
220
///   WAR:
221
///     {  }
222
///   WAW:
223
///     { S0[] -> S1[0]; S1[1024] -> S2[] }
224
///   RED:
225
///     { S1[i0] -> S1[1 + i0] : i0 >= 0 and i0 <= 1022 }
226
///
227
/// and afterwards:
228
///
229
///   RAW:
230
///     { S0[] -> S1[i0] : i0 >= 0 and i0 <= 1023;
231
///       S1[i0] -> S2[] : i0 >= 0 and i0 <= 1023}
232
///   WAR:
233
///     {  }
234
///   WAW:
235
///     { S0[] -> S1[i0] : i0 >= 0 and i0 <= 1023;
236
///       S1[i0] -> S2[] : i0 >= 0 and i0 <= 1023}
237
///   RED:
238
///     { S1[i0] -> S1[1 + i0] : i0 >= 0 and i0 <= 1022 }
239
///
240
/// Note: This function also computes the (reverse) transitive closure of the
241
///       reduction dependences.
242
71
void Dependences::addPrivatizationDependences() {
243
71
  isl_union_map *PrivRAW, *PrivWAW, *PrivWAR;
244
71
245
71
  // The transitive closure might be over approximated, thus could lead to
246
71
  // dependency cycles in the privatization dependences. To make sure this
247
71
  // will not happen we remove all negative dependences after we computed
248
71
  // the transitive closure.
249
71
  TC_RED = isl_union_map_transitive_closure(isl_union_map_copy(RED), nullptr);
250
71
251
71
  // FIXME: Apply the current schedule instead of assuming the identity schedule
252
71
  //        here. The current approach is only valid as long as we compute the
253
71
  //        dependences only with the initial (identity schedule). Any other
254
71
  //        schedule could change "the direction of the backward dependences" we
255
71
  //        want to eliminate here.
256
71
  isl_union_set *UDeltas = isl_union_map_deltas(isl_union_map_copy(TC_RED));
257
71
  isl_union_set *Universe = isl_union_set_universe(isl_union_set_copy(UDeltas));
258
71
  isl_union_set *Zero = isl_union_set_empty(isl_union_set_get_space(Universe));
259
71
  isl_union_set_foreach_set(Universe, fixSetToZero, &Zero);
260
71
  isl_union_map *NonPositive = isl_union_set_lex_le_union_set(UDeltas, Zero);
261
71
262
71
  TC_RED = isl_union_map_subtract(TC_RED, NonPositive);
263
71
264
71
  TC_RED = isl_union_map_union(
265
71
      TC_RED, isl_union_map_reverse(isl_union_map_copy(TC_RED)));
266
71
  TC_RED = isl_union_map_coalesce(TC_RED);
267
71
268
71
  isl_union_map **Maps[] = {&RAW, &WAW, &WAR};
269
71
  isl_union_map **PrivMaps[] = {&PrivRAW, &PrivWAW, &PrivWAR};
270
284
  for (unsigned u = 0; 
u < 3284
;
u++213
)
{213
271
213
    isl_union_map **Map = Maps[u], **PrivMap = PrivMaps[u];
272
213
273
213
    *PrivMap = isl_union_map_apply_range(isl_union_map_copy(*Map),
274
213
                                         isl_union_map_copy(TC_RED));
275
213
    *PrivMap = isl_union_map_union(
276
213
        *PrivMap, isl_union_map_apply_range(isl_union_map_copy(TC_RED),
277
213
                                            isl_union_map_copy(*Map)));
278
213
279
213
    *Map = isl_union_map_union(*Map, *PrivMap);
280
213
  }
281
71
282
71
  isl_union_set_free(Universe);
283
71
}
284
285
static __isl_give isl_union_flow *buildFlow(__isl_keep isl_union_map *Snk,
286
                                            __isl_keep isl_union_map *Src,
287
                                            __isl_keep isl_union_map *MaySrc,
288
2.16k
                                            __isl_keep isl_schedule *Schedule) {
289
2.16k
  isl_union_access_info *AI;
290
2.16k
291
2.16k
  AI = isl_union_access_info_from_sink(isl_union_map_copy(Snk));
292
2.16k
  if (MaySrc)
293
2.16k
    AI = isl_union_access_info_set_may_source(AI, isl_union_map_copy(MaySrc));
294
2.16k
  if (Src)
295
2.13k
    AI = isl_union_access_info_set_must_source(AI, isl_union_map_copy(Src));
296
2.16k
  AI = isl_union_access_info_set_schedule(AI, isl_schedule_copy(Schedule));
297
2.16k
  auto Flow = isl_union_access_info_compute_flow(AI);
298
2.16k
  DEBUG(if (!Flow) dbgs() << "last error: "
299
2.16k
                          << isl_ctx_last_error(isl_schedule_get_ctx(Schedule))
300
2.16k
                          << '\n';);
301
2.16k
  return Flow;
302
2.16k
}
303
304
/// Compute exact WAR dependences
305
/// We need exact WAR dependences. That is, if there are
306
/// dependences of the form:
307
/// must-W2 (sink) <- must-W1 (sink) <- R (source)
308
/// We wish to generate *ONLY*:
309
/// { R -> W1 },
310
/// NOT:
311
/// { R -> W2, R -> W1 }
312
///
313
/// However, in the case of may-writes, we do *not* wish to allow
314
/// may-writes to block must-writes. This makes sense, since perhaps the
315
/// may-write will not happen. In that case, the exact dependence will
316
/// be the (read -> must-write).
317
/// Example:
318
/// must-W2 (sink) <- may-W1 (sink) <- R (source)
319
/// We wish to generate:
320
/// { R-> W1, R -> W2 }
321
///
322
/// We use the fact that may dependences are not allowed to flow
323
/// through a must source. That way, reads will be stopped by intermediate
324
/// must-writes.
325
/// However, may-sources may not interfere with one another. Hence, reads
326
/// will not block each other from generating dependences.
327
///
328
/// Write (Sink) <- MustWrite (Must-Source) <- Read (MaySource) is
329
/// present, then the dependence
330
///    { Write <- Read }
331
/// is not tracked.
332
///
333
/// We would like to specify the Must-Write as kills, source as Read
334
/// and sink as Write.
335
/// ISL does not have the functionality currently to support "kills".
336
/// Use the Must-Source as a way to specify "kills".
337
/// The drawback is that we will have both
338
///   { Write <- MustWrite, Write <- Read }
339
///
340
/// We need to filter this to track only { Write <- Read }.
341
///
342
/// Filtering { Write <- Read } from WAROverestimated:
343
/// --------------------------------------------------
344
/// isl_union_flow_get_full_may_dependence gives us dependences of the form
345
///   WAROverestimated = { Read+MustWrite -> [Write -> MemoryAccess]}
346
///
347
///  We need to intersect the domain with Read to get only
348
///  Read dependences.
349
///    Read = { Read -> MemoryAccess }
350
///
351
///
352
/// 1. Construct:
353
///   WARMemAccesses = { Read+Write -> [Read+Write -> MemoryAccess] }
354
/// This takes a Read+Write from WAROverestimated and maps it to the
355
/// corresponding wrapped memory access from WAROverestimated.
356
///
357
/// 2. Apply WARMemAcesses to the domain of WAR Overestimated to give:
358
///   WAR = { [Read+Write -> MemoryAccess] -> [Write -> MemoryAccess] }
359
///
360
/// WAR is in a state where we can intersect with Read, since they
361
/// have the same structure.
362
///
363
/// 3. Intersect this with a wrapped Read. Read is wrapped
364
/// to ensure the domains look the same.
365
///   WAR = WAR \intersect (wrapped Read)
366
///   WAR = { [Read -> MemoryAccesss] -> [Write -> MemoryAccess] }
367
///
368
///  4. Project out the memory access in the domain to get
369
///  WAR = { Read -> Write }
370
static isl_union_map *buildWAR(isl_union_map *Write, isl_union_map *MustWrite,
371
534
                               isl_union_map *Read, isl_schedule *Schedule) {
372
534
  isl_union_flow *Flow = buildFlow(Write, MustWrite, Read, Schedule);
373
534
  auto *WAROverestimated = isl_union_flow_get_full_may_dependence(Flow);
374
534
375
534
  // 1. Constructing WARMemAccesses
376
534
  // WarMemAccesses = { Read+Write -> [Write -> MemAccess] }
377
534
  // Range factor of range product
378
534
  //     { Read+Write -> MemAcesss }
379
534
  // Domain projection
380
534
  //     { [Read+Write -> MemAccess] -> Read+Write }
381
534
  // Reverse
382
534
  //     { Read+Write -> [Read+Write -> MemAccess] }
383
534
  auto WARMemAccesses = isl_union_map_copy(WAROverestimated);
384
534
  WARMemAccesses = isl_union_map_range_factor_range(WAROverestimated);
385
534
  WARMemAccesses = isl_union_map_domain_map(WARMemAccesses);
386
534
  WARMemAccesses = isl_union_map_reverse(WARMemAccesses);
387
534
388
534
  // 2. Apply to get domain tagged with memory accesses
389
534
  isl_union_map *WAR =
390
534
      isl_union_map_apply_domain(WAROverestimated, WARMemAccesses);
391
534
392
534
  // 3. Intersect with Read to extract only reads
393
534
  auto ReadWrapped = isl_union_map_wrap(isl_union_map_copy(Read));
394
534
  WAR = isl_union_map_intersect_domain(WAR, ReadWrapped);
395
534
396
534
  // 4. Project out memory accesses to get usual style dependences
397
534
  WAR = isl_union_map_range_factor_domain(WAR);
398
534
  WAR = isl_union_map_domain_factor_domain(WAR);
399
534
400
534
  isl_union_flow_free(Flow);
401
534
  return WAR;
402
534
}
403
404
540
void Dependences::calculateDependences(Scop &S) {
405
540
  isl_union_map *Read, *MustWrite, *MayWrite, *ReductionTagMap;
406
540
  isl_schedule *Schedule;
407
540
  isl_union_set *TaggedStmtDomain;
408
540
409
540
  DEBUG(dbgs() << "Scop: \n" << S << "\n");
410
540
411
540
  collectInfo(S, Read, MustWrite, MayWrite, ReductionTagMap, TaggedStmtDomain,
412
540
              Level);
413
540
414
540
  bool HasReductions = !isl_union_map_is_empty(ReductionTagMap);
415
540
416
540
  DEBUG(dbgs() << "Read: " << Read << '\n';
417
540
        dbgs() << "MustWrite: " << MustWrite << '\n';
418
540
        dbgs() << "MayWrite: " << MayWrite << '\n';
419
540
        dbgs() << "ReductionTagMap: " << ReductionTagMap << '\n';
420
540
        dbgs() << "TaggedStmtDomain: " << TaggedStmtDomain << '\n';);
421
540
422
540
  Schedule = S.getScheduleTree();
423
540
424
540
  if (
!HasReductions540
)
{437
425
437
    isl_union_map_free(ReductionTagMap);
426
437
    // Tag the schedule tree if we want fine-grain dependence info
427
437
    if (
Level > AL_Statement437
)
{23
428
23
      auto TaggedMap =
429
23
          isl_union_set_unwrap(isl_union_set_copy(TaggedStmtDomain));
430
23
      auto Tags = isl_union_map_domain_map_union_pw_multi_aff(TaggedMap);
431
23
      Schedule = isl_schedule_pullback_union_pw_multi_aff(Schedule, Tags);
432
23
    }
433
103
  } else {
434
103
    isl_union_map *IdentityMap;
435
103
    isl_union_pw_multi_aff *ReductionTags, *IdentityTags, *Tags;
436
103
437
103
    // Extract Reduction tags from the combined access domains in the given
438
103
    // SCoP. The result is a map that maps each tagged element in the domain to
439
103
    // the memory location it accesses. ReductionTags = {[Stmt[i] ->
440
103
    // Array[f(i)]] -> Stmt[i] }
441
103
    ReductionTags =
442
103
        isl_union_map_domain_map_union_pw_multi_aff(ReductionTagMap);
443
103
444
103
    // Compute an identity map from each statement in domain to itself.
445
103
    // IdentityTags = { [Stmt[i] -> Stmt[i] }
446
103
    IdentityMap = isl_union_set_identity(isl_union_set_copy(TaggedStmtDomain));
447
103
    IdentityTags = isl_union_pw_multi_aff_from_union_map(IdentityMap);
448
103
449
103
    Tags = isl_union_pw_multi_aff_union_add(ReductionTags, IdentityTags);
450
103
451
103
    // By pulling back Tags from Schedule, we have a schedule tree that can
452
103
    // be used to compute normal dependences, as well as 'tagged' reduction
453
103
    // dependences.
454
103
    Schedule = isl_schedule_pullback_union_pw_multi_aff(Schedule, Tags);
455
103
  }
456
540
457
540
  DEBUG(dbgs() << "Read: " << Read << "\n";
458
540
        dbgs() << "MustWrite: " << MustWrite << "\n";
459
540
        dbgs() << "MayWrite: " << MayWrite << "\n";
460
540
        dbgs() << "Schedule: " << Schedule << "\n");
461
540
462
540
  isl_union_map *StrictWAW = nullptr;
463
540
  {
464
540
    IslMaxOperationsGuard MaxOpGuard(IslCtx.get(), OptComputeOut);
465
540
466
540
    RAW = WAW = WAR = RED = nullptr;
467
540
    isl_union_map *Write = isl_union_map_union(isl_union_map_copy(MustWrite),
468
540
                                               isl_union_map_copy(MayWrite));
469
540
470
540
    // We are interested in detecting reductions that do not have intermediate
471
540
    // computations that are captured by other statements.
472
540
    //
473
540
    // Example:
474
540
    // void f(int *A, int *B) {
475
540
    //     for(int i = 0; i <= 100; i++) {
476
540
    //
477
540
    //            *-WAR (S0[i] -> S0[i + 1] 0 <= i <= 100)------------*
478
540
    //            |                                                   |
479
540
    //            *-WAW (S0[i] -> S0[i + 1] 0 <= i <= 100)------------*
480
540
    //            |                                                   |
481
540
    //            v                                                   |
482
540
    //     S0:    *A += i; >------------------*-----------------------*
483
540
    //                                        |
484
540
    //         if (i >= 98) {          WAR (S0[i] -> S1[i]) 98 <= i <= 100
485
540
    //                                        |
486
540
    //     S1:        *B = *A; <--------------*
487
540
    //         }
488
540
    //     }
489
540
    // }
490
540
    //
491
540
    // S0[0 <= i <= 100] has a reduction. However, the values in
492
540
    // S0[98 <= i <= 100] is captured in S1[98 <= i <= 100].
493
540
    // Since we allow free reordering on our reduction dependences, we need to
494
540
    // remove all instances of a reduction statement that have data dependences
495
540
    // originating from them.
496
540
    // In the case of the example, we need to remove S0[98 <= i <= 100] from
497
540
    // our reduction dependences.
498
540
    //
499
540
    // When we build up the WAW dependences that are used to detect reductions,
500
540
    // we consider only **Writes that have no intermediate Reads**.
501
540
    //
502
540
    // `isl_union_flow_get_must_dependence` gives us dependences of the form:
503
540
    // (sink <- must_source).
504
540
    //
505
540
    // It *will not give* dependences of the form:
506
540
    // 1. (sink <- ... <- may_source <- ... <- must_source)
507
540
    // 2. (sink <- ... <- must_source <- ... <- must_source)
508
540
    //
509
540
    // For a detailed reference on ISL's flow analysis, see:
510
540
    // "Presburger Formulas and Polyhedral Compilation" - Approximate Dataflow
511
540
    //  Analysis.
512
540
    //
513
540
    // Since we set "Write" as a must-source, "Read" as a may-source, and ask
514
540
    // for must dependences, we get all Writes to Writes that **do not flow
515
540
    // through a Read**.
516
540
    //
517
540
    // ScopInfo::checkForReductions makes sure that if something captures
518
540
    // the reduction variable in the same basic block, then it is rejected
519
540
    // before it is even handed here. This makes sure that there is exactly
520
540
    // one read and one write to a reduction variable in a Statement.
521
540
    // Example:
522
540
    //     void f(int *sum, int A[N], int B[N]) {
523
540
    //       for (int i = 0; i < N; i++) {
524
540
    //         *sum += A[i]; < the store and the load is not tagged as a
525
540
    //         B[i] = *sum;  < reduction-like access due to the overlap.
526
540
    //       }
527
540
    //     }
528
540
529
540
    isl_union_flow *Flow = buildFlow(Write, Write, Read, Schedule);
530
540
    StrictWAW = isl_union_flow_get_must_dependence(Flow);
531
540
    isl_union_flow_free(Flow);
532
540
533
540
    if (
OptAnalysisType == VALUE_BASED_ANALYSIS540
)
{534
534
534
      Flow = buildFlow(Read, MustWrite, MayWrite, Schedule);
535
534
      RAW = isl_union_flow_get_may_dependence(Flow);
536
534
      isl_union_flow_free(Flow);
537
534
538
534
      Flow = buildFlow(Write, MustWrite, MayWrite, Schedule);
539
534
      WAW = isl_union_flow_get_may_dependence(Flow);
540
534
      isl_union_flow_free(Flow);
541
534
542
534
      WAR = buildWAR(Write, MustWrite, Read, Schedule);
543
534
      isl_union_map_free(Write);
544
534
      isl_schedule_free(Schedule);
545
6
    } else {
546
6
      isl_union_flow *Flow;
547
6
548
6
      Flow = buildFlow(Read, nullptr, Write, Schedule);
549
6
      RAW = isl_union_flow_get_may_dependence(Flow);
550
6
      isl_union_flow_free(Flow);
551
6
552
6
      Flow = buildFlow(Write, nullptr, Read, Schedule);
553
6
      WAR = isl_union_flow_get_may_dependence(Flow);
554
6
      isl_union_flow_free(Flow);
555
6
556
6
      Flow = buildFlow(Write, nullptr, Write, Schedule);
557
6
      WAW = isl_union_flow_get_may_dependence(Flow);
558
6
      isl_union_flow_free(Flow);
559
6
560
6
      isl_union_map_free(Write);
561
6
      isl_schedule_free(Schedule);
562
6
    }
563
540
564
540
    isl_union_map_free(MustWrite);
565
540
    isl_union_map_free(MayWrite);
566
540
    isl_union_map_free(Read);
567
540
568
540
    RAW = isl_union_map_coalesce(RAW);
569
540
    WAW = isl_union_map_coalesce(WAW);
570
540
    WAR = isl_union_map_coalesce(WAR);
571
540
572
540
    // End of max_operations scope.
573
540
  }
574
540
575
540
  if (
isl_ctx_last_error(IslCtx.get()) == isl_error_quota540
)
{5
576
5
    isl_union_map_free(RAW);
577
5
    isl_union_map_free(WAW);
578
5
    isl_union_map_free(WAR);
579
5
    isl_union_map_free(StrictWAW);
580
5
    RAW = WAW = WAR = StrictWAW = nullptr;
581
5
    isl_ctx_reset_error(IslCtx.get());
582
5
  }
583
540
584
540
  // Drop out early, as the remaining computations are only needed for
585
540
  // reduction dependences or dependences that are finer than statement
586
540
  // level dependences.
587
540
  if (
!HasReductions && 540
Level == AL_Statement437
)
{414
588
414
    RED = isl_union_map_empty(isl_union_map_get_space(RAW));
589
414
    TC_RED = isl_union_map_empty(isl_union_set_get_space(TaggedStmtDomain));
590
414
    isl_union_set_free(TaggedStmtDomain);
591
414
    isl_union_map_free(StrictWAW);
592
414
    return;
593
414
  }
594
540
595
126
  isl_union_map *STMT_RAW, *STMT_WAW, *STMT_WAR;
596
126
  STMT_RAW = isl_union_map_intersect_domain(
597
126
      isl_union_map_copy(RAW), isl_union_set_copy(TaggedStmtDomain));
598
126
  STMT_WAW = isl_union_map_intersect_domain(
599
126
      isl_union_map_copy(WAW), isl_union_set_copy(TaggedStmtDomain));
600
126
  STMT_WAR =
601
126
      isl_union_map_intersect_domain(isl_union_map_copy(WAR), TaggedStmtDomain);
602
126
  DEBUG({
603
126
    dbgs() << "Wrapped Dependences:\n";
604
126
    dump();
605
126
    dbgs() << "\n";
606
126
  });
607
126
608
126
  // To handle reduction dependences we proceed as follows:
609
126
  // 1) Aggregate all possible reduction dependences, namely all self
610
126
  //    dependences on reduction like statements.
611
126
  // 2) Intersect them with the actual RAW & WAW dependences to the get the
612
126
  //    actual reduction dependences. This will ensure the load/store memory
613
126
  //    addresses were __identical__ in the two iterations of the statement.
614
126
  // 3) Relax the original RAW, WAW and WAR dependences by subtracting the
615
126
  //    actual reduction dependences. Binary reductions (sum += A[i]) cause
616
126
  //    the same, RAW, WAW and WAR dependences.
617
126
  // 4) Add the privatization dependences which are widened versions of
618
126
  //    already present dependences. They model the effect of manual
619
126
  //    privatization at the outermost possible place (namely after the last
620
126
  //    write and before the first access to a reduction location).
621
126
622
126
  // Step 1)
623
126
  RED = isl_union_map_empty(isl_union_map_get_space(RAW));
624
228
  for (ScopStmt &Stmt : S) {
625
471
    for (MemoryAccess *MA : Stmt) {
626
471
      if (!MA->isReductionLike())
627
147
        continue;
628
324
      isl_set *AccDomW = isl_map_wrap(MA->getAccessRelation());
629
324
      isl_map *Identity =
630
324
          isl_map_from_domain_and_range(isl_set_copy(AccDomW), AccDomW);
631
324
      RED = isl_union_map_add_map(RED, Identity);
632
324
    }
633
228
  }
634
126
635
126
  // Step 2)
636
126
  RED = isl_union_map_intersect(RED, isl_union_map_copy(RAW));
637
126
  RED = isl_union_map_intersect(RED, StrictWAW);
638
126
639
126
  if (
!isl_union_map_is_empty(RED)126
)
{71
640
71
641
71
    // Step 3)
642
71
    RAW = isl_union_map_subtract(RAW, isl_union_map_copy(RED));
643
71
    WAW = isl_union_map_subtract(WAW, isl_union_map_copy(RED));
644
71
    WAR = isl_union_map_subtract(WAR, isl_union_map_copy(RED));
645
71
646
71
    // Step 4)
647
71
    addPrivatizationDependences();
648
71
  }
649
126
650
126
  DEBUG({
651
126
    dbgs() << "Final Wrapped Dependences:\n";
652
126
    dump();
653
126
    dbgs() << "\n";
654
126
  });
655
126
656
126
  // RED_SIN is used to collect all reduction dependences again after we
657
126
  // split them according to the causing memory accesses. The current assumption
658
126
  // is that our method of splitting will not have any leftovers. In the end
659
126
  // we validate this assumption until we have more confidence in this method.
660
126
  isl_union_map *RED_SIN = isl_union_map_empty(isl_union_map_get_space(RAW));
661
126
662
126
  // For each reduction like memory access, check if there are reduction
663
126
  // dependences with the access relation of the memory access as a domain
664
126
  // (wrapped space!). If so these dependences are caused by this memory access.
665
126
  // We then move this portion of reduction dependences back to the statement ->
666
126
  // statement space and add a mapping from the memory access to these
667
126
  // dependences.
668
228
  for (ScopStmt &Stmt : S) {
669
471
    for (MemoryAccess *MA : Stmt) {
670
471
      if (!MA->isReductionLike())
671
147
        continue;
672
471
673
324
      isl_set *AccDomW = isl_map_wrap(MA->getAccessRelation());
674
324
      isl_union_map *AccRedDepU = isl_union_map_intersect_domain(
675
324
          isl_union_map_copy(TC_RED), isl_union_set_from_set(AccDomW));
676
324
      if (
isl_union_map_is_empty(AccRedDepU)324
)
{142
677
142
        isl_union_map_free(AccRedDepU);
678
142
        continue;
679
142
      }
680
324
681
182
      isl_map *AccRedDep = isl_map_from_union_map(AccRedDepU);
682
182
      RED_SIN = isl_union_map_add_map(RED_SIN, isl_map_copy(AccRedDep));
683
182
      AccRedDep = isl_map_zip(AccRedDep);
684
182
      AccRedDep = isl_set_unwrap(isl_map_domain(AccRedDep));
685
182
      setReductionDependences(MA, AccRedDep);
686
182
    }
687
228
  }
688
126
689
126
  assert(isl_union_map_is_equal(RED_SIN, TC_RED) &&
690
126
         "Intersecting the reduction dependence domain with the wrapped access "
691
126
         "relation is not enough, we need to loosen the access relation also");
692
126
  isl_union_map_free(RED_SIN);
693
126
694
126
  RAW = isl_union_map_zip(RAW);
695
126
  WAW = isl_union_map_zip(WAW);
696
126
  WAR = isl_union_map_zip(WAR);
697
126
  RED = isl_union_map_zip(RED);
698
126
  TC_RED = isl_union_map_zip(TC_RED);
699
126
700
126
  DEBUG({
701
126
    dbgs() << "Zipped Dependences:\n";
702
126
    dump();
703
126
    dbgs() << "\n";
704
126
  });
705
126
706
126
  RAW = isl_union_set_unwrap(isl_union_map_domain(RAW));
707
126
  WAW = isl_union_set_unwrap(isl_union_map_domain(WAW));
708
126
  WAR = isl_union_set_unwrap(isl_union_map_domain(WAR));
709
126
  RED = isl_union_set_unwrap(isl_union_map_domain(RED));
710
126
  TC_RED = isl_union_set_unwrap(isl_union_map_domain(TC_RED));
711
126
712
126
  DEBUG({
713
126
    dbgs() << "Unwrapped Dependences:\n";
714
126
    dump();
715
126
    dbgs() << "\n";
716
126
  });
717
126
718
126
  RAW = isl_union_map_union(RAW, STMT_RAW);
719
126
  WAW = isl_union_map_union(WAW, STMT_WAW);
720
126
  WAR = isl_union_map_union(WAR, STMT_WAR);
721
126
722
126
  RAW = isl_union_map_coalesce(RAW);
723
126
  WAW = isl_union_map_coalesce(WAW);
724
126
  WAR = isl_union_map_coalesce(WAR);
725
126
  RED = isl_union_map_coalesce(RED);
726
126
  TC_RED = isl_union_map_coalesce(TC_RED);
727
126
728
126
  DEBUG(dump());
729
126
}
730
731
bool Dependences::isValidSchedule(Scop &S,
732
63
                                  StatementToIslMapTy *NewSchedule) const {
733
63
  if (LegalityCheckDisabled)
734
0
    return true;
735
63
736
63
  isl_union_map *Dependences = getDependences(TYPE_RAW | TYPE_WAW | TYPE_WAR);
737
63
  isl_space *Space = S.getParamSpace();
738
63
  isl_union_map *Schedule = isl_union_map_empty(Space);
739
63
740
63
  isl_space *ScheduleSpace = nullptr;
741
63
742
93
  for (ScopStmt &Stmt : S) {
743
93
    isl_map *StmtScat;
744
93
745
93
    if (NewSchedule->find(&Stmt) == NewSchedule->end())
746
0
      StmtScat = Stmt.getSchedule();
747
93
    else
748
93
      StmtScat = isl_map_copy((*NewSchedule)[&Stmt]);
749
93
    assert(StmtScat &&
750
93
           "Schedules that contain extension nodes require special handling.");
751
93
752
93
    if (!ScheduleSpace)
753
63
      ScheduleSpace = isl_space_range(isl_map_get_space(StmtScat));
754
93
755
93
    Schedule = isl_union_map_add_map(Schedule, StmtScat);
756
93
  }
757
63
758
63
  Dependences =
759
63
      isl_union_map_apply_domain(Dependences, isl_union_map_copy(Schedule));
760
63
  Dependences = isl_union_map_apply_range(Dependences, Schedule);
761
63
762
63
  isl_set *Zero = isl_set_universe(isl_space_copy(ScheduleSpace));
763
241
  for (unsigned i = 0; 
i < isl_set_dim(Zero, isl_dim_set)241
;
i++178
)
764
178
    Zero = isl_set_fix_si(Zero, isl_dim_set, i, 0);
765
63
766
63
  isl_union_set *UDeltas = isl_union_map_deltas(Dependences);
767
63
  isl_set *Deltas = isl_union_set_extract_set(UDeltas, ScheduleSpace);
768
63
  isl_union_set_free(UDeltas);
769
63
770
63
  isl_map *NonPositive = isl_set_lex_le_set(Deltas, Zero);
771
63
  bool IsValid = isl_map_is_empty(NonPositive);
772
63
  isl_map_free(NonPositive);
773
63
774
63
  return IsValid;
775
63
}
776
777
// Check if the current scheduling dimension is parallel.
778
//
779
// We check for parallelism by verifying that the loop does not carry any
780
// dependences.
781
//
782
// Parallelism test: if the distance is zero in all outer dimensions, then it
783
// has to be zero in the current dimension as well.
784
//
785
// Implementation: first, translate dependences into time space, then force
786
// outer dimensions to be equal. If the distance is zero in the current
787
// dimension, then the loop is parallel. The distance is zero in the current
788
// dimension if it is a subset of a map with equal values for the current
789
// dimension.
790
bool Dependences::isParallel(isl_union_map *Schedule, isl_union_map *Deps,
791
478
                             isl_pw_aff **MinDistancePtr) const {
792
478
  isl_set *Deltas, *Distance;
793
478
  isl_map *ScheduleDeps;
794
478
  unsigned Dimension;
795
478
  bool IsParallel;
796
478
797
478
  Deps = isl_union_map_apply_range(Deps, isl_union_map_copy(Schedule));
798
478
  Deps = isl_union_map_apply_domain(Deps, isl_union_map_copy(Schedule));
799
478
800
478
  if (
isl_union_map_is_empty(Deps)478
)
{274
801
274
    isl_union_map_free(Deps);
802
274
    return true;
803
274
  }
804
478
805
204
  ScheduleDeps = isl_map_from_union_map(Deps);
806
204
  Dimension = isl_map_dim(ScheduleDeps, isl_dim_out) - 1;
807
204
808
299
  for (unsigned i = 0; 
i < Dimension299
;
i++95
)
809
95
    ScheduleDeps = isl_map_equate(ScheduleDeps, isl_dim_out, i, isl_dim_in, i);
810
204
811
204
  Deltas = isl_map_deltas(ScheduleDeps);
812
204
  Distance = isl_set_universe(isl_set_get_space(Deltas));
813
204
814
204
  // [0, ..., 0, +] - All zeros and last dimension larger than zero
815
299
  for (unsigned i = 0; 
i < Dimension299
;
i++95
)
816
95
    Distance = isl_set_fix_si(Distance, isl_dim_set, i, 0);
817
204
818
204
  Distance = isl_set_lower_bound_si(Distance, isl_dim_set, Dimension, 1);
819
204
  Distance = isl_set_intersect(Distance, Deltas);
820
204
821
204
  IsParallel = isl_set_is_empty(Distance);
822
204
  if (
IsParallel || 204
!MinDistancePtr169
)
{175
823
175
    isl_set_free(Distance);
824
175
    return IsParallel;
825
175
  }
826
204
827
29
  Distance = isl_set_project_out(Distance, isl_dim_set, 0, Dimension);
828
29
  Distance = isl_set_coalesce(Distance);
829
29
830
29
  // This last step will compute a expression for the minimal value in the
831
29
  // distance polyhedron Distance with regards to the first (outer most)
832
29
  // dimension.
833
29
  *MinDistancePtr = isl_pw_aff_coalesce(isl_set_dim_min(Distance, 0));
834
29
835
29
  return false;
836
204
}
837
838
265
static void printDependencyMap(raw_ostream &OS, __isl_keep isl_union_map *DM) {
839
265
  if (DM)
840
244
    OS << DM << "\n";
841
265
  else
842
21
    OS << "n/a\n";
843
265
}
844
845
53
void Dependences::print(raw_ostream &OS) const {
846
53
  OS << "\tRAW dependences:\n\t\t";
847
53
  printDependencyMap(OS, RAW);
848
53
  OS << "\tWAR dependences:\n\t\t";
849
53
  printDependencyMap(OS, WAR);
850
53
  OS << "\tWAW dependences:\n\t\t";
851
53
  printDependencyMap(OS, WAW);
852
53
  OS << "\tReduction dependences:\n\t\t";
853
53
  printDependencyMap(OS, RED);
854
53
  OS << "\tTransitive closure of reduction dependences:\n\t\t";
855
53
  printDependencyMap(OS, TC_RED);
856
53
}
857
858
0
void Dependences::dump() const { print(dbgs()); }
859
860
540
void Dependences::releaseMemory() {
861
540
  isl_union_map_free(RAW);
862
540
  isl_union_map_free(WAR);
863
540
  isl_union_map_free(WAW);
864
540
  isl_union_map_free(RED);
865
540
  isl_union_map_free(TC_RED);
866
540
867
540
  RED = RAW = WAR = WAW = TC_RED = nullptr;
868
540
869
540
  for (auto &ReductionDeps : ReductionDependences)
870
182
    isl_map_free(ReductionDeps.second);
871
540
  ReductionDependences.clear();
872
540
}
873
874
554
__isl_give isl_union_map *Dependences::getDependences(int Kinds) const {
875
554
  assert(hasValidDependences() && "No valid dependences available");
876
554
  isl_space *Space = isl_union_map_get_space(RAW);
877
554
  isl_union_map *Deps = isl_union_map_empty(Space);
878
554
879
554
  if (Kinds & TYPE_RAW)
880
377
    Deps = isl_union_map_union(Deps, isl_union_map_copy(RAW));
881
554
882
554
  if (Kinds & TYPE_WAR)
883
359
    Deps = isl_union_map_union(Deps, isl_union_map_copy(WAR));
884
554
885
554
  if (Kinds & TYPE_WAW)
886
359
    Deps = isl_union_map_union(Deps, isl_union_map_copy(WAW));
887
554
888
554
  if (Kinds & TYPE_RED)
889
51
    Deps = isl_union_map_union(Deps, isl_union_map_copy(RED));
890
554
891
554
  if (Kinds & TYPE_TC_RED)
892
166
    Deps = isl_union_map_union(Deps, isl_union_map_copy(TC_RED));
893
554
894
554
  Deps = isl_union_map_coalesce(Deps);
895
554
  Deps = isl_union_map_detect_equalities(Deps);
896
554
  return Deps;
897
554
}
898
899
272
bool Dependences::hasValidDependences() const {
900
269
  return (RAW != nullptr) && 
(WAR != nullptr)269
&&
(WAW != nullptr)269
;
901
272
}
902
903
__isl_give isl_map *
904
0
Dependences::getReductionDependences(MemoryAccess *MA) const {
905
0
  return isl_map_copy(ReductionDependences.lookup(MA));
906
0
}
907
908
182
void Dependences::setReductionDependences(MemoryAccess *MA, isl_map *D) {
909
182
  assert(ReductionDependences.count(MA) == 0 &&
910
182
         "Reduction dependences set twice!");
911
182
  ReductionDependences[MA] = D;
912
182
}
913
914
const Dependences &
915
0
DependenceAnalysis::Result::getDependences(Dependences::AnalysisLevel Level) {
916
0
  if (Dependences *d = D[Level].get())
917
0
    return *d;
918
0
919
0
  return recomputeDependences(Level);
920
0
}
921
922
const Dependences &DependenceAnalysis::Result::recomputeDependences(
923
0
    Dependences::AnalysisLevel Level) {
924
0
  D[Level].reset(new Dependences(S.getSharedIslCtx(), Level));
925
0
  D[Level]->calculateDependences(S);
926
0
  return *D[Level];
927
0
}
928
929
DependenceAnalysis::Result
930
DependenceAnalysis::run(Scop &S, ScopAnalysisManager &SAM,
931
0
                        ScopStandardAnalysisResults &SAR) {
932
0
  return {S, {}};
933
0
}
934
935
AnalysisKey DependenceAnalysis::Key;
936
937
PreservedAnalyses
938
DependenceInfoPrinterPass::run(Scop &S, ScopAnalysisManager &SAM,
939
                               ScopStandardAnalysisResults &SAR,
940
0
                               SPMUpdater &U) {
941
0
  auto &DI = SAM.getResult<DependenceAnalysis>(S, SAR);
942
0
943
0
  if (auto 
d0
= DI.D[OptAnalysisLevel].get())
{0
944
0
    d->print(OS);
945
0
    return PreservedAnalyses::all();
946
0
  }
947
0
948
0
  // Otherwise create the dependences on-the-fly and print them
949
0
  Dependences D(S.getSharedIslCtx(), OptAnalysisLevel);
950
0
  D.calculateDependences(S);
951
0
  D.print(OS);
952
0
953
0
  return PreservedAnalyses::all();
954
0
}
955
956
const Dependences &
957
560
DependenceInfo::getDependences(Dependences::AnalysisLevel Level) {
958
560
  if (Dependences *d = D[Level].get())
959
97
    return *d;
960
560
961
463
  return recomputeDependences(Level);
962
560
}
963
964
const Dependences &
965
468
DependenceInfo::recomputeDependences(Dependences::AnalysisLevel Level) {
966
468
  D[Level].reset(new Dependences(S->getSharedIslCtx(), Level));
967
468
  D[Level]->calculateDependences(*S);
968
468
  return *D[Level];
969
468
}
970
971
510
bool DependenceInfo::runOnScop(Scop &ScopVar) {
972
510
  S = &ScopVar;
973
510
  return false;
974
510
}
975
976
/// Print the dependences for the given SCoP to @p OS.
977
978
47
void polly::DependenceInfo::printScop(raw_ostream &OS, Scop &S) const {
979
47
  if (auto 
d47
= D[OptAnalysisLevel].get())
{0
980
0
    d->print(OS);
981
0
    return;
982
0
  }
983
47
984
47
  // Otherwise create the dependences on-the-fly and print it
985
47
  Dependences D(S.getSharedIslCtx(), OptAnalysisLevel);
986
47
  D.calculateDependences(S);
987
47
  D.print(OS);
988
47
}
989
990
523
void DependenceInfo::getAnalysisUsage(AnalysisUsage &AU) const {
991
523
  AU.addRequiredTransitive<ScopInfoRegionPass>();
992
523
  AU.setPreservesAll();
993
523
}
994
995
char DependenceInfo::ID = 0;
996
997
0
Pass *polly::createDependenceInfoPass() { return new DependenceInfo(); }
998
999
41.0k
INITIALIZE_PASS_BEGIN41.0k
(DependenceInfo, "polly-dependences",41.0k
1000
41.0k
                      "Polly - Calculate dependences", false, false);
1001
41.0k
INITIALIZE_PASS_DEPENDENCY(ScopInfoRegionPass);
1002
41.0k
INITIALIZE_PASS_END(DependenceInfo, "polly-dependences",
1003
                    "Polly - Calculate dependences", false, false)
1004
1005
//===----------------------------------------------------------------------===//
1006
const Dependences &
1007
DependenceInfoWrapperPass::getDependences(Scop *S,
1008
33
                                          Dependences::AnalysisLevel Level) {
1009
33
  auto It = ScopToDepsMap.find(S);
1010
33
  if (It != ScopToDepsMap.end())
1011
33
    
if (33
It->second33
)
{33
1012
33
      if (It->second->getDependenceLevel() == Level)
1013
33
        return *It->second.get();
1014
33
    }
1015
0
  return recomputeDependences(S, Level);
1016
33
}
1017
1018
const Dependences &DependenceInfoWrapperPass::recomputeDependences(
1019
25
    Scop *S, Dependences::AnalysisLevel Level) {
1020
25
  std::unique_ptr<Dependences> D(new Dependences(S->getSharedIslCtx(), Level));
1021
25
  D->calculateDependences(*S);
1022
25
  auto Inserted = ScopToDepsMap.insert(std::make_pair(S, std::move(D)));
1023
25
  return *Inserted.first->second;
1024
25
}
1025
1026
26
bool DependenceInfoWrapperPass::runOnFunction(Function &F) {
1027
26
  auto &SI = *getAnalysis<ScopInfoWrapperPass>().getSI();
1028
25
  for (auto &It : SI) {
1029
25
    assert(It.second && "Invalid SCoP object!");
1030
25
    recomputeDependences(It.second.get(), Dependences::AL_Access);
1031
25
  }
1032
26
  return false;
1033
26
}
1034
1035
7
void DependenceInfoWrapperPass::print(raw_ostream &OS, const Module *M) const {
1036
6
  for (auto &It : ScopToDepsMap) {
1037
6
    assert((It.first && It.second) && "Invalid Scop or Dependence object!\n");
1038
6
    It.second->print(OS);
1039
6
  }
1040
7
}
1041
1042
26
void DependenceInfoWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
1043
26
  AU.addRequiredTransitive<ScopInfoWrapperPass>();
1044
26
  AU.setPreservesAll();
1045
26
}
1046
1047
char DependenceInfoWrapperPass::ID = 0;
1048
1049
0
Pass *polly::createDependenceInfoWrapperPassPass() {
1050
0
  return new DependenceInfoWrapperPass();
1051
0
}
1052
1053
41.0k
INITIALIZE_PASS_BEGIN41.0k
(41.0k
1054
41.0k
    DependenceInfoWrapperPass, "polly-function-dependences",
1055
41.0k
    "Polly - Calculate dependences for all the SCoPs of a function", false,
1056
41.0k
    false)
1057
41.0k
INITIALIZE_PASS_DEPENDENCY(ScopInfoWrapperPass);
1058
41.0k
INITIALIZE_PASS_END(
1059
    DependenceInfoWrapperPass, "polly-function-dependences",
1060
    "Polly - Calculate dependences for all the SCoPs of a function", false,
1061
    false)