Coverage Report

Created: 2018-02-20 23:11

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/tools/polly/lib/Support/SCEVAffinator.cpp
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Count
Source (jump to first uncovered line)
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//===--------- SCEVAffinator.cpp  - Create Scops from LLVM IR -------------===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// Create a polyhedral description for a SCEV value.
11
//
12
//===----------------------------------------------------------------------===//
13
14
#include "polly/Support/SCEVAffinator.h"
15
#include "polly/Options.h"
16
#include "polly/ScopInfo.h"
17
#include "polly/Support/GICHelper.h"
18
#include "polly/Support/SCEVValidator.h"
19
#include "polly/Support/ScopHelper.h"
20
#include "isl/aff.h"
21
#include "isl/local_space.h"
22
#include "isl/set.h"
23
#include "isl/val.h"
24
25
using namespace llvm;
26
using namespace polly;
27
28
static cl::opt<bool> IgnoreIntegerWrapping(
29
    "polly-ignore-integer-wrapping",
30
    cl::desc("Do not build run-time checks to proof absence of integer "
31
             "wrapping"),
32
    cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::cat(PollyCategory));
33
34
// The maximal number of basic sets we allow during the construction of a
35
// piecewise affine function. More complex ones will result in very high
36
// compile time.
37
static int const MaxDisjunctionsInPwAff = 100;
38
39
// The maximal number of bits for which a general expression is modeled
40
// precisely.
41
static unsigned const MaxSmallBitWidth = 7;
42
43
/// Add the number of basic sets in @p Domain to @p User
44
static isl_stat addNumBasicSets(__isl_take isl_set *Domain,
45
558
                                __isl_take isl_aff *Aff, void *User) {
46
558
  auto *NumBasicSets = static_cast<unsigned *>(User);
47
558
  *NumBasicSets += isl_set_n_basic_set(Domain);
48
558
  isl_set_free(Domain);
49
558
  isl_aff_free(Aff);
50
558
  return isl_stat_ok;
51
558
}
52
53
/// Determine if @p PWAC is too complex to continue.
54
330
static bool isTooComplex(PWACtx PWAC) {
55
330
  unsigned NumBasicSets = 0;
56
330
  isl_pw_aff_foreach_piece(PWAC.first.keep(), addNumBasicSets, &NumBasicSets);
57
330
  if (NumBasicSets <= MaxDisjunctionsInPwAff)
58
329
    return false;
59
1
  return true;
60
1
}
61
62
/// Return the flag describing the possible wrapping of @p Expr.
63
22.5k
static SCEV::NoWrapFlags getNoWrapFlags(const SCEV *Expr) {
64
22.5k
  if (auto *NAry = dyn_cast<SCEVNAryExpr>(Expr))
65
9.48k
    return NAry->getNoWrapFlags();
66
13.0k
  return SCEV::NoWrapMask;
67
13.0k
}
68
69
static PWACtx combine(PWACtx PWAC0, PWACtx PWAC1,
70
                      __isl_give isl_pw_aff *(Fn)(__isl_take isl_pw_aff *,
71
13.7k
                                                  __isl_take isl_pw_aff *)) {
72
13.7k
  PWAC0.first = isl::manage(Fn(PWAC0.first.take(), PWAC1.first.take()));
73
13.7k
  PWAC0.second = PWAC0.second.unite(PWAC1.second);
74
13.7k
  return PWAC0;
75
13.7k
}
76
77
static __isl_give isl_pw_aff *getWidthExpValOnDomain(unsigned Width,
78
3.05k
                                                     __isl_take isl_set *Dom) {
79
3.05k
  auto *Ctx = isl_set_get_ctx(Dom);
80
3.05k
  auto *WidthVal = isl_val_int_from_ui(Ctx, Width);
81
3.05k
  auto *ExpVal = isl_val_2exp(WidthVal);
82
3.05k
  return isl_pw_aff_val_on_domain(Dom, ExpVal);
83
3.05k
}
84
85
SCEVAffinator::SCEVAffinator(Scop *S, LoopInfo &LI)
86
    : S(S), Ctx(S->getIslCtx().get()), SE(*S->getSE()), LI(LI),
87
1.18k
      TD(S->getFunction().getParent()->getDataLayout()) {}
88
89
12.3k
Loop *SCEVAffinator::getScope() { return BB ? 
LI.getLoopFor(BB)11.9k
:
nullptr399
; }
90
91
45
void SCEVAffinator::interpretAsUnsigned(PWACtx &PWAC, unsigned Width) {
92
45
  auto *NonNegDom = isl_pw_aff_nonneg_set(PWAC.first.copy());
93
45
  auto *NonNegPWA =
94
45
      isl_pw_aff_intersect_domain(PWAC.first.copy(), isl_set_copy(NonNegDom));
95
45
  auto *ExpPWA = getWidthExpValOnDomain(Width, isl_set_complement(NonNegDom));
96
45
  PWAC.first = isl::manage(isl_pw_aff_union_add(
97
45
      NonNegPWA, isl_pw_aff_add(PWAC.first.take(), ExpPWA)));
98
45
}
99
100
136
void SCEVAffinator::takeNonNegativeAssumption(PWACtx &PWAC) {
101
136
  auto *NegPWA = isl_pw_aff_neg(PWAC.first.copy());
102
136
  auto *NegDom = isl_pw_aff_pos_set(NegPWA);
103
136
  PWAC.second =
104
136
      isl::manage(isl_set_union(PWAC.second.take(), isl_set_copy(NegDom)));
105
136
  auto *Restriction = BB ? 
NegDom128
:
isl_set_params(NegDom)8
;
106
136
  auto DL = BB ? 
BB->getTerminator()->getDebugLoc()128
:
DebugLoc()8
;
107
136
  S->recordAssumption(UNSIGNED, isl::manage(Restriction), DL, AS_RESTRICTION,
108
136
                      BB);
109
136
}
110
111
19.3k
PWACtx SCEVAffinator::getPWACtxFromPWA(isl::pw_aff PWA) {
112
19.3k
  return std::make_pair(PWA, isl::set::empty(isl::space(Ctx, 0, NumIterators)));
113
19.3k
}
114
115
10.1k
PWACtx SCEVAffinator::getPwAff(const SCEV *Expr, BasicBlock *BB) {
116
10.1k
  this->BB = BB;
117
10.1k
118
10.1k
  if (BB) {
119
9.59k
    auto *DC = S->getDomainConditions(BB).release();
120
9.59k
    NumIterators = isl_set_n_dim(DC);
121
9.59k
    isl_set_free(DC);
122
9.59k
  } else
123
530
    NumIterators = 0;
124
10.1k
125
10.1k
  return visit(Expr);
126
10.1k
}
127
128
22.5k
PWACtx SCEVAffinator::checkForWrapping(const SCEV *Expr, PWACtx PWAC) const {
129
22.5k
  // If the SCEV flags do contain NSW (no signed wrap) then PWA already
130
22.5k
  // represents Expr in modulo semantic (it is not allowed to overflow), thus we
131
22.5k
  // are done. Otherwise, we will compute:
132
22.5k
  //   PWA = ((PWA + 2^(n-1)) mod (2 ^ n)) - 2^(n-1)
133
22.5k
  // whereas n is the number of bits of the Expr, hence:
134
22.5k
  //   n = bitwidth(ExprType)
135
22.5k
136
22.5k
  if (IgnoreIntegerWrapping || (getNoWrapFlags(Expr) & SCEV::FlagNSW))
137
19.6k
    return PWAC;
138
2.91k
139
2.91k
  isl::pw_aff PWAMod = addModuloSemantic(PWAC.first, Expr->getType());
140
2.91k
141
2.91k
  isl::set NotEqualSet = PWAC.first.ne_set(PWAMod);
142
2.91k
  PWAC.second = PWAC.second.unite(NotEqualSet).coalesce();
143
2.91k
144
2.91k
  const DebugLoc &Loc = BB ? 
BB->getTerminator()->getDebugLoc()2.90k
:
DebugLoc()5
;
145
2.91k
  if (!BB)
146
5
    NotEqualSet = NotEqualSet.params();
147
2.91k
  NotEqualSet = NotEqualSet.coalesce();
148
2.91k
149
2.91k
  if (!NotEqualSet.is_empty())
150
2.86k
    S->recordAssumption(WRAPPING, NotEqualSet, Loc, AS_RESTRICTION, BB);
151
2.91k
152
2.91k
  return PWAC;
153
2.91k
}
154
155
isl::pw_aff SCEVAffinator::addModuloSemantic(isl::pw_aff PWA,
156
2.99k
                                             Type *ExprType) const {
157
2.99k
  unsigned Width = TD.getTypeSizeInBits(ExprType);
158
2.99k
159
2.99k
  auto ModVal = isl::val::int_from_ui(Ctx, Width);
160
2.99k
  ModVal = ModVal.two_exp();
161
2.99k
162
2.99k
  isl::set Domain = PWA.domain();
163
2.99k
  isl::pw_aff AddPW =
164
2.99k
      isl::manage(getWidthExpValOnDomain(Width - 1, Domain.take()));
165
2.99k
  return PWA.add(AddPW).mod(ModVal).sub(AddPW);
166
2.99k
}
167
168
1.67k
bool SCEVAffinator::hasNSWAddRecForLoop(Loop *L) const {
169
10.2k
  for (const auto &CachedPair : CachedExpressions) {
170
10.2k
    auto *AddRec = dyn_cast<SCEVAddRecExpr>(CachedPair.first.first);
171
10.2k
    if (!AddRec)
172
6.10k
      continue;
173
4.10k
    if (AddRec->getLoop() != L)
174
2.24k
      continue;
175
1.86k
    if (AddRec->getNoWrapFlags() & SCEV::FlagNSW)
176
1.29k
      return true;
177
1.86k
  }
178
1.67k
179
1.67k
  
return false378
;
180
1.67k
}
181
182
35.0k
bool SCEVAffinator::computeModuloForExpr(const SCEV *Expr) {
183
35.0k
  unsigned Width = TD.getTypeSizeInBits(Expr->getType());
184
35.0k
  // We assume nsw expressions never overflow.
185
35.0k
  if (auto *NAry = dyn_cast<SCEVNAryExpr>(Expr))
186
14.5k
    if (NAry->getNoWrapFlags() & SCEV::FlagNSW)
187
9.87k
      return false;
188
25.2k
  return Width <= MaxSmallBitWidth;
189
25.2k
}
190
191
16.8k
PWACtx SCEVAffinator::visit(const SCEV *Expr) {
192
16.8k
193
16.8k
  auto Key = std::make_pair(Expr, BB);
194
16.8k
  PWACtx PWAC = CachedExpressions[Key];
195
16.8k
  if (PWAC.first)
196
4.58k
    return PWAC;
197
12.2k
198
12.2k
  auto ConstantAndLeftOverPair = extractConstantFactor(Expr, SE);
199
12.2k
  auto *Factor = ConstantAndLeftOverPair.first;
200
12.2k
  Expr = ConstantAndLeftOverPair.second;
201
12.2k
202
12.2k
  auto *Scope = getScope();
203
12.2k
  S->addParams(getParamsInAffineExpr(&S->getRegion(), Scope, Expr, SE));
204
12.2k
205
12.2k
  // In case the scev is a valid parameter, we do not further analyze this
206
12.2k
  // expression, but create a new parameter in the isl_pw_aff. This allows us
207
12.2k
  // to treat subexpressions that we cannot translate into an piecewise affine
208
12.2k
  // expression, as constant parameters of the piecewise affine expression.
209
12.2k
  if (isl_id *Id = S->getIdForParam(Expr).release()) {
210
1.83k
    isl_space *Space = isl_space_set_alloc(Ctx.get(), 1, NumIterators);
211
1.83k
    Space = isl_space_set_dim_id(Space, isl_dim_param, 0, Id);
212
1.83k
213
1.83k
    isl_set *Domain = isl_set_universe(isl_space_copy(Space));
214
1.83k
    isl_aff *Affine = isl_aff_zero_on_domain(isl_local_space_from_space(Space));
215
1.83k
    Affine = isl_aff_add_coefficient_si(Affine, isl_dim_param, 0, 1);
216
1.83k
217
1.83k
    PWAC = getPWACtxFromPWA(isl::manage(isl_pw_aff_alloc(Domain, Affine)));
218
10.4k
  } else {
219
10.4k
    PWAC = SCEVVisitor<SCEVAffinator, PWACtx>::visit(Expr);
220
10.4k
    if (computeModuloForExpr(Expr))
221
63
      PWAC.first = addModuloSemantic(PWAC.first, Expr->getType());
222
10.3k
    else
223
10.3k
      PWAC = checkForWrapping(Expr, PWAC);
224
10.4k
  }
225
12.2k
226
12.2k
  if (!Factor->getType()->isIntegerTy(1)) {
227
12.2k
    PWAC = combine(PWAC, visitConstant(Factor), isl_pw_aff_mul);
228
12.2k
    if (computeModuloForExpr(Key.first))
229
21
      PWAC.first = addModuloSemantic(PWAC.first, Expr->getType());
230
12.2k
  }
231
12.2k
232
12.2k
  // For compile time reasons we need to simplify the PWAC before we cache and
233
12.2k
  // return it.
234
12.2k
  PWAC.first = PWAC.first.coalesce();
235
12.2k
  if (!computeModuloForExpr(Key.first))
236
12.2k
    PWAC = checkForWrapping(Key.first, PWAC);
237
12.2k
238
12.2k
  CachedExpressions[Key] = PWAC;
239
12.2k
  return PWAC;
240
12.2k
}
241
242
17.5k
PWACtx SCEVAffinator::visitConstant(const SCEVConstant *Expr) {
243
17.5k
  ConstantInt *Value = Expr->getValue();
244
17.5k
  isl_val *v;
245
17.5k
246
17.5k
  // LLVM does not define if an integer value is interpreted as a signed or
247
17.5k
  // unsigned value. Hence, without further information, it is unknown how
248
17.5k
  // this value needs to be converted to GMP. At the moment, we only support
249
17.5k
  // signed operations. So we just interpret it as signed. Later, there are
250
17.5k
  // two options:
251
17.5k
  //
252
17.5k
  // 1. We always interpret any value as signed and convert the values on
253
17.5k
  //    demand.
254
17.5k
  // 2. We pass down the signedness of the calculation and use it to interpret
255
17.5k
  //    this constant correctly.
256
17.5k
  v = isl_valFromAPInt(Ctx.get(), Value->getValue(), /* isSigned */ true);
257
17.5k
258
17.5k
  isl_space *Space = isl_space_set_alloc(Ctx.get(), 0, NumIterators);
259
17.5k
  isl_local_space *ls = isl_local_space_from_space(Space);
260
17.5k
  return getPWACtxFromPWA(
261
17.5k
      isl::manage(isl_pw_aff_from_aff(isl_aff_val_on_domain(ls, v))));
262
17.5k
}
263
264
50
PWACtx SCEVAffinator::visitTruncateExpr(const SCEVTruncateExpr *Expr) {
265
50
  // Truncate operations are basically modulo operations, thus we can
266
50
  // model them that way. However, for large types we assume the operand
267
50
  // to fit in the new type size instead of introducing a modulo with a very
268
50
  // large constant.
269
50
270
50
  auto *Op = Expr->getOperand();
271
50
  auto OpPWAC = visit(Op);
272
50
273
50
  unsigned Width = TD.getTypeSizeInBits(Expr->getType());
274
50
275
50
  if (computeModuloForExpr(Expr))
276
36
    return OpPWAC;
277
14
278
14
  auto *Dom = OpPWAC.first.domain().take();
279
14
  auto *ExpPWA = getWidthExpValOnDomain(Width - 1, Dom);
280
14
  auto *GreaterDom =
281
14
      isl_pw_aff_ge_set(OpPWAC.first.copy(), isl_pw_aff_copy(ExpPWA));
282
14
  auto *SmallerDom =
283
14
      isl_pw_aff_lt_set(OpPWAC.first.copy(), isl_pw_aff_neg(ExpPWA));
284
14
  auto *OutOfBoundsDom = isl_set_union(SmallerDom, GreaterDom);
285
14
  OpPWAC.second = OpPWAC.second.unite(isl::manage_copy(OutOfBoundsDom));
286
14
287
14
  if (!BB) {
288
1
    assert(isl_set_dim(OutOfBoundsDom, isl_dim_set) == 0 &&
289
1
           "Expected a zero dimensional set for non-basic-block domains");
290
1
    OutOfBoundsDom = isl_set_params(OutOfBoundsDom);
291
1
  }
292
14
293
14
  S->recordAssumption(UNSIGNED, isl::manage(OutOfBoundsDom), DebugLoc(),
294
14
                      AS_RESTRICTION, BB);
295
14
296
14
  return OpPWAC;
297
14
}
298
299
111
PWACtx SCEVAffinator::visitZeroExtendExpr(const SCEVZeroExtendExpr *Expr) {
300
111
  // A zero-extended value can be interpreted as a piecewise defined signed
301
111
  // value. If the value was non-negative it stays the same, otherwise it
302
111
  // is the sum of the original value and 2^n where n is the bit-width of
303
111
  // the original (or operand) type. Examples:
304
111
  //   zext i8 127 to i32 -> { [127] }
305
111
  //   zext i8  -1 to i32 -> { [256 + (-1)] } = { [255] }
306
111
  //   zext i8  %v to i32 -> [v] -> { [v] | v >= 0; [256 + v] | v < 0 }
307
111
  //
308
111
  // However, LLVM/Scalar Evolution uses zero-extend (potentially lead by a
309
111
  // truncate) to represent some forms of modulo computation. The left-hand side
310
111
  // of the condition in the code below would result in the SCEV
311
111
  // "zext i1 <false, +, true>for.body" which is just another description
312
111
  // of the C expression "i & 1 != 0" or, equivalently, "i % 2 != 0".
313
111
  //
314
111
  //   for (i = 0; i < N; i++)
315
111
  //     if (i & 1 != 0 /* == i % 2 */)
316
111
  //       /* do something */
317
111
  //
318
111
  // If we do not make the modulo explicit but only use the mechanism described
319
111
  // above we will get the very restrictive assumption "N < 3", because for all
320
111
  // values of N >= 3 the SCEVAddRecExpr operand of the zero-extend would wrap.
321
111
  // Alternatively, we can make the modulo in the operand explicit in the
322
111
  // resulting piecewise function and thereby avoid the assumption on N. For the
323
111
  // example this would result in the following piecewise affine function:
324
111
  // { [i0] -> [(1)] : 2*floor((-1 + i0)/2) = -1 + i0;
325
111
  //   [i0] -> [(0)] : 2*floor((i0)/2) = i0 }
326
111
  // To this end we can first determine if the (immediate) operand of the
327
111
  // zero-extend can wrap and, in case it might, we will use explicit modulo
328
111
  // semantic to compute the result instead of emitting non-wrapping
329
111
  // assumptions.
330
111
  //
331
111
  // Note that operands with large bit-widths are less likely to be negative
332
111
  // because it would result in a very large access offset or loop bound after
333
111
  // the zero-extend. To this end one can optimistically assume the operand to
334
111
  // be positive and avoid the piecewise definition if the bit-width is bigger
335
111
  // than some threshold (here MaxZextSmallBitWidth).
336
111
  //
337
111
  // We choose to go with a hybrid solution of all modeling techniques described
338
111
  // above. For small bit-widths (up to MaxZextSmallBitWidth) we will model the
339
111
  // wrapping explicitly and use a piecewise defined function. However, if the
340
111
  // bit-width is bigger than MaxZextSmallBitWidth we will employ overflow
341
111
  // assumptions and assume the "former negative" piece will not exist.
342
111
343
111
  auto *Op = Expr->getOperand();
344
111
  auto OpPWAC = visit(Op);
345
111
346
111
  // If the width is to big we assume the negative part does not occur.
347
111
  if (!computeModuloForExpr(Op)) {
348
66
    takeNonNegativeAssumption(OpPWAC);
349
66
    return OpPWAC;
350
66
  }
351
45
352
45
  // If the width is small build the piece for the non-negative part and
353
45
  // the one for the negative part and unify them.
354
45
  unsigned Width = TD.getTypeSizeInBits(Op->getType());
355
45
  interpretAsUnsigned(OpPWAC, Width);
356
45
  return OpPWAC;
357
45
}
358
359
381
PWACtx SCEVAffinator::visitSignExtendExpr(const SCEVSignExtendExpr *Expr) {
360
381
  // As all values are represented as signed, a sign extension is a noop.
361
381
  return visit(Expr->getOperand());
362
381
}
363
364
244
PWACtx SCEVAffinator::visitAddExpr(const SCEVAddExpr *Expr) {
365
244
  PWACtx Sum = visit(Expr->getOperand(0));
366
244
367
516
  for (int i = 1, e = Expr->getNumOperands(); i < e; 
++i272
) {
368
272
    Sum = combine(Sum, visit(Expr->getOperand(i)), isl_pw_aff_add);
369
272
    if (isTooComplex(Sum))
370
0
      return std::make_pair(nullptr, nullptr);
371
272
  }
372
244
373
244
  return Sum;
374
244
}
375
376
1
PWACtx SCEVAffinator::visitMulExpr(const SCEVMulExpr *Expr) {
377
1
  PWACtx Prod = visit(Expr->getOperand(0));
378
1
379
2
  for (int i = 1, e = Expr->getNumOperands(); i < e; 
++i1
) {
380
1
    Prod = combine(Prod, visit(Expr->getOperand(i)), isl_pw_aff_mul);
381
1
    if (isTooComplex(Prod))
382
0
      return std::make_pair(nullptr, nullptr);
383
1
  }
384
1
385
1
  return Prod;
386
1
}
387
388
4.19k
PWACtx SCEVAffinator::visitAddRecExpr(const SCEVAddRecExpr *Expr) {
389
4.19k
  assert(Expr->isAffine() && "Only affine AddRecurrences allowed");
390
4.19k
391
4.19k
  auto Flags = Expr->getNoWrapFlags();
392
4.19k
393
4.19k
  // Directly generate isl_pw_aff for Expr if 'start' is zero.
394
4.19k
  if (Expr->getStart()->isZero()) {
395
3.06k
    assert(S->contains(Expr->getLoop()) &&
396
3.06k
           "Scop does not contain the loop referenced in this AddRec");
397
3.06k
398
3.06k
    PWACtx Step = visit(Expr->getOperand(1));
399
3.06k
    isl_space *Space = isl_space_set_alloc(Ctx.get(), 0, NumIterators);
400
3.06k
    isl_local_space *LocalSpace = isl_local_space_from_space(Space);
401
3.06k
402
3.06k
    unsigned loopDimension = S->getRelativeLoopDepth(Expr->getLoop());
403
3.06k
404
3.06k
    isl_aff *LAff = isl_aff_set_coefficient_si(
405
3.06k
        isl_aff_zero_on_domain(LocalSpace), isl_dim_in, loopDimension, 1);
406
3.06k
    isl_pw_aff *LPwAff = isl_pw_aff_from_aff(LAff);
407
3.06k
408
3.06k
    Step.first = Step.first.mul(isl::manage(LPwAff));
409
3.06k
    return Step;
410
3.06k
  }
411
1.12k
412
1.12k
  // Translate AddRecExpr from '{start, +, inc}' into 'start + {0, +, inc}'
413
1.12k
  // if 'start' is not zero.
414
1.12k
  // TODO: Using the original SCEV no-wrap flags is not always safe, however
415
1.12k
  //       as our code generation is reordering the expression anyway it doesn't
416
1.12k
  //       really matter.
417
1.12k
  const SCEV *ZeroStartExpr =
418
1.12k
      SE.getAddRecExpr(SE.getConstant(Expr->getStart()->getType(), 0),
419
1.12k
                       Expr->getStepRecurrence(SE), Expr->getLoop(), Flags);
420
1.12k
421
1.12k
  PWACtx Result = visit(ZeroStartExpr);
422
1.12k
  PWACtx Start = visit(Expr->getStart());
423
1.12k
  Result = combine(Result, Start, isl_pw_aff_add);
424
1.12k
  return Result;
425
1.12k
}
426
427
50
PWACtx SCEVAffinator::visitSMaxExpr(const SCEVSMaxExpr *Expr) {
428
50
  PWACtx Max = visit(Expr->getOperand(0));
429
50
430
106
  for (int i = 1, e = Expr->getNumOperands(); i < e; 
++i56
) {
431
57
    Max = combine(Max, visit(Expr->getOperand(i)), isl_pw_aff_max);
432
57
    if (isTooComplex(Max))
433
1
      return std::make_pair(nullptr, nullptr);
434
57
  }
435
50
436
50
  
return Max49
;
437
50
}
438
439
0
PWACtx SCEVAffinator::visitUMaxExpr(const SCEVUMaxExpr *Expr) {
440
0
  llvm_unreachable("SCEVUMaxExpr not yet supported");
441
0
}
442
443
40
PWACtx SCEVAffinator::visitUDivExpr(const SCEVUDivExpr *Expr) {
444
40
  // The handling of unsigned division is basically the same as for signed
445
40
  // division, except the interpretation of the operands. As the divisor
446
40
  // has to be constant in both cases we can simply interpret it as an
447
40
  // unsigned value without additional complexity in the representation.
448
40
  // For the dividend we could choose from the different representation
449
40
  // schemes introduced for zero-extend operations but for now we will
450
40
  // simply use an assumption.
451
40
  auto *Dividend = Expr->getLHS();
452
40
  auto *Divisor = Expr->getRHS();
453
40
  assert(isa<SCEVConstant>(Divisor) &&
454
40
         "UDiv is no parameter but has a non-constant RHS.");
455
40
456
40
  auto DividendPWAC = visit(Dividend);
457
40
  auto DivisorPWAC = visit(Divisor);
458
40
459
40
  if (SE.isKnownNegative(Divisor)) {
460
2
    // Interpret negative divisors unsigned. This is a special case of the
461
2
    // piece-wise defined value described for zero-extends as we already know
462
2
    // the actual value of the constant divisor.
463
2
    unsigned Width = TD.getTypeSizeInBits(Expr->getType());
464
2
    auto *DivisorDom = DivisorPWAC.first.domain().take();
465
2
    auto *WidthExpPWA = getWidthExpValOnDomain(Width, DivisorDom);
466
2
    DivisorPWAC.first = DivisorPWAC.first.add(isl::manage(WidthExpPWA));
467
2
  }
468
40
469
40
  // TODO: One can represent the dividend as piece-wise function to be more
470
40
  //       precise but therefor a heuristic is needed.
471
40
472
40
  // Assume a non-negative dividend.
473
40
  takeNonNegativeAssumption(DividendPWAC);
474
40
475
40
  DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_div);
476
40
  DividendPWAC.first = DividendPWAC.first.floor();
477
40
478
40
  return DividendPWAC;
479
40
}
480
481
39
PWACtx SCEVAffinator::visitSDivInstruction(Instruction *SDiv) {
482
39
  assert(SDiv->getOpcode() == Instruction::SDiv && "Assumed SDiv instruction!");
483
39
484
39
  auto *Scope = getScope();
485
39
  auto *Divisor = SDiv->getOperand(1);
486
39
  auto *DivisorSCEV = SE.getSCEVAtScope(Divisor, Scope);
487
39
  auto DivisorPWAC = visit(DivisorSCEV);
488
39
  assert(isa<SCEVConstant>(DivisorSCEV) &&
489
39
         "SDiv is no parameter but has a non-constant RHS.");
490
39
491
39
  auto *Dividend = SDiv->getOperand(0);
492
39
  auto *DividendSCEV = SE.getSCEVAtScope(Dividend, Scope);
493
39
  auto DividendPWAC = visit(DividendSCEV);
494
39
  DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_tdiv_q);
495
39
  return DividendPWAC;
496
39
}
497
498
36
PWACtx SCEVAffinator::visitSRemInstruction(Instruction *SRem) {
499
36
  assert(SRem->getOpcode() == Instruction::SRem && "Assumed SRem instruction!");
500
36
501
36
  auto *Scope = getScope();
502
36
  auto *Divisor = SRem->getOperand(1);
503
36
  auto *DivisorSCEV = SE.getSCEVAtScope(Divisor, Scope);
504
36
  auto DivisorPWAC = visit(DivisorSCEV);
505
36
  assert(isa<ConstantInt>(Divisor) &&
506
36
         "SRem is no parameter but has a non-constant RHS.");
507
36
508
36
  auto *Dividend = SRem->getOperand(0);
509
36
  auto *DividendSCEV = SE.getSCEVAtScope(Dividend, Scope);
510
36
  auto DividendPWAC = visit(DividendSCEV);
511
36
  DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_tdiv_r);
512
36
  return DividendPWAC;
513
36
}
514
515
87
PWACtx SCEVAffinator::visitUnknown(const SCEVUnknown *Expr) {
516
87
  if (Instruction *I = dyn_cast<Instruction>(Expr->getValue())) {
517
87
    switch (I->getOpcode()) {
518
87
    case Instruction::IntToPtr:
519
4
      return visit(SE.getSCEVAtScope(I->getOperand(0), getScope()));
520
87
    case Instruction::PtrToInt:
521
8
      return visit(SE.getSCEVAtScope(I->getOperand(0), getScope()));
522
87
    case Instruction::SDiv:
523
39
      return visitSDivInstruction(I);
524
87
    case Instruction::SRem:
525
36
      return visitSRemInstruction(I);
526
87
    default:
527
0
      break; // Fall through.
528
0
    }
529
0
  }
530
0
531
0
  llvm_unreachable(
532
0
      "Unknowns SCEV was neither parameter nor a valid instruction.");
533
0
}