Started 56 min ago
Took 19 sec on labmaster2

Success Build #49772 (Jan 24, 2021 2:15:51 PM)


Git (git http://labmaster3.local/git/llvm-project.git)

  1. [ARM] Extra MVE unaligned VLDn tests. NFC (detail)
  2. [RISCV] Add test cases for missed opportunities to use fcvt.*.w(u) instructions on RV64 when input is known to be extended from i8/i16. (detail)
  3. [RISCV] Add test cases for missed opportunities to use *W instructions for div/rem when inputs are sign/zero extended from i8/16 instead of i32. (detail)
  4. [RISCV] Use bitsLE instead of strict == MVT::i32 in assertsexti32 and assertzexti32. (detail)

Started by timer

This run spent:

  • 3 ms waiting;
  • 19 sec build duration;
  • 19 sec total from scheduled to completion.
Revision: 12d0753aca22896fda2cf76781b0ee0524d55065
  • refs/remotes/origin/main
Revision: f8837bec132947731bb9d2c87316e598d825396d
  • refs/remotes/origin/main
Test Result (no failures)