FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [AArch64] add tests for fcvtl2; NFC (details)
  2. [clang] Fix modules build after addition of TypeBitCodes.def (details)
  3. [AArch64][test] Fix machine-outliner-size-info.mir after D71168 (details)
  4. [perf-training] Make training data location configurable (details)
  5. AArch64: Fix frame record chain (details)
  6. gn build: (manually and belatedly) merge ed153ef044fd (details)
Commit 796e009c31c6ac0fb8473e94066c7405460a7177 by spatel
[AArch64] add tests for fcvtl2; NFC
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
Commit 5708f2daf7386ef5f1ec54db4bda2b48bbcbe934 by Raphael Isemann
[clang] Fix modules build after addition of TypeBitCodes.def
In revision 139006ceb641f038a2b19cac1174316e57004ed6 the Serialization
folder got its first def file 'TypeBitCodes.def'. This broke the modules
build as this .def file was not textually included but implicitly
converted into a module due to our umbrella directive.
This patch fixes this by explicitly marking the .def file as textual.
The file was modifiedclang/include/clang/module.modulemap
Commit ccc453eb57b91a4e64ecfd7a9ee8d9415345c6b6 by maskray
[AArch64][test] Fix machine-outliner-size-info.mir after D71168
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-size-info.mir
Commit 2c59c4ffb9c111f8d87a65839697d03fc485c51c by smeenai
[perf-training] Make training data location configurable
We may wish to keep the PGO training data outside the repository. Add a
CMake variable to allow referencing an external lit testsuite.
Differential Revision: https://reviews.llvm.org/D71507
The file was modifiedclang/utils/perf-training/lit.cfg
The file was modifiedclang/utils/perf-training/lit.site.cfg.in
The file was modifiedclang/utils/perf-training/order-files.lit.site.cfg.in
The file was modifiedclang/utils/perf-training/CMakeLists.txt
The file was modifiedclang/utils/perf-training/order-files.lit.cfg
Commit d4e10e6adb1b629b3fc1b78f7e281fbcec392edb by tzuhsiang.chien
AArch64: Fix frame record chain
The commit r369122 may keep LR and FP register (aka. frame record) in
the middle of a frame, thus we must add the offsets to ensure the FP
register always points to innermost frame record on the stack.
According to AAPCS64[1], a conforming code shall construct a linked list
of stack frames that can be traversed with frame records.  This commit
is also essential to frame-pointer-based stack unwinder (e.g.  the stack
unwinder in linx-perf-tools.)
[1]
https://github.com/ARM-software/software-standards/blob/master/abi/aapcs64/aapcs64.rst#the-frame-pointer
Test: llvm-lit
${LLVM_SRC}/test/CodeGen/AArch64/framelayout-frame-record.ll Test:
llvm-lit ${LLVM_SRC}/test/CodeGen/AArch64
Differential Revision: https://reviews.llvm.org/D70800
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/framelayout-frame-record.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
Commit 5ea34c15bb986b16741cc0a17996552859b74c49 by thakis
gn build: (manually and belatedly) merge ed153ef044fd
The file was modifiedllvm/utils/gn/secondary/clang/test/BUILD.gn