SuccessChanges

Summary

  1. [MLIR][SPIRVToLLVM] Convert bitwise and logical not (details)
  2. [X86] Prefer AND over PSHUFB for v64i8 when possible (details)
  3. [ods] Update Operator to record Arg->[Attr|Operand]Index mapping (details)
  4. [MLIR][SPIRVToLLVM] Added Bitcast conversion pattern (details)
  5. Move Sema::PragmaStack<ValueType>::Act into Sema.h so it can be instantiated as needed (details)
Commit cd1bc5c15d4e58b574060c844917c8dfeb7a8f54 by antiagainst
[MLIR][SPIRVToLLVM] Convert bitwise and logical not

This patch introduces new conversion patterns for bit and logical
negation op: `spv.Not` and `spv.LogicalNot`. They are implemented
by applying xor on the operand and mask with all bits set.

Differential Revision: https://reviews.llvm.org/D82637
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/bitwise-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/logical-to-llvm.mlir
Commit 9b04d69ccefb57ec202a0ecdb36a84ed0568aead by craig.topper
[X86] Prefer AND over PSHUFB for v64i8 when possible

If the shuffle is a blend and one input is a 0 vector, we should prefer AND over PSHUFB since its available on more execution ports.

Differential Revision: https://reviews.llvm.org/D82798
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/avx512-mask-op.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Commit 71b9d89df78f25f373b6352c0f0c1e3a539634d0 by jpienaar
[ods] Update Operator to record Arg->[Attr|Operand]Index mapping

Also fixed bug in type inferface generator to address bug where operands and
attributes are interleaved.

Differential Revision: https://reviews.llvm.org/D82819
The file was modifiedmlir/include/mlir/TableGen/Operator.h
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was modifiedmlir/test/mlir-tblgen/op-result.td
The file was modifiedmlir/lib/TableGen/Operator.cpp
Commit 3819789be6b83ac7af619b8279a0c480f9bffeeb by antiagainst
[MLIR][SPIRVToLLVM] Added Bitcast conversion pattern

Added conversion pattern and tests for `spv.Bitcast` op.  This one has
a direct mapping in LLVM dialect so `DirectConversionPattern` was used.

Differential Revision: https://reviews.llvm.org/D82748
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir
Commit 31c689e69404bb8208de9599626f60c77b6fa81d by dblaikie
Move Sema::PragmaStack<ValueType>::Act into Sema.h so it can be instantiated as needed

Found by linker failures in ThinLTO where the definition wasn't
available when it needed to be. (eg: ThinLTO may've eliminated the one
caller in the same TU and dropped the definition - breaking accidental
implicit depenednce on that definition from elsewhere)
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaAttr.cpp