Changes

[AArch64][GlobalISel] Always fall back on tail calls with -tailcallopt
-tailcallopt requires that we perform different stack adjustments than
with sibling calls. For example, the `@caller_to0_from8` function in 
test/CodeGen/AArch64/tail-call.ll requires that we adjust SP. Without
-tailcallopt, this adjustment does not happen. With it, however, it is
expected.
So, to ensure that adding sibling call support doesn't break
-tailcallopt, make CallLowering always fall back on possible tail calls
when -tailcallopt is passed in.
Update test/CodeGen/AArch64/tail-call.ll with a GlobalISel line to make
sure that we don't differ from the SDAG implementation at any point.
Differential Revision: https://reviews.llvm.org/D67245
llvm-svn: 371227

[ConstantFolding] Refactor function match for better speed (NFC)
Use an `enum` instead of string comparison to match the candidate
function.
llvm-svn: 371228

[ARM] Add patterns for VMUL with q and r registers
Added support for VMUL to use an r register, this reduces pressure on 
the q registers.
llvm-svn: 371229

[ARM] Add patterns for VADD with q and r registers
Added support for VADD to use q and r registers, which reduces pressure 
on q registers.
llvm-svn: 371230

[ARM] Add patterns for VSUB with q and r registers
Added patterns for VSUB to support q and r registers, which reduces 
pressure on q registers.
llvm-svn: 371231

[Remarks] Add support for internalizing a remark in a string table
In order to keep remarks around, we need to make them tied to a string 
table.
Users then can delete the parser and rely on the string table to keep 
the memory of the strings alive and deduplicated.
llvm-svn: 371233

[lldb] Small optimization of FormatMap::Delete and FormatMap::Get
llvm-svn: 371234

[FPEnv] Teach the IRBuilder about constrained FPToSI and FPToUI.
The IRBuilder doesn't know that the two floating point to integer
instructions have constrained equivalents. This patch adds the support
by building on the strict FP mode now present in the IRBuilder.
Reviewed by:	John McCall Approved by:	John McCall 
Differential Revision:	https://reviews.llvm.org/D67291
llvm-svn: 371235

[ConstantFolding] Refactor functions not available before C99 (NFC)
Note the cases when calling a function at compile time may fail if the
host does not support the C99 run time library.
llvm-svn: 371236

[PowerPC][XCOFF] Verify symbol table in xcoff object files. [NFC]
Extend the common/local-common testing for object files to also verify
the symbol table now that the needed functionality has landed in
llvm-readobj.
Differential Revision: https://reviews.llvm.org/D66944
llvm-svn: 371237

[X86] Teach FixupBWInsts to turn
MOVSX16rr8/MOVZX16rr8/MOVSX16rm8/MOVZX16rm8 into their 32-bit dest
equivalents when the upper part of the register is dead.
llvm-svn: 371240

[LifetimeAnalysis] don't use raw string literals in macros
They broke the AArch64 bots (gcc does not support it)
llvm-svn: 371241

[X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem.
We can rely on X86FixupBWInsts to turn these into MOVZX32. This 
simplifies a follow up commit to use MOVSX for i8 sdivrem with a late
optimization to use CBW when register allocation works out.
llvm-svn: 371242

[X86] Use MOVSX by default instead of CBW to extend i8 to AX for i8
sdivrem.
We can use a MOVSX16 here then rely on FixupBWInst to change to MOVSX32
if the upper bits are dead. With a special case to not promote if it
could be turned into CBW.
Then we can rely on X86MCInstLower to turn the MOVSX into CBW very late
if register allocation worked out.
Using MOVSX gives an opportunity to use the MOVSX as a both a copy and a
sign extend since the input and output register aren't tied together.
Differential Revision: https://reviews.llvm.org/D67192
llvm-svn: 371243

[llvm-jitlink] Add optional slab allocator for testing locality
optimizations.
The llvm-jitlink utility now accepts a '-slab-allocate <size>' option.
If given, llvm-jitlink will use a slab-based memory manager rather than
the default InProcessMemoryManager. Using a slab allocator will allow
reliable testing of future locality based optimizations (e.g. PLT and
GOT elimination) in JITLink.
The <size> argument is a number, optionally followed by a units
specifier (Kb, Mb, or Gb). If the units are not given then the number is
assumed to be in Kb.
llvm-svn: 371244

[ORC] Make sure RPC channel-send is called in blocking calls and
responses.
ORC-RPC batches calls by default, and the channel's send method must be
called to transfer any buffered calls to the remote. The call to send
was missing on responses and blocking calls in the
SingleThreadedRPCEndpoint. This patch adds the necessary calls and
modifies the RPC unit test to check for them.
llvm-svn: 371245

[ConstantFolding] Add new test cases for transcendentals (NFC)
llvm-svn: 371246

[PowerPC][XCOFF] Remove basic test. [NFC]
Test verified that we could compile an empty module and produce an XCOFF 
object file. Newer tests superssed this coverage, its safe to remove.
llvm-svn: 371247

[llvm-ifs] Improving detection of PlatformKind from triple for TBD
generation.
It was pointed out that I had hard-coded PlatformKind. This is
rectifying that.
Differential Revision: https://reviews.llvm.org/D67255
llvm-svn: 371248

AMDGPU: Fix typo
llvm-svn: 371249

[clang][Index][NFC] Put IndexingOptions to a separate header
llvm-svn: 371250

Remove dead .seh_stackalloc parsing method in X86AsmParser
The shared COFF asm parser code handles this directive, since it is 
shared with AArch64. Spotted by Alexandre Ganea in review.
llvm-svn: 371251

Update comment for <template-param-decl> mangling to match extended
mangling rule in r371004.
llvm-svn: 371252

GlobalISel: Support physical register inputs in patterns
llvm-svn: 371253

GlobalISel: Add G_FMAD instruction
llvm-svn: 371254

[ORC] Add a missing #include atomic.
Hopefully this will fix the bot build failures from r371245.
llvm-svn: 371255

[analyzer] pr43179: Make CallDescription defensive against C variadic
functions.
Most functions that our checkers react upon are not C-style variadic
functions, and therefore they have as many actual arguments as they have
formal parameters.
However, it's not impossible to define a variadic function with the same
name. This will crash any checker that relies on CallDescription to
check the number of arguments but silently assumes that the number of
parameters is the same.
Change CallDescription to check both the number of arguments and the
number of parameters by default.
If we're intentionally trying to match variadic functions, allow
specifying arguments and parameters separately (possibly omitting any of
them). For now we only have one CallDescription which would make use of
those, namely __builtin_va_start itself.
Differential Revision: https://reviews.llvm.org/D67019
llvm-svn: 371256

[analyzer] Add minimal support for fix-it hints.
Allow attaching fixit hints to Static Analyzer BugReports.
Fixits are attached either to the bug report itself or to its notes
(path-sensitive event notes or path-insensitive extra notes).
Add support for fixits in text output (including the default text output
that goes without notes, as long as the fixit "belongs" to the warning).
Add support for fixits in the plist output mode.
Implement a fixit for the path-insensitive DeadStores checker. Only dead 
initialization warning is currently covered.
Implement a fixit for the path-sensitive VirtualCall checker when the
virtual method is not pure virtual (in this case the "fix" is to
suppress the warning by qualifying the call).
Both fixits are under an off-by-default flag for now, because they 
require more careful testing.
Differential Revision: https://reviews.llvm.org/D65182
llvm-svn: 371257

[Core] Remove use of ClangASTContext in DumpDataExtractor
Summary: DumpDataExtractor uses ClangASTContext in order to get the
proper llvm fltSemantics for the type it needs so that it can dump
floats in a more precise way. However, there's no reason that this
behavior needs to be specific ClangASTContext. Instead, I think it makes
sense to ask TypeSystems for the float semantics for a type of a given
size.
Differential Revision: https://reviews.llvm.org/D67239
llvm-svn: 371258

[test] Add a FIXME test for stop-command-source-on-error
Modifying the interpreter settings is tricky because they don't take 
effect until we create a new command interpreter, which should be merely 
an implementation detail. This leads to confusing and unexpected 
scenarios.
This adds a test cases with FIXMEs for some of the odd scenarios I 
encountered. I didn't XFAIL the test because I don't think there's a way 
to get an unexpected PASS if any of the commands succeeds and splitting 
up the file in multiple tests seems excessive.
llvm-svn: 371259

[X86] Replace -mcpu with -mattr on some tests.
llvm-svn: 371260

[X86] Add a AVX512VBMI command line to min-legal-vector-width.ll. Always
enable fast-variable-shuffle
Trying to minimize the features we need to manipulate when this is
updated for D67259.
The VBMI is interesting because it enables some improved combining for
truncates.
I enabled fast-variable-shuffle because all the CPUs we're going to add
implicitly enable it. So they can share check lines.
llvm-svn: 371261

[IR] CallBrInst: scan+update arg list when indirect dest list changes
Summary: There's an unspoken invariant of callbr that the list of
BlockAddress Constants in the "function args" list match the BasicBlocks
in the
"other labels" list. (This invariant is being added to the LangRef in 
https://reviews.llvm.org/D67196).
When modifying the any of the indirect destinations of a callbr 
instruction (possible jump targets), we need to update the function 
arguments if the argument is a BlockAddress whose BasicBlock refers to 
the indirect destination BasicBlock being replaced.  Otherwise, many 
transforms that modify successors will end up violating that invariant. 
A recent change to the arm64 Linux kernel exposed this bug, which 
prevents the kernel from booting.
I considered maintaining a mapping from indirect destination BasicBlock 
to argument operand BlockAddress, but this ends up being a one to 
potentially many (though usually one) mapping.  Also, the list of 
arguments to a function (or more typically inline assembly) ends up 
being less than 10.  The implementation is significantly simpler to just 
rescan the full list of arguments. Because of the one to potentially 
many relationship, the full arg list must be scanned (we can't stop at 
the first instance).
Thanks to the following folks that reported the issue and helped debug 
it:
* Nathan Chancellor
* Will Deacon
* Andrew Murray
* Craig Topper
Link: https://bugs.llvm.org/show_bug.cgi?id=43222 Link:
https://github.com/ClangBuiltLinux/linux/issues/649 Link:
https://lists.infradead.org/pipermail/linux-arm-kernel/2019-September/678330.html
Reviewers: craig.topper, chandlerc
Reviewed By: craig.topper
Subscribers: void, javed.absar, kristof.beyls, hiraditya, llvm-commits,
nathanchance, srhines
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67252
llvm-svn: 371262

[ORC][RPC] Join server thread before checking condition in unit test.
Otherwise we have a race on the sent-messages count.
llvm-svn: 371263

[InstCombine] Refactor substitution of instruction in the parent BB
(NFC)
Add the new method `LibCallSimplifier::substituteInParent()` that calls
`LibCallSimplifier::replaceAllUsesWith()' and
`LibCallSimplifier::eraseFromParent()` back to back, simplifying the 
resulting code.
llvm-svn: 371264

[AArch64][GlobalISel] Enable the localizer for optimized builds.
Despite the fact that the localizer's original motivation was to fix
horrendous constant spilling at -O0, shortening live ranges still has
net benefits even with optimizations enabled.
On an -Os build of CTMark, doing this improves code size by 0.5%
geomean.
There are a few regressions, bullet increasing in size by 0.5%. One
example from bullet where code size increased slightly was due to
GlobalISel actually now generating the same code as SelectionDAG. So we
actually have an opportunity in future to implement better heuristics
for localization and therefore be
*better* than SDAG in some cases. In relation to other optimizations
though that one is relatively minor.
Differential Revision: https://reviews.llvm.org/D67303
llvm-svn: 371266

Update lld tests dynamic-list.s and symbol-override.s to use llvm-nm
The following tests failed on Windows bots due to nm not being 
available:
  lld/test/ELF/dynamic-list.s
 lld/test/ELF/symbol-override.s
llvm-svn: 371267

Use musttail for variadic method thunks when possible
This avoids cloning variadic virtual methods when the target supports 
musttail and the return type is not covariant. I think we never 
implemented this previously because it doesn't handle the covariant 
case. But, in the MS ABI, there are some cases where vtable thunks must 
be emitted even when the variadic method defintion is not available, so 
it looks like we need to implement this. Do it for both ABIs, since it's 
a nice size improvement and simplification for Itanium.
Emit an error when emitting thunks for variadic methods with a covariant 
return type. This case is essentially not implementable unless the ABI 
provides a way to perfectly forward variadic arguments without a tail 
call.
Fixes PR43173.
Differential Revision: https://reviews.llvm.org/D67028
llvm-svn: 371269

Implement demangling support for C++20 lambda expression extensions.
This implements demangling support for the mangling extensions specified 
in https://github.com/itanium-cxx-abi/cxx-abi/pull/85, much of which is 
implemented in Clang r359967 and r371004.
Specifically, this provides demangling for:
 * <template-param-decl> in <lambda-sig>
* <template-param> with non-zero level
* lambda-expression literals (not emitted by Clang yet)
* nullptr literals
* string literals
(The final two seem unrelated, but handling them was necessary in order 
to disambiguate between lambda expressions and the other forms of 
literal for which we have a type but no value.)
When demangling a <lambda-sig>, we form template parameters with no 
corresponding argument, so we cannot substitute in the argument in the 
demangling. Instead we invent synthetic names for the template 
parameters (eg, '[]<typename $T>($T *x)').
llvm-svn: 371273

Synchronize LLVM's copy of libc++abi's demangler with the libc++abi
version after r371273.
Also fix a minor issue in r371273 that only surfaced after template 
instantiation from LLVM's use of the demangler.
llvm-svn: 371274

[Sema] Diagnose default-initialization, destruction, and copying of
non-trivial C union types
This recommits r365985, which was reverted because it broke a few 
projects using unions containing non-trivial ObjC pointer fields in 
system headers. We now have a patch to fix the problem (see 
https://reviews.llvm.org/D65256).
Original commit message:
This patch diagnoses uses of non-trivial C unions and structs/unions 
containing non-trivial C unions in the following contexts, which require 
default-initialization, destruction, or copying of the union objects, 
instead of disallowing fields of non-trivial types in C unions, which is 
what we currently do:
- function parameters.
- function returns.
- assignments.
- compound literals.
- block captures except capturing of `__block` variables by non-escaping
blocks.
- local and global variable definitions.
- lvalue-to-rvalue conversions of volatile types.
See the discussion in https://reviews.llvm.org/D62988 for more
background.
rdar://problem/50679094
Differential Revision: https://reviews.llvm.org/D63753
llvm-svn: 371275

[Sema][ObjC] Mark C union fields that have non-trivial ObjC ownership
qualifications as unavailable if the union is declared in a system
header
r365985 stopped marking those fields as unavailable, which caused the 
union's NonTrivialToPrimitive* bits to be set to true. This patch 
restores the behavior prior to r365985, except that users can explicitly 
specify the ownership qualification of the field to instruct the 
compiler not to mark it as unavailable.
rdar://problem/53420753
Differential Revision: https://reviews.llvm.org/D65256
llvm-svn: 371276

Fix thunks.cpp test, don't FileCheck for anon namespace id
The anon namespace id is a hash of the main input path to the compiler, 
which varies in the test suite because the input path is absolute.
llvm-svn: 371277

[clang][DependencyFileGenerator] Fix missing -MT option handling
Targets in DependencyFileGenerator don't necessarily come from -MT
option.
Differential Revision: https://reviews.llvm.org/D67308
llvm-svn: 371279

Long timeouts for the MacOSX SystemRuntime plugins under ASAN; else
quick.
In April via r357829, Adrian unified timeouts across lldb and set the 
default value high so that we wouldn't get timeouts on ASAN bots that 
were running under load.
The library that the MacOSX SystemRuntime has functions that need to
take a lock, and if that lock is held already, those functions will
never complete; we're seeing the 15 second timeout being hit with
inferiors that are doing a lot of enqueuing and dequeuing of libdispatch
work items causing this deadlocking behavior.
This patch reverts to a very short timeout for these SystemRuntime 
function calls, given the behavior of this library that they are  
calling into.  When lldb is built with AddressSanitizer enabled, they
will use the default 15 second timeout.
tl;dr: this reverts to the previous timeouts for these SystemRuntime inf
func calls.
<rdar://problem/54538149> 
llvm-svn: 371280

[llvm-objcopy] Rename SHOffset (e_shoff) field to SHOff. NFC
Similar to D67254.
`struct Elf*_Shdr` has a field `sh_offset`. Rename SHOffset to SHOff to 
avoid confusion.
llvm-svn: 371281

[X86] Autogenerate fp128-libcalls.ll
llvm-svn: 371282

[X86] Add tests for fp128 frem, sqrt, sin, and cos.
llvm-svn: 371283

Change TargetLibraryInfo analysis passes to always require Function
Summary: This is the first change to enable the TLI to be built
per-function so that -fno-builtin* handling can be migrated to use
function attributes. See discussion on D61634 for background. This is an
enabler for fixing handling of these options for LTO, for example.
This change should not affect behavior, as the provided function is not 
yet used to build a specifically per-function TLI, but rather enables 
that migration.
Most of the changes were very mechanical, e.g. passing a Function to the 
legacy analysis pass's getTLI interface, or in Module level cases, 
adding a callback. This is similar to the way the per-function TTI 
analysis works.
There was one place where we were looking for builtins but not in the 
context of a specific function. See FindCXAAtExit in 
lib/Transforms/IPO/GlobalOpt.cpp. I'm somewhat concerned my workaround 
could provide the wrong behavior in some corner cases. Suggestions 
welcome.
Reviewers: chandlerc, hfinkel
Subscribers: arsenm, dschuff, jvesely, nhaehnle, mehdi_amini,
javed.absar, sbc100, jgravelle-google, eraman, aheejin, steven_wu,
george.burgess.iv, dexonsmith, jfb, asbirlea, gchatelet, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66428
llvm-svn: 371284

Remove stale TLI Module level pass registration
Clang patch to adapt to LLVM changes in D66428 that make the TLI require
a Function. There is no longer a module-level TargetLibraryAnalysis, so
remove its registration
llvm-svn: 371285

[CodeGen] Fix typos to run tests. NFC.
llvm-svn: 371286

Revert [CodeGen] Fix typos to run tests. NFC.
This reverts r371286 (git commit
b38105bbd0f7dfef424a4f096aa6a6b7b467fe99)
r371286 caused build bots' failure. I'll check it.
llvm-svn: 371289

[git-llvm] Do not reinvent `@{upstream}`
Make `git-llvm` more robust when used with a nontrivial repository.
https://reviews.llvm.org/D67262
llvm-svn: 371290

[Attributor] ValueSimplify Abstract Attribute
Summary: This patch introduces initial `AAValueSimplify` which
simplifies a value in a context.
example
- (for function returned) If all the return values are the same and
constant, then we can replace callsite returned with the constant.
- If an internal function takes the same value(constant) as an argument
in the callsite, then we can replace the argument with that constant.
Reviewers: jdoerfert, sstefan1
Reviewed By: jdoerfert
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66967
llvm-svn: 371291

[ELF][test] Improve LTO tests
Add file-level comments Delete insignificant addresses to make them more
tolerant to layout changes Simplify test output
llvm-svn: 371292

Replicate the change "[Alignment][NFC] Use Align with
TargetLowering::setMinFunctionAlignment" on AVR to avoid a breakage. See
r371200 / https://reviews.llvm.org/D67229
llvm-svn: 371293

[SimplifyCFG] SpeculativelyExecuteBB(): It's SpeculatedInstructions, not
SpeculationCost
It counts the number of instructions we are ok speculating
(at most 1 there), not their cost, so rename accordingly.
llvm-svn: 371294

[SimplifyCFG][NFC] Regenerate merge-cond-stores* tests
llvm-svn: 371296

[SimplifyCFG][NFC] Show that we don't consider the cost when merging
cond stores
We count instruction count in each BB's separately, not their cost.
llvm-svn: 371297

[Attributor] Make unimplemented method pure virtual.
Otherwise the compiler mistakes it for a vtable anchor.
llvm-svn: 371298

[ELF][test] Improve tests
Add file-level comments Delete insignificant addresses to make them more
tolerant to layout changes Simplify test output
Delete weak-undef-val.s - covered by relocation-undefined-weak.s Delete
weak-undef-export.s - covered by additional test added to weak-undef.s 
Delete version-undef-sym.s - covered by undefined-versioned-symbol.s =>
version-symbol-undef.s Delete symbol-ordering-file2.s - covered by
symbol-ordering-file.s Delete gotpcrelx.s - covered by
gotpc-relax-und-dso.s => x86-64-gotpc-relax-und-dso.s
llvm-svn: 371299

[SimplifyCFG][NFC] Make merge-cond-stores-cost.ll X86-specific, and
rewrite it
We clearly perform store-merging, even though div is really costly.
llvm-svn: 371300

Fix MSVC "32-bit shift implicitly converted to 64 bits" warnings. NFCI.
llvm-svn: 371302

[DebugInfo] Pre-commit of test case for DW_OP_breg/DW_OP_fbreg folds
This currently triggers undefined behavior if executed with an ubsan
build. It is just a precommit of the test case to show that we got a
problem.
Fix is proposed in https://reviews.llvm.org/D67263 and plan is to commit
the fix directly after this patch.
llvm-svn: 371303

[DwarfExpression] Disallow some rewrites to avoid undefined behavior
Summary: The value operand in DW_OP_plus_uconst/DW_OP_constu value can
be large (it uses uint64_t as representation internally in LLVM). This
means that in the uint64_t to int conversions, previously done by
DwarfExpression::addMachineRegExpression, could lose information. Also,
the negation done in "-Offset" was undefined behavior in case Offset was
exactly INT_MIN.
To avoid the above problems, we now avoid transformation like
[Reg, DW_OP_plus_uconst, Offset] --> [DW_OP_breg, Offset] and
[Reg, DW_OP_constu, Offset, DW_OP_plus]  --> [DW_OP_breg, Offset] when
Offset > INT_MAX.
And we avoid to transform
[Reg, DW_OP_constu, Offset, DW_OP_minus] --> [DW_OP_breg,-Offset] when
Offset > INT_MAX+1.
The patch also adjusts DwarfCompileUnit::constructVariableDIEImpl to
make sure that "DW_OP_constu, Offset, DW_OP_minus" is used instead of
"DW_OP_plus_uconst, Offset" when creating DIExpressions with negative
frame index offsets.
Notice that this might just be the tip of the iceberg. There are lots of
fishy handling related to these constants. I think both 
DIExpression::appendOffset and DIExpression::extractIfOffset may trigger
undefined behavior for certain values.
Reviewers: sdesmalen, rnk, JDevlieghere
Reviewed By: JDevlieghere
Subscribers: jholewinski, aprantl, hiraditya, ychen, uabelho,
llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D67263
llvm-svn: 371304

[X86] Add test for PR43230; NFC
llvm-svn: 371305

[LVI] Look through extractvalue of insertvalue
This addresses the issue mentioned on D19867. When we simplify 
with.overflow instructions in CVP, we leave behind extractvalue of
insertvalue sequences that LVI no longer understands. This means that we
can not simplify any instructions based on the with.overflow anymore
(until some over pass like InstCombine cleans them up).
This patch extends LVI extractvalue handling by calling 
SimplifyExtractValueInst (which doesn't do anything more than constant
folding + looking through insertvalue) and using the block value of the
simplification.
A possible alternative would be to do something similar to 
SimplifyIndVars, where we instead directly try to replace extractvalue
users of the with.overflow. This would need some additional structural
changes to CVP, as it's currently not legal to remove anything but the
current instruction -- we'd have to introduce a worklist with
instructions scheduled for deletion or similar.
Differential Revision: https://reviews.llvm.org/D67035
llvm-svn: 371306

[X86] Fix pshuflw formation from repeated shuffle mask (PR43230)
Fix for https://bugs.llvm.org/show_bug.cgi?id=43230.
When creating PSHUFLW from a repeated shuffle mask, we have to apply the
checks to the repeated mask, not the original one. For the test case
from PR43230 the inspected part of the original mask is all undef.
Differential Revision: https://reviews.llvm.org/D67314
llvm-svn: 371307

[Intrinsic] Add the llvm.umul.fix.sat intrinsic
Summary: Add an intrinsic that takes 2 unsigned integers with the scale
of them provided as the third argument and performs fixed point
multiplication on them. The result is saturated and clamped between the
largest and smallest representable values of the first 2 operands.
This is a part of implementing fixed point arithmetic in clang where
some of the more complex operations will be implemented as intrinsics.
Patch by: leonardchan, bjope
Reviewers: RKSimon, craig.topper, bevinh, leonardchan, lebedev.ri,
spatel
Reviewed By: leonardchan
Subscribers: ychen, wuzish, nemanjai, MaskRay, jsji, jdoerfert, Ka-Ka,
hiraditya, rjmccall, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D57836
llvm-svn: 371308

[CodeGen] Handle SMULFIXSAT with scale zero in
TargetLowering::expandFixedPointMul
Summary: Normally TargetLowering::expandFixedPointMul would handle 
SMULFIXSAT with scale zero by using an SMULO to compute the product and
determine if saturation is needed (if overflow happened). But if SMULO
isn't custom/legal it falls through and uses the same technique, using
MULHS/SMUL_LOHI, as used for non-zero scales.
Problem was that when checking for overflow (handling saturation) when
not using MULO we did not expect to find a zero scale. So we ended up in
an assertion when doing
 APInt::getLowBitsSet(VTSize, Scale - 1)
This patch fixes the problem by adding a new special case for how
saturation is computed when scale is zero.
Reviewers: RKSimon, bevinh, leonardchan, spatel
Reviewed By: RKSimon
Subscribers: wuzish, nemanjai, hiraditya, MaskRay, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67071
llvm-svn: 371309

[SimplifyCFG][NFC] Autogenerate two tests
llvm-svn: 371310

[SimplifyCFG][NFC] Autogenerate PhiEliminate3.ll
llvm-svn: 371311

[ELF][MC] Set types of aliases of IFunc to STT_GNU_IFUNC
```
.type  foo,@gnu_indirect_function
.set   foo,foo_resolver
.set foo2,foo
.set foo3,foo2
```
The types of foo2 and foo3 should be STT_GNU_IFUNC, but we currently 
resolve them to the type of foo_resolver. This patch fixes it.
Differential Revision: https://reviews.llvm.org/D67206 Patch by Senran
Zhang
llvm-svn: 371312

[mips] Make another set of test cases more tolerant to exact symbol
addresses. NFC
llvm-svn: 371313

[X86][AVX] Add 'f5' v4f64 shuffle test mentioned in D66004
llvm-svn: 371314

[X86] Avoid uses of getZextValue(). NFCI.
Use getAPIntValue() directly - this is mainly a best practice style
issue to help prevent fuzz tests blowing up when a i12345 (or whatever)
is generated.
Use getConstantOperandVal/getConstantOperandAPInt wrappers where
possible.
llvm-svn: 371315

[mips] Follow-up to r371313 - fix failed test case. NFC
llvm-svn: 371316

Fix typo. NFCI
llvm-svn: 371317

[llvm-nm] - Fix a bug and unbreak ASan BB.
BB:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/13820/steps/check-llvm%20asan/logs/stdio
rL371074 revealed a bug in llvm-nm.
This patch fixes it.
llvm-svn: 371318

[X86] Add prefer-128-bit subtarget feature.
Summary: Similar to the previous prefer-256-bit flag. We might want to 
enable this by default some CPUs. This just starts the initial work to
implement and prove that it effects TTI's vector width.
Reviewers: RKSimon, echristo, spatel, atdt
Reviewed By: RKSimon
Subscribers: lebedev.ri, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67311
llvm-svn: 371319

Fixes an assertion while instantiating a template with an incomplete
typo-corrected type.
Fixes PR35682. When a template in instantiated with an incomplete typo
corrected type an assertion can trigger if the -ferror-limit is used to
reduce the number of errors.
Patch by Mark de Wever.
llvm-svn: 371320

[aarch64] Add combine patterns for fp16 fmla
This patch enables generation of fused multiply add/sub for instructions
operating on fp16. Tested on aarch64-linux.
Differential Revision: https://reviews.llvm.org/D67297
llvm-svn: 371321

[X86] Add broadcast load unfolding tests for FMA instructions.
llvm-svn: 371322

[X86] Add support for unfold broadcast loads from FMA instructions.
llvm-svn: 371323

Remove ::gets for FreeBSD 13 and later
Summary: In https://svnweb.freebsd.org/changeset/base/351659 @emaste
removed gets() from FreeBSD 13's libc, and our copies of libc++ and
libstdc++.  In that change, the declarations were simply deleted, but I
would like to propose this conditional test instead.
Reviewers: EricWF, mclow.lists, emaste
Reviewed By: mclow.lists
Subscribers: krytarowski, christof, ldionne, emaste, libcxx-commits
Differential Revision: https://reviews.llvm.org/D67316
llvm-svn: 371324

[X86] Make getZeroVector return floating point vectors in their native
type on SSE2 and later.
isel used to require zero vectors to be canonicalized to a single type
to minimize the number of patterns needed to match. This is
no longer required.
I plan to do this to integers too, but floating point was simpler to
start with. Integer has a complication where v32i16/v64i8 aren't legal
when the other 512-bit integer types are.
llvm-svn: 371325

[NewPM][Sancov] Create the Sancov Pass after building the pipelines
We're running into linker errors from missing sancov sections:
``` ld.lld: error: relocation refers to a discarded section:
__sancov_guards
>>> defined in
user-arm64-ubsan-sancov-full.shlib/obj/third_party/ulib/scudo/scudo.wrappers_c.cc.o
>>> referenced by common.h:26
(../../zircon/third_party/ulib/scudo/common.h:26)
... many other references
```
I believe this is due to a pass in the default pipeline that somehow
discards these sections. The ModuleSanitizerCoveragePass was initially
added at the start of the pipeline. This now adds it to the end of the
pipeline for optimized and unoptimized builds.
Differential Revision: https://reviews.llvm.org/D67323
llvm-svn: 371326

[StackMap] Current stackmap version should be 3. NFC.
llvm-svn: 371327

[X86][SSE] Add support for <64 x i1> bool reduction
This generalizes the existing <32 x i1> pre-AVX2 split code to support
reductions from <64 x i1> as well, we can probably generalize to any
larger pow2 case in the future if the (unlikely) need ever arises.
We still need to tweak combineBitcastvxi1 to improve AVX512F codegen as
its assumes vXi1 types should be handled on the mask registers even when
they aren't legal.
Differential Revision: https://reviews.llvm.org/D67070
llvm-svn: 371328

[X86] Add test case for PR32546
llvm-svn: 371329

[X86][SSE] Fix out of range shift introduced in D67070/rL371328
Use APInt to create the comparison mask instead.
llvm-svn: 371330

[ARM] Remove declaration of unimplemented function. NFC.
llvm-svn: 371331

[NFC] Make the describeLoadedValue() hook return machine operand objects
Summary: This changes the ParamLoadedValue pair which the
describeLoadedValue() hook returns so that MachineOperand objects are
returned instead of pointers.
When describing call site values we may need to describe operands which 
are not part of the instruction. One such example is zero-materializing 
XORs on x86, which I have implemented support for in a child revision. 
Instead of having to return a pointer to an operand stored somewhere 
outside the instruction, start returning objects directly instead, as 
that simplifies the code.
The MachineOperand class only holds POD members, and on x86-64 it is 32 
bytes large. That combined with copy elision means that the overhead of 
returning a machine operand object from the hook does not become very 
large.
I benchmarked this on a 8-thread i7-8650U machine with 32 GB RAM. The 
benchmark consisted of building a clang 8.0 binary configured with:
  -DCMAKE_BUILD_TYPE=RelWithDebInfo \
 -DLLVM_TARGETS_TO_BUILD=X86 \
 -DLLVM_USE_SANITIZER=Address \
 -DCMAKE_CXX_FLAGS="-Xclang -femit-debug-entry-values -stdlib=libc++"
The average wall clock time increased by 4 seconds, from 62:05 to 62:09,
which is an 0.1% increase.
Reviewers: aprantl, vsk, djtodoro, NikolaPrica
Reviewed By: vsk
Subscribers: hiraditya, ychen, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D67261
llvm-svn: 371332

[DebugInfo][X86] Describe call site values for zero-valued imms
Summary: Add zero-materializing XORs to X86's describeLoadedValue() hook
in order to produce call site values.
I have had to change the defs logic in collectCallSiteParameters() a bit 
to be able to describe the XORs. The XORs implicitly define $eflags, 
which would cause them to never be considered, due to a guard condition 
that I->getNumDefs() is one. I have changed that condition so that we 
now only consider instructions where a forwarded register overlaps with 
the instruction's single explicit define. We still need to collect the
implicit defines of other forwarded registers to remove them from the
work list. I'm not sure how to move towards supporting instructions with
multiple explicit defines, cases where forwarded register are implicitly
defined, and/or cases where an instruction produces values for multiple
forwarded registers. Perhaps the describeLoadedValue() hook should take
a register argument, and we then leave it up to the hook to describe the
loaded value in that register? I have not yet encountered a situation
where that would be necessary though.
Reviewers: aprantl, vsk, djtodoro, NikolaPrica
Reviewed By: vsk
Subscribers: ychen, hiraditya, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D67225
llvm-svn: 371333

Do not intercept malloc_usable_size on NetBSD
llvm-svn: 371334

Enable leak-detection for NetBSD/amd64 in test/asan
llvm-svn: 371335

[ASan] Only run dlopen-mixed-c-cxx.c with static runtime
This is what the original bug (http://llvm.org/PR39641) and the fix in
https://reviews.llvm.org/D63877 have been about. With the dynamic
runtime the test only passes when the asan library is linked against
libstdc++: In contrast to libc++abi, it does not implement
__cxa_rethrow_primary_exception so the regex matches the line saying
that asan cannot intercept this function. Indeed, there is no message
that the runtime failed to intercept  __cxa_throw.
Differential Revision: https://reviews.llvm.org/D67298
llvm-svn: 371336

Stop marking 5 ASan tests as failing on NetBSD/i386
Unexpected Passing Tests (4):
   AddressSanitizer-i386-netbsd :: TestCases/Posix/coverage-reset.cpp
   AddressSanitizer-i386-netbsd :: TestCases/Posix/coverage.cpp
   AddressSanitizer-i386-netbsd ::
TestCases/Posix/interception-in-shared-lib-test.cpp
   AddressSanitizer-i386-netbsd :: TestCases/suppressions-library.cpp
llvm-svn: 371337

Enable LSan tests for NetBSD/i386
llvm-svn: 371338

[NFC][InstSimplify] Some tests for dropping null check after
uadd.with.overflow of non-null (PR43246)
https://rise4fun.com/Alive/WRzq
Name: C <= Y && Y != 0  -->  C <= Y  iff C != 0 Pre: C != 0
 %y_is_nonnull = icmp ne i64 %y, 0
 %no_overflow = icmp ule i64 C, %y
 %r = and i1 %y_is_nonnull, %no_overflow
=>
 %r = %no_overflow
Name: C <= Y || Y != 0  -->  Y != 0  iff C != 0 Pre: C != 0
 %y_is_nonnull = icmp ne i64 %y, 0
 %no_overflow = icmp ule i64 C, %y
 %r = or i1 %y_is_nonnull, %no_overflow
=>
 %r = %y_is_nonnull
Name: C > Y || Y == 0  -->  C > Y  iff C != 0 Pre: C != 0
 %y_is_null = icmp eq i64 %y, 0
 %overflow = icmp ugt i64 C, %y
 %r = or i1 %y_is_null, %overflow
=>
 %r = %overflow
Name: C > Y && Y == 0  -->  Y == 0  iff C != 0 Pre: C != 0
 %y_is_null = icmp eq i64 %y, 0
 %overflow = icmp ugt i64 C, %y
 %r = and i1 %y_is_null, %overflow
=>
 %r = %y_is_null
https://bugs.llvm.org/show_bug.cgi?id=43246
llvm-svn: 371339

[InstCombine] fold extract+insert into identity shuffle
This is similar to the existing fold for splats added with: rL365379
If we can adjust the shuffle mask to include another element in an
identity mask (if it changes vector length, that's an extract/insert
subvector operation in the backend), then that can eliminate
extractelement/insertelement pairs in IR.
All targets are expected to lower shuffles with identity masks 
efficiently.
llvm-svn: 371340

Move prop-sink branch to monorepo.
llvm-svn: 371342

[X86] Teach materializeVectorConstant to not call
getZeroVector/getOnesVector on the types we already have isel patterns
for.
llvm-svn: 371343

[DAGCombiner][X86][ARM] Teach visitMULO to fold multiplies with 0 to 0
and no carry.
I modified the ARM test to use two inputs instead of 0 so the test
hopefully still tests what was intended.
llvm-svn: 371344

[X86] Use DAG.getConstant instead of getZeroVector in combinePMULDQ.
getZeroVector canonicalizes the type to vXi32, but that's a legalization
action. We should use the most correct type if possible.
llvm-svn: 371345

[X86] X86DAGToDAGISel::combineIncDecVector(): call getSplatBuildVector()
manually
As reported in post-commit review of r370327, there is some case where
the code crashes.
As discussed with Craig Topper, the problem is that getConstant() 
internally calls getSplatBuildVector(), so we don't insert the constant
itself.
If we do that manually we're good.
llvm-svn: 371346

[InstCombine] add tests for icmp with srem operand; NFC
llvm-svn: 371348

[InstSimplify] simplifyUnsignedRangeCheck(): if we know that X != 0,
handle more cases (PR43246)
Summary: This is motivated by D67122 sanitizer check enhancement. That
patch seemingly worsens `-fsanitize=pointer-overflow` overhead from 25%
to 50%, which strongly implies missing folds.
In this particular case, given
``` char* test(char& base, unsigned long offset) {
 return &base + offset;
}
``` it will end up producing something like https://godbolt.org/z/LK5-iH 
which after optimizations reduces down to roughly
``` define i1 @t0(i8* nonnull %base, i64 %offset) {
 %base_int = ptrtoint i8* %base to i64
 %adjusted = add i64 %base_int, %offset
 %non_null_after_adjustment = icmp ne i64 %adjusted, 0
 %no_overflow_during_adjustment = icmp uge i64 %adjusted, %base_int
 %res = and i1 %non_null_after_adjustment,
%no_overflow_during_adjustment
 ret i1 %res
}
``` Without D67122 there was no `%non_null_after_adjustment`, and in
this particular case we can get rid of the overhead:
Here we add some offset to a non-null pointer, and check that the result
does not overflow and is not a null pointer. But since the base pointer
is already non-null, and we check for overflow, that overflow check will
already catch the null pointer, so the separate null check is redundant
and can be dropped.
Alive proofs: https://rise4fun.com/Alive/WRzq
There are more patterns of "unsigned-add-with-overflow", they are not
handled here, but this is the main pattern, that we currently consider
canonical, so it makes sense to handle it.
https://bugs.llvm.org/show_bug.cgi?id=43246
Reviewers: spatel, nikic, vsk
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits, reames
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67332
llvm-svn: 371349

[X86] Remove call to getZeroVector from materializeVectorConstant. Add
isel patterns for zero vectors with all types.
The change to avx512-vec-cmp.ll is a regression, but should be easy to
fix. It occurs because the getZeroVector call was canonicalizing both
sides to the same node, then SimplifySelect was able to simplify it. But
since only called getZeroVector on some VTs this isn't a robust way to
combine this.
The change to vector-shuffle-combining-ssse3.ll is more instructions,
but removes a constant pool load so its unclear if its a regression or
not.
llvm-svn: 371350

[X86] Add a hack to combineVSelectWithAllOnesOrZeros to turn selects
with two zero/undef vector inputs into an all zeroes vector.
If the two zero vectors have undefs in different places they won't get
combined by simplifySelect.
This fixes a regression from an earlier commit.
llvm-svn: 371351

[InstCombine][NFC] Some tests for usub overflow+nonzero check
improvement (PR43251)
https://rise4fun.com/Alive/kHq
https://bugs.llvm.org/show_bug.cgi?id=43251
llvm-svn: 371352

[X86][SSE] SimplifyDemandedVectorEltsForTargetNode - add faux shuffle
support.
This patch decodes target and faux shuffles with getTargetShuffleInputs
- a reduced version of resolveTargetShuffleInputs that doesn't resolve
SM_SentinelZero cases, so we can correctly remove zero vectors if they
aren't demanded.
llvm-svn: 371353

Enable LSan for NetBSD/i386 in test/asan/lit.cfg.py
llvm-svn: 371354

Relax opcode checks in test to check for only a number instead of a
specific number.
llvm-svn: 371355

[X86] Add avx and avx512f RUN lines to fp128-cast.ll
llvm-svn: 371356

[X86] Use xorps to create fp128 +0.0 constants.
This matches what we do for f32/f64. gcc also does this for fp128.
llvm-svn: 371357

[X86] Add test cases for fptoui/fptosi/sitofp/uitofp between fp128 and
i128.
llvm-svn: 371358

[MachineCopyPropagation] Remove redundant copies after TailDup via
machine-cp
Summary: After tailduplication, we have redundant copies. We can remove
these copies in machine-cp if it's safe to, i.e.
```
$reg0 = OP ...
... <<< No read or clobber of $reg0 and $reg1
$reg1 = COPY $reg0 <<< $reg0 is killed
...
<RET>
``` will be transformed to
```
$reg1 = OP ...
...
<RET>
```
Differential Revision: https://reviews.llvm.org/D65267
llvm-svn: 371359

[X86] Add fp128 test cases for ceil/floor/trunc/nearbyint/rint/round
libcalls.
llvm-svn: 371360

[ELF][test] Improve and reorganize another set of tests
Add file-level comments Replace trivial Input/*.s with echo ... |
llvm-mc Delete insignificant addresses to make them more tolerant to
layout changes Simplify test output
Merge merge-section-types.s into compatible-section-types.s and add a
missed case Merge gnu-ifunc-gotpcrel.s (added in D19517) into
gnu-ifunc-dso.s (added in D35119) and add missed cases Delete
typed-undef.s - covered by executable-undefined-ignoreall.s Delete
emit-relocs-shared.s - covered by emit-relocs-merge.s
Replace copy-rel-pie.s and copy-rel-pie2.s with canonical-plt-pcrel.s,
canonical-plt-symbolic.s and copy-rel.s: add -no-pie cases. add a case
that a canonical PLT can be created for STT_GNU_IFUNC. The logic in
Symbols.h was untested:
  // ctor of SharedSymbol
 if (this->type == llvm::ELF::STT_GNU_IFUNC)
   this->type = llvm::ELF::STT_FUNC;
llvm-svn: 371361

[X86] Add broadcast load unfolding tests for vmaxps/pd and vminps/pd
llvm-svn: 371362

[X86] Add broadcast load unfolding support for VMAXPS/PD and VMINPS/PD.
llvm-svn: 371363

AMDGPU: Remove pointless wrapper nodes for init.exec intrinsics
llvm-svn: 371364

[X86] Add broadcast load unfolding tests for smin/umin/smax/smin.
llvm-svn: 371365

[X86] Add broadcast load unfold support for smin/umin/smax/umax.
llvm-svn: 371366

[X86] Add broadcast load unfolding tests for
vpcmpeq/vpcmpgt/vpcmp/vpcmpu.
llvm-svn: 371367

[X86] Add broadcast load unfolding support for
vpcmpeq/vpcmpgt/vpcmp/vpcmpu.
llvm-svn: 371368

[SystemZ]  NFC: use clearRegisterDeads() in SystemZElimCompare.cpp
This is simpler than using findRegisterDefOperandIdx() + setIsDead().
Review: Ulrich Weigand. llvm-svn: 371369

[ARM][ParallelDSP] Fix for sext input
The incoming accumulator value can be discovered through a sext, in 
which case there will be a mismatch between the input and the result. So
sign extend the accumulator input if we're performing a 64-bit mac.
Differential Revision: https://reviews.llvm.org/D67220
llvm-svn: 371370

[clangd] Improve output of semantic highlighting tests in case of
failures
Summary: Instead of matching lists of highlightings, we annotate input
code with resulting highlightings and diff it against the expected
annotated input.
In case of failures, this produces much nicer output in form of
text-based diffs.
Reviewers: hokein
Reviewed By: hokein
Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67274
llvm-svn: 371373

[ARM][MVE] Decoding of uqrshl and sqrshl accepts unpredictable encodings
Specify the Unpredictable bits, and return softfails when appropriate.
Patch by Mark Murray!
Differential revision: https://reviews.llvm.org/D66939
llvm-svn: 371374

[clangd] Replace HighlightingKind::NumKinds with LastKind. NFC
Summary: The latter simplifies the client code by avoiding the need to
handle it as a separate case statement.
Reviewers: hokein
Reviewed By: hokein
Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67277
llvm-svn: 371375

[clangd] Highlight typedefs to template parameters as template
parameters
Summary: Template parameters were handled outside `addType`, this led to
lack of highlightings for typedefs to template types.
This was never desirable, we want to highlight our typedefs as their
underlying type. Note that typedefs to more complicated types, like
pointers and references are still not highlighted.
Original patch by Johan Vikström.
Reviewers: hokein, jvikstrom
Reviewed By: hokein
Subscribers: nridge, javed.absar, kristof.beyls, MaskRay, jkorous,
arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D66516
llvm-svn: 371379

[lib/ObjectYAML] - Improve and cleanup error reporting in ELFState<ELFT>
class.
The aim of this patch is to refactor how we handle and report error.
I suggest to use the same approach we use in LLD: delayed error
reporting. For that I introduced 'HasError' flag which triggers when we
report an error. Now we do not exit instantly on any error. The benefits
are:
1) There are no more 'exit(1)' calls in the library code. 2) Code was
simplified significantly in a few places. 3) It is now possible to print
multiple errors instead of only one.
Also, I changed the messages to be lower case and removed a full stop.
Differential revision: https://reviews.llvm.org/D67182
llvm-svn: 371380

[yaml2obj] - Fix BB after r371380
Just a fix for an input file name.
llvm-svn: 371383

GlobalISel: add combiner to form indexed loads.
Loosely based on DAGCombiner version, but this part is slightly simpler
in GlobalIsel because all address calculation is performed by G_GEP.
That makes the inc/dec distinction moot so there's just pre/post to
think about.
No targets can handle it yet so testing is via a special flag that
overrides target hooks.
llvm-svn: 371384

GlobalISel: fix unused warnings in release builds.
llvm-svn: 371385

[ARM] Prevent generating NEON stack accesses under MVE.
We should not be generating Neon stack loads/stores even for these large 
registers.
No test here because my understanding is we will only generate these
QQPR regs for intrinsics and VLDn's. The tests will follow once those
are available.
Differential revision: https://reviews.llvm.org/D67169
llvm-svn: 371386

[AArch64][SVE] Implement abs and neg intrinsics
Summary: This patch implements two arithmetic intrinsics:
      * int_aarch64_sve_abs
     * int_aarch64_sve_neg
testing the support for scalable vector types in intrinsics added in
D65930.
Reviewed By: greened
Differential Revision: https://reviews.llvm.org/D65931
llvm-svn: 371388

[ELF][AArch64] Apply some NFC cleanups to AArch64ErrataFix.cpp
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D67310
llvm-svn: 371389

[clangd] Update clangd-vscode docs to be more user-focused.
Summary: Relegate "updating the extension" docs to a separate file.
Reviewers: hokein, kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67092
llvm-svn: 371390

[clangd] Support multifile edits as output of Tweaks
Summary: First patch for propogating multifile changes from tweak
outputs to LSP WorkspaceEdits.
Uses SM to convert tooling::Replacements to TextEdits. Errors out if
there are any inconsistencies between the draft version and the version
generated the edits.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D66637
llvm-svn: 371392

Revert rL371198 from llvm/trunk: [DFAPacketizer] Track resources for
packetized instructions
This patch allows the DFAPacketizer to be queried after a packet is
formed to work out which resources were allocated to the packetized
instructions.
This is particularly important for targets that do their own bundle
packing - it's not sufficient to know simply that instructions can share
a packet; which slots are used is also required for encoding.
This extends the emitter to emit a side-table containing resource usage
diffs for each state transition. The packetizer maintains a set of all
possible resource states in its current state. After packetization is
complete, all remaining resource states are possible packetization
strategies.
The sidetable is only ~500K for Hexagon, but the extra tracking is
disabled by default
(most uses of the packetizer like MachinePipeliner don't care and don't
need the extra maintained state).
Differential Revision: https://reviews.llvm.org/D66936
........ Reverted as this is causing "compiler out of heap space" errors
on MSVC 2017/19 NDEBUG builds
llvm-svn: 371393

[clang-doc] sys::fs::F_None -> OF_None. NFC
F_None, F_Text and F_Append are kept for compatibility.
llvm-svn: 371394

[ARM][MVE] VCTP instruction selection
Add codegen support for vctp{8,16,32}.
Differential Revision: https://reviews.llvm.org/D67344
llvm-svn: 371395

[clang-tidy] Fix bug in bugprone-use-after-move check
Summary: The bugprone-use-after-move check exhibits false positives for
certain uses of the C++17 if/switch init statements. These false
positives are caused by a bug in the ExprSequence calculations.
This revision adds tests for the false positives and fixes the
corresponding sequence calculation.
Reviewers: gribozavr
Subscribers: xazax.hun, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67292
llvm-svn: 371396

[Inliner][NFC] Make test less brittle.
Summary: This tests inlining size thresholds, but relies on the output
of running the full O2 pipeline, making it brittle against changes in
unrelated passes.
Only run the inlining pass and set thresholds on the test RUN line 
instead.
Found while investigating D60318.
Reviewers: RKSimon, qcolombet
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67349
llvm-svn: 371397

[ELF] nmagic or omagic: don't allocate PT_PHDR or PF_R PT_LOAD for the
!hasPhdrsCommands case
``` part.phdrs = script->hasPhdrsCommands() ? script->createPhdrs() :
createPhdrs(part);
```
createPhdrs() allocates a PT_PHDR and a PF_R PT_LOAD, which will be 
deleted later in LinkerScript::allocateHeaders, but leave a gap between 
the program headers and the first section. Don't allocate the segments 
to avoid the gap. PT_INTERP is likely not needed as well.
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D67324
llvm-svn: 371398

[DFAPacketizer] Reapply: Track resources for packetized instructions
Reapply with fix to reduce resources required by the compiler - use 
unsigned[2] instead of std::pair. This causes clang and gcc to compile 
the generated file multiple times faster, and hopefully will reduce the
resource requirements on Visual Studio also. This fix is a little ugly
but it's clearly the same issue the previous author of DFAPacketizer
faced (the previous tables use unsigned[2] rather uglily too).
This patch allows the DFAPacketizer to be queried after a packet is
formed to work out which resources were allocated to the packetized
instructions.
This is particularly important for targets that do their own bundle
packing - it's not sufficient to know simply that instructions can share
a packet; which slots are used is also required for encoding.
This extends the emitter to emit a side-table containing resource usage
diffs for each state transition. The packetizer maintains a set of all
possible resource states in its current state. After packetization is
complete, all remaining resource states are possible packetization
strategies.
The sidetable is only ~500K for Hexagon, but the extra tracking is
disabled by default
(most uses of the packetizer like MachinePipeliner don't care and don't
need the extra maintained state).
Differential Revision: https://reviews.llvm.org/D66936
llvm-svn: 371399

compiler-rt: use fp_t instead of long double, for consistency
Most builtins accepting or returning long double use the fp_t typedef. 
Change the remaining few cases to do so.
Differential Revision:	https://reviews.llvm.org/D35034
llvm-svn: 371400

[NFC][InstCombine] Fixup test i added in rL371352.
llvm-svn: 371401

[clangd] Add a new highlighting kind for typedefs
Summary: We still attempt to highlight them as underlying types, but
fallback to the generic 'typedef' highlighting kind if the underlying
type is too complicated.
Reviewers: hokein
Reviewed By: hokein
Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67290
llvm-svn: 371402

Merge note_ovl_builtin_candidate diagnostics; NFC
There is no difference between the unary and binary case, so merge them.
llvm-svn: 371403

AMDGPU/GlobalISel: Remove dead patterns
llvm-svn: 371404

[ARM] Remove some spurious MVE reduction instructions.
The family of 'dual-accumulating' vector multiply-add instructions
(VMLADAV, VMLALDAV and VRMLALDAVH) can all operate on both signed and 
unsigned integer types, and they all have an 'exchange' variant (with an
X in the name) that modifies which pairs of vector lanes in the two 
inputs are multiplied together. But there's a clause in the spec that 
says that the X variants //don't// operate on unsigned integer types, 
only signed. You can have X, or unsigned, or neither, but not both.
We didn't notice that clause when we implemented the MC support for 
these instructions, so LLVM believes that things like VMLADAVX.U8 do 
exist, contradicting the spec. Here I fix that by conditioning them out
in Tablegen.
In order to do that, I've reversed the nesting order of the Tablegen 
multiclasses for those instructions. Previously, the innermost 
multiclass generated the X and not-X variants, and the one outside that
generated the A and not-A variants. Now X is done by the outer 
multiclass, which allows me to bypass that one when I only want the two
not-X variants.
Changing the multiclass nesting order also changes the names of the 
instruction ids unless I make a special effort not to. I decided that 
while I was changing them anyway I'd make them look nicer; so now the 
instructions have names like MVE_VMLADAVs32 or MVE_VMLADAVaxs32, instead
of cumbersome _noacc_noexch suffixes.
The corresponding multiply-subtract instructions are unaffected. Those 
don't accept unsigned types at all, either in the spec or in LLVM.
Reviewers: ostannard, dmgreen
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67214
llvm-svn: 371405

AMDGPU/GlobalISel: Try generated matcher before add/sub code
This will allow optimization patterns which fold adds away to work.
llvm-svn: 371406

AMDGPU/GlobalISel: Legalize wavefrontsize intrinsic
llvm-svn: 371407

[clangd] Use pre-populated mappings for standard symbols
Summary: This takes ~5% of time when running clangd unit tests.
To achieve this, move mapping of system includes out of
CanonicalIncludes and into a separate class
Reviewers: sammccall, hokein
Reviewed By: sammccall
Subscribers: MaskRay, jkorous, arphaman, kadircet, jfb, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67172
llvm-svn: 371408

AMDGPU/GlobalISel: Use known bits for selection
llvm-svn: 371409

[NFC] Add aacps bitfields access test
llvm-svn: 371410

AMDGPU/GlobalISel: Fix reg bank for uniform LDS loads
The pointer is always a VGPR. Also fix hardcoding the pointer size to 
64.
llvm-svn: 371411

AMDGPU/GlobalISel: Select G_PTR_MASK
llvm-svn: 371412

AMDGPU: Remove code address space predicates
Fixes 8-byte, 8-byte aligned LDS loads. 16-byte case still broken due to
not be reported as legal.
llvm-svn: 371413

AMDGPU/GlobalISel: Fix regbankselect for uniform extloads
There are no scalar extloads.
llvm-svn: 371414

Fix typo in comment noticed in D60295. NFCI.
llvm-svn: 371415

AMDGPU/GlobalISel: Fix RegBankSelect for unaligned, uniform constant
loads
llvm-svn: 371416

LLDB - Simplify GetProgramFileSpec
Reviewers: zturner, emaste
Reviewed By: emaste
Differential Revision: https://reviews.llvm.org/D46518
llvm-svn: 371417

AMDGPU/GlobalISel: Select atomic loads
A new check for an explicitly atomic MMO is needed to avoid incorrectly
matching pattern for non-atomic loads
llvm-svn: 371418

[ARM] Fix loads and stores for predicate vectors
These predicate vectors can usually be loaded and stored with a single 
instruction, a VSTR_P0. However this instruction will store the entire
P0 predicate, 16 bits, zeroextended to 32bits. Each lane of the the 
v4i1/v8i1/v16i1 representing 4/2/1 bits.
As far as I understand, when llvm says "store this v4i1", it really does
need to store 4 bits (or 8, that being the size of a byte, with this
bottom 4 as the interesting bits). For example a bitcast from a v8i1 to
a i8 is defined as a store followed by a load, which is how the code is
expanded.
So this instead lowers the v4i1/v8i1 load/store through some shuffles to
get the bits into the correct positions. This, as you might imagine, is
not as efficient as a single instruction. But I believe it is needed for
correctness. v16i1 equally should not load/store 32bits, only storing
the 16bits of data. Stack loads/stores are still using the VSTR_P0 (as
can be seen by the test not changing). This is fine as they are
self-consistent, it is only "externally observable loads/stores" (from
our point of view) that need to be corrected.
Differential revision: https://reviews.llvm.org/D67085
llvm-svn: 371419

[yaml2obj] Simplify p_filesz/p_memsz computing
This fixes a bug as well. When "FileSize:" (p_filesz) is specified and 
different from the actual value, the following code probably should not 
use PHeader.p_filesz:
  if (SHeader->sh_offset == PHeader.p_offset + PHeader.p_filesz)
   PHeader.p_memsz += SHeader->sh_size;
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D67256
llvm-svn: 371420

Revert "[MachineCopyPropagation] Remove redundant copies after TailDup
via machine-cp"
This reverts commit 371359. I'm suspecting a miscompile, I posted a 
reproducer to https://reviews.llvm.org/D65267.
llvm-svn: 371421

[clangd] Attempt to fix failing Windows buildbots.
The assertion is failing on Windows, probably because path separator is
different.
For the failure see: 
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/28072/steps/test/logs/stdio
llvm-svn: 371422

AMDGPU/GlobalISel: Legalize G_BUILD_VECTOR_TRUNC
Treat this as legal on gfx9 since it can use S_PACK_* instructions for 
this.
This isn't used by anything yet. The same will probably apply to 16-bit
G_BUILD_VECTOR without the trunc.
llvm-svn: 371423

AMDGPU/GlobalISel: Implement LDS G_GLOBAL_VALUE
Handle the simple case that lowers to a constant.
llvm-svn: 371424

[GlobalISel][AArch64] Handle tail calls with non-void return types
Just return once you emit the call, which is exactly what SelectionDAG
does in this situation.
Update call-translator-tail-call.ll.
Also update dllimport.ll to show that we tail call here in GISel again.
Add
-verify-machineinstrs to the GISel line too, to defend against verifier 
failures.
Differential revision: https://reviews.llvm.org/D67282
llvm-svn: 371425

[SLP] add test for over-vectorization (PR33958); NFC
llvm-svn: 371426

AMDGPU: Move MnemonicAlias out of instruction def hierarchy
Unfortunately MnemonicAlias defines a "Predicates" field just like an 
instruction or pattern, with a somewhat different interpretation.
This ends up overriding the intended Predicates set by PredicateControl
on the pseudoinstruction defintions with an empty list. This allowed
incorrectly selecting instructions that should have been rejected due to
the SubtargetPredicate from patterns on the instruction definition.
This does remove the divergent predicate from the 64-bit shift patterns,
which were already not used for the 32-bit shift, so I'm not sure what
the point was. This also removes a second, redundant copy of the 64-bit
divergent patterns.
llvm-svn: 371427

[mips] Fix decoding of microMIPS JALX instruction
microMIPS jump and link exchange instruction stores a target in a 
26-bits field. Despite other microMIPS JAL instructions these bits are
target address shifted right 2 bits [1]. The patch fixes the JALX
instruction decoding and uses 2-bit shift.
[1] MIPS Architecture for Programmers Volume II-B: The microMIPS32
Instruction Set
Differential Revision: https://reviews.llvm.org/D67320
llvm-svn: 371428

[Remarks] Add parser for bitstream remarks
The bitstream remark serializer landed in r367372.
This adds a bitstream remark parser that parser bitstream remark files 
to llvm::remarks::Remark objects through the RemarkParser interface.
A few interesting things to point out:
* There are parsing helpers to parse the different types of blocks
* The main parsing helper allows us to parse remark metadata and open an 
external file containing the encoded remarks
* This adds a dependency from the Remarks library to the BitstreamReader 
library
* The testing strategy is to create a remark entry through YAML, parse 
it, serialize it to bitstream, parse that back and compare the objects.
* There are close to no tests for malformed bitstream remarks, due to 
the lack of textual format for the bitstream format.
* This adds a new C API for parsing bitstream remarks: 
LLVMRemarkParserCreateBitstream.
* This bumps the REMARKS_API_VERSION to 1.
Differential Revision: https://reviews.llvm.org/D67134
llvm-svn: 371429

[X86] Allow _MM_FROUND_CUR_DIRECTION and _MM_FROUND_NO_EXC to be used
together on instructions that only support SAE and not embedded
rounding.
Current for SAE instructions we only allow _MM_FROUND_CUR_DIRECTION(bit
2) or _MM_FROUND_NO_EXC(bit 3) to be used as the immediate passed to the
inrinsics. But these instructions don't perform rounding so
_MM_FROUND_CUR_DIRECTION is just sort of a default placeholder when you
don't want to suppress exceptions. Using _MM_FROUND_NO_EXC by itself is
really bit equivalent to (_MM_FROUND_NO_EXC | _MM_FROUND_TO_NEAREST_INT)
since _MM_FROUND_TO_NEAREST_INT is 0. Since we aren't rounding on these
instructions we should also accept (_MM_FROUND_CUR_DIRECTION |
_MM_FROUND_NO_EXC) as equivalent to (_MM_FROUND_NO_EXC). icc allows
this, but gcc does not.
Differential Revision: https://reviews.llvm.org/D67289
llvm-svn: 371430

[SelectionDAG] Remove ISD::FP_ROUND_INREG
I don't think anything in tree creates this node. So all of this code
appears to be dead.
Code coverage agrees 
http://lab.llvm.org:8080/coverage/coverage-reports/llvm/coverage/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp.html
Differential Revision: https://reviews.llvm.org/D67312
llvm-svn: 371431

AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics
This enables GlobalISel to handle various intrinsics. The custom node 
pattern will be ignored, and the intrinsic will work. This will also 
allow SelectionDAG to directly select the intrinsics, but as they are 
all custom lowered to the nodes, this ends up leaving dead code in the 
table.
Eventually either GlobalISel should add the equivalent of custom nodes 
equivalent, or intrinsics should be directly used. These each have 
different tradeoffs.
There are a few more to handle, but these are easy to handle ones. Some
others fail for other reasons.
llvm-svn: 371432

[x86] add test for false dependency with minsize (PR43239); NFC
llvm-svn: 371433

[IfConversion] Correctly handle cases where analyzeBranch fails.
If analyzeBranch fails, on some targets, the out parameters point to 
some blocks in the function. But we can't use that information, so make 
sure to clear it out.  (In some places in IfConversion, we assume that 
any block with a TrueBB is analyzable.)
The change to the testcase makes it trigger a bug on builds without this 
fix: IfConvertDiamond tries to perform a followup "merge" operation, 
which isn't legal, and we somehow end up with a branch to a deleted MBB. 
I'm not sure how this doesn't crash the compiler.
Differential Revision: https://reviews.llvm.org/D67306
llvm-svn: 371434

AMDGPU/GlobalISel: Select fmed3
llvm-svn: 371435

AMDGPU/GlobalISel: Select llvm.amdgcn.class
Also fixes missing SubtargetPredicate on f16 class instructions.
llvm-svn: 371436

[Driver] Add -static-openmp driver option
Summary: For Gnu, FreeBSD and NetBSD, this option forces linking with
the static OpenMP host runtime (similar to -static-libgcc and
-static-libstdcxx).
Android's NDK will start the shared OpenMP runtime in addition to the
static libomp.  In this scenario, the linker will prefer to use the
shared library by default.  Add this option to enable linking with the
static libomp.
Reviewers: Hahnfeld, danalbert, srhines, joerg, jdoerfert
Subscribers: guansong, cfe-commits
Tags: #clang
Fixes https://github.com/android-ndk/ndk/issues/1028
Differential Revision: https://reviews.llvm.org/D67200
llvm-svn: 371437

AMDGPU: Make VReg_1 size be 1
This was getting chosen as the preferred 32-bit register class based on
how TableGen selects subregister classes.
llvm-svn: 371438

[TSan] Add interceptors for mach_vm_[de]allocate
I verified that the test is red without the interceptors.
rdar://40334350
Reviewed By: kubamracek, vitalybuka
Differential Revision: https://reviews.llvm.org/D66616
llvm-svn: 371439

AMDGPU/GlobalISel: Legalize G_BUILD_VECTOR v2s16
Handle it the same way as G_BUILD_VECTOR_TRUNC. Arguably only 
G_BUILD_VECTOR_TRUNC should be legal for this, but G_BUILD_VECTOR will 
probably be more convenient in most cases.
llvm-svn: 371440

Introduce infrastructure for an incremental port of SelectionDAG atomic
load/store handling
This is the first patch in a large sequence. The eventual goal is to
have unordered atomic loads and stores - and possibly ordered atomics as
well - handled through the normal ISEL codepaths for loads and stores.
Today, there handled w/instances of AtomicSDNodes. The result of which
is that all transforms need to be duplicated to work for unordered
atomics. The benefit of the current design is that it's harder to
introduce a silent miscompile by adding an transform which forgets about
atomicity.  See the thread on llvm-dev titled "FYI: proposed changes to
atomic load/store in SelectionDAG" for further context.
Note that this patch is NFC unless the experimental flag is set.
The basic strategy I plan on taking is:
    introduce infrastructure and a flag for testing (this patch)
   Audit uses of isVolatile, and apply isAtomic conservatively*
   piecemeal conservative* update generic code and x86 backedge code in
individual reviews w/tests for cases which didn't check volatile, but
can be found with inspection
   flip the flag at the end (with minimal diffs)
   Work through todo list identified in (2) and (3) exposing performance
ops
(*) The "conservative" bit here is aimed at minimizing the number of
diffs involved in (4). Ideally, there'd be none. In practice, getting it
down to something reviewable by a human is the actual goal. Note that
there are (currently) no paths which produce LoadSDNode or StoreSDNode
with atomic MMOs, so we don't need to worry about preserving any
behaviour there.
We've taken a very similar strategy twice before with success - once at
IR level, and once at the MI level (post ISEL). 
Differential Revision: https://reviews.llvm.org/D66309
llvm-svn: 371441

[UBSan] Do not overwrite the default print_summary sanitizer option.
Summary: This option is true by default in sanitizer common. The default 
false value was added a while ago without any reasoning in 
https://github.com/llvm-mirror/compiler-rt/commit/524e934112a593ac081bf2b05aa0d60a67987f05
so, presumably it's safe to remove for consistency.
Reviewers: hctim, samsonov, morehouse, kcc, vitalybuka
Reviewed By: hctim, samsonov, vitalybuka
Subscribers: delcypher, #sanitizers, llvm-commits, kcc
Tags: #llvm, #sanitizers
Differential Revision: https://reviews.llvm.org/D67193
llvm-svn: 371442

[Remarks] Fix warning for uint8_t < 0 comparison
http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/19109/steps/build-stage1-compiler/logs/stdio
llvm-svn: 371443

[Driver] Handle default case in refactored addOpenMPRuntime
Summary: Appease failed builds (due to -Werror and -Wswitch) where
OMPRT_Unknown is not handled in the switch statement (even though it's
handled by the early exit).
This fixes -Wswitch triggered by r371442.
Reviewers: srhines, danalbert, jdoerfert
Subscribers: guansong, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67364
llvm-svn: 371444

[SDAG] Add a isSimple cover functon to MemSDNode, just as we have in
IR/MI [NFC]
Uses are in reviews D66322 and D66318.  Submitted separately to control
rebuild times.
llvm-svn: 371445

[TSan] Add AnnotateIgnoreReadsBegin declaration to tsan/test.h
Declare the family of AnnotateIgnore[Read,Write][Begin,End] TSan 
annotations in compiler-rt/test/tsan/test.h so that we don't have to 
declare them separately in every test that needs them.  Replace usages.
Leave usages that explicitly test the annotation mechanism:
 thread_end_with_ignore.cpp
 thread_end_with_ignore3.cpp
llvm-svn: 371446

Relax opcode checks in test to check for only a number instead of a
specific number.
llvm-svn: 371447

[Tests] Add anyextend tests for unordered atomics
Motivated by work on changing our representation of unordered atomics in
SelectionDAG, but as an aside, all our lowerings for O3 are terrible. 
Even the ones which ignore the atomicity.  
llvm-svn: 371449

[analyzer] NFC: Introduce sub-classes for path-sensitive and basic
reports.
Checkers are now required to specify whether they're creating a 
path-sensitive report or a path-insensitive report by constructing an 
object of the respective type.
This makes BugReporter more independent from the rest of the Static
Analyzer because all Analyzer-specific code is now in sub-classes.
Differential Revision: https://reviews.llvm.org/D66572
llvm-svn: 371450