SuccessChanges

Summary

  1. [VE] Support VE in libunwind (details)
  2. [ELF] Support R_PPC_ADDR24 (ba foo; bla foo) (details)
  3. [BasicAA] Move assumption tracking into AAQI (details)
  4. Reapply [BasicAA] Handle recursive queries more efficiently (details)
  5. [clang-format] Revert e9e6e3b34a8e (details)
  6. Reland [lldb][docs] Use sphinx instead of epydoc to generate LLDB's Python reference (details)
  7. [clang-format] PR48594 BraceWrapping: SplitEmptyRecord ignored for templates (details)
  8. [clangd] Use empty() instead of size()>0 (details)
  9. [clangd] Use !empty() instead of size()>0 (details)
  10. [InstSimplify] Add tests for x*C1/C2<=x (NFC) (details)
  11. [InstSimplify] Fold x*C1/C2 <= x (PR48744) (details)
  12. [lldb][docs] Cleanup the Python doc strings for SB API classes (details)
  13. [Tests] Add test for PR45691 (details)
  14. [InstCombine] Transform abs pattern using multiplication to abs intrinsic (PR45691) (details)
  15. [lldb][docs] Fix some RST formatting errors related to code examples. (details)
  16. [llvm] Use llvm::sort (NFC) (details)
  17. [IRBuilder] "Zero"-initialize SmallVector (NFC) (details)
  18. [TableGen] Drop redundant const from return types (NFC) (details)
  19. NFC: Minor cleanup of function calls (details)
  20. [SimplifyCFG] Add test for PR48778 (NFC) (details)
  21. [ValueTracking] Fix isSafeToSpeculativelyExecute for sdiv (PR48778) (details)
  22. [lldb] Skip TestPlatformProcessConnect on windows and darwin (details)
  23. Makefile.rules: Delete GCC 4.6 workaround (details)
  24. Fix openmp CMake build on non-Linux AArch64 systems. (details)
  25. [NFC] [TargetRegisterInfo] add one use check to lookThruCopyLike. (details)
  26. Makefile.rules: Make HOST_OS/OS simply expanded variable to avoid excess uname -s invocations (details)
  27. [JITLink][ELF] Skip DWARF sections in ELF objects. (details)
  28. [InstCombine] more tests for D94861 (NFC) (details)
  29. [PowerPC] [NFC] Add AIX triple to some regression tests (details)
  30. [Legalizer] Promote result type in expanding FP_TO_XINT (details)
  31. [test] Autogen a loop vectorizer test to make future changes visible (details)
  32. [test] pre commit a couple more tests for vectorizing multiple exit loops (details)
  33. [JITLink][ELF] New ELF skip-debug-sections test requires asserts. (details)
  34. [PowerPC] support register pressure reduction in machine combiner. (details)
  35. [clang-format] Add StatementAttributeLikeMacros option (details)
  36. [IR] Allow scalable vectors in structs to support intrinsics returning multiple values. (details)
  37. [RISCV] Use tail agnostic policy for instructions with tied defs if the use operand is IMPLICIT_DEF. (details)
  38. [lldb][docs] Resolve the remaining sphinx formatter warnings in the SB API docs (details)
  39. [Object, llvm-readelf] - Move the API for retrieving symbol versions to ELF.h (details)
  40. [clang-format] Fix documentation of bcc1dee600 (details)
  41. [lldb][docs] Use inline literals for code/paths instead of rendering it with the default role (details)
  42. [X86][SSE] isHorizontalBinOp - reuse any existing horizontal ops. (details)
  43. [RISCV] Add scalable vector truncate patterns (details)
  44. [DAG] SimplifyDemandedBits - use KnownBits comparisons to remove ISD::UMIN/UMAX ops (details)
  45. [mlir] Fix cross-compilation (Linalg ODS gen) (details)
  46. Revert "[PowerPC] support register pressure reduction in machine combiner." (details)
  47. [VectorUtils] Do not try to add indices matching tombstone/empty values. (details)
  48. Revert "[OpenMP] Added the support for hidden helper task in RTL" (details)
  49. [AMDGPU][MC][GFX10] Improved dpp8 errors handling (details)
  50. [SystemZ][z/OS] Fix No such file or directory expression error matching in lit tests (details)
  51. [Statepoint] Handle `undef` operands in statepoint. (details)
  52. [Doc] Fix example in codegen doc. (details)
  53. [NFC]Migrate VectorCombine.cpp to use InstructionCost (details)
  54. [InferAttrs] Mark some library functions as willreturn. (details)
  55. [PowerPC][AIX]Do not emit xxspltd mnemonic on AIX. (details)
  56. [CSInfo][MIPS] Update CSInfo in delay slot filler (details)
  57. [SLP] reduce opcode API dependency in reduction cost calc; NFC (details)
  58. [SLP] rename reduction query for min/max ops; NFC (details)
  59. [AMDGPU][MC] Refactored parsing of dpp ctrl (details)
  60. [LoopRotate] Precommit test for prepare-for-lto handling. (details)
  61. Fix for sanitizer issue in 55c557a (details)
  62. [X86][AVX] IsElementEquivalent - add matchShuffleWithUNPCK + VBROADCAST/VBROADCAST_LOAD handling (details)
  63. [WebAssembly] Add support for table linking to wasm-ld (details)
  64. [WebAssembly] MC layer writes table symbols to object files (details)
  65. [AArch64] Further restricts when a dup(*ext) can be rearranged (details)
  66. Reland "[AArch64] Attempt to sink mul operands"" (details)
  67. [MLIR] Support checking if two FlatAffineConstraints are equal (details)
  68. [ARM] Update test target triple. NFC (details)
  69. [clangd] Derive new signals in CC from ASTSignals. (details)
  70. [Coroutine] Do not CoroElide if there are musttail calls (details)
  71. [ARM] Don't handle low overhead branches in AnalyzeBranch (details)
  72. [MLIR] NFC: simplify PresburgerSet::isEqual (details)
  73. [AArch64] Add test to check the attributes for some intrinsics. (details)
  74. [SLP] add more FMF tests for fmax/fmin reductions; NFC (details)
  75. [RISCV][NFC] Increase test coverage of Zbt extension (details)
  76. [AArch64] Make target intrinsics DefaultAttrIntrinsics. (details)
  77. [LLD][ELF][AArch64] Set _GLOBAL_OFFSET_TABLE_ at the start of .got (details)
  78. [AArch64] Revert back to Intrinsic<> for TME instructions. (details)
  79. [lldb][docs] Use 'any' as the default role in LLDB's sphinx project (details)
  80. [llvm] Populate std::vector at construction time (NFC) (details)
  81. [STLExtras] Add a default value to drop_begin (details)
  82. [llvm] Use the default value of drop_begin (NFC) (details)
  83. [clang] Allow LifetimeExtendedTemporary to have no access specifier (details)
  84. [RISCV] Add a test of vector sadd.overflow to demonstrate intrinsics with multiple scalable vector results. (details)
  85. Revert "[RISCV] Add a test of vector sadd.overflow to demonstrate intrinsics with multiple scalable vector results." (details)
  86. Recommit "[RISCV] Add a test of vector sadd.overflow to demonstrate intrinsics with multiple scalable vector results." (details)
  87. [libc++] Rename check-cxx-deps to cxx-test-depends for consistency (details)
  88. [NFC] Update some mlir python documentation. (details)
  89. [libc++] improve feature test macro script (details)
  90. NFC: Document current MLIR Python ODS conventions. (details)
  91. [OpenMP][NFC] Fix test (details)
  92. [PredicateInfo] Add more and/or tests (NFC) (details)
  93. [RISCV] Remove empty Sched instantiations from the end of InstAlias defs. NFCI (details)
  94. [SLP] match maxnum/minnum intrinsics as FP reduction ops (details)
  95. [libc++] NFCI: Refactor allocator_traits (details)
  96. [x86] add cast to avoid compile-time warning; NFC (details)
  97. [LoopInfo] Fix a typo in compareLoops (details)
  98. [SimplifyCFG] Update SimplifyBranchOnICmpChain to recognize select form of and/or (details)
  99. [OpenMP][Docs] Fix typos in FAQ (NFC) (details)
  100. Regenerate the feature test macro unit-tests. NFCI. (details)
  101. [InstCombine,InstSimplify] Optimize select followed by and/or/xor (details)
  102. Address unused variable warning (details)
  103. Revert "[NFC] [TargetRegisterInfo] add one use check to lookThruCopyLike." (details)
  104. [X86] Fix tile spill merge issue. (details)
  105. PR48763: Better handling for classes that inherit a default constructor. (details)
  106. [PowerPC] Sign extend comparison operand for signed atomic comparisons (details)
  107. [X86][AMX] Clear AMX lit test case. (details)
  108. DR2064: decltype(E) is only a dependent type if E is type-dependent, not (details)
  109. PR24076, PR33655, C++ CWG 1558: Consider the instantiation-dependence of (details)
  110. Following up on PR48517, fix handling of template arguments that refer (details)
  111. [c++20] P1907R1: Support for generalized non-type template arguments of scalar type. (details)
  112. [ORC] Move OrcError.h to include/llvm/ExecutionEngine/Orc/Shared. (details)
  113. [libc][NFC] Use ASSERT_EQ instead of EXPECT_EQ in fenv/exception_status_test (details)
  114. Fix a few GCC compiler warnings (NFC) (details)
  115. [libc][NFC][Obvious] Add a missing dep. (details)
  116. [NFC][AIX][XCOFF] Fix compile warning on strncpy (details)
  117. [RISCV] Add intrinsics for vector AMO operations (details)
  118. [libc++] [P0935] [C++20] Eradicating unnecessarily explicit default constructors from the standard library. (details)
  119. [libc][NFC] Remove dead code (details)
  120. [libc][NFC] remove dependency on non standard ssize_t (details)
  121. [clang][driver][NFC][obvious] Remove obsolete unistd.h include (details)
  122. [WebAssembly] call_indirect issues table number relocs (details)
  123. [WebAssembly] Change prefix on data segment flags to WASM_DATA_SEGMENT (details)
  124. [clang][cli] Parse Lang and CodeGen options separately (details)
  125. [X86][AMX] Fix the typo. (details)
  126. [NFC] Make remaining cost functions in LoopVectorize.cpp use InstructionCost (details)
  127. [llvm][nvptx] add atomicity to counter in ISelLowering (details)
  128. [ORC] Move LookupRequest from OrcShared to Orc. (details)
  129. [lit] Harmonize lit and llvm versionning (details)
  130. [llvm] Prevent infinite loop in InstCombine of select statements (details)
  131. [RISCV] Add scalable-vector integer extension patterns (details)
  132. [lldb] Fix crash in "help memory read" (details)
  133. [ARM][MachineOutliner] Add stack fixup feature (details)
  134. [lldb] Re-enable TestPlatformProcessConnect on macos (details)
  135. [LLDB] Add support to resize SVE registers at run-time (details)
  136. [LLDB] Test SVE dynamic resize with multiple threads (details)
  137. [LoopRotate] Add PrepareForLTO stage, avoid rotating with inline cands. (details)
  138. [AMDGPU] Simplify AMDGPUInstPrinter::printExpSrcN. NFC. (details)
  139. Revert 5238e7b302 "[InstCombine] Replace one-use select operand based on condition" (details)
  140. [X86][SSE] combineVectorSignBitsTruncation - fold trunc(srl(x,c)) -> packss(sra(x,c)) (details)
  141. [mlir] Add `complex.abs`, `complex.div` and `complex.mul` to ComplexOps. (details)
  142. [flang][driver] Add support for `-I` in the new driver (details)
  143. [DebugInfo][dexter] Add dexter tests for merged values (details)
  144. [AArch64][SVE]Add cost model for vector reduce for scalable vector (details)
  145. [SystemZ][z/OS] Fix No such file or directory expression error (details)
  146. [mlir] Clarify docs around LLVM dialect-compatible types (details)
  147. [clang] Check for nullptr when instantiating late attrs (details)
  148. [flang][driver] Add support for fixed form detection (details)
  149. [DebugInfo][dexter] Tweak dexter test for merged values (details)
  150. [OpenMP] libomp: cleanup parsing of OMP_ALLOCATOR env variable. (details)
  151. [flang][driver] Add standard macro predefinitions for compiler version (details)
  152. [llvm/Orc] Fix ExecutionEngine module build breakage (details)
  153. [ThinLTO] Also prune Thin-* files from the ThinLTO cache (details)
  154. [mlir][Affine] Revisit and simplify composeAffineMapAndOperands. (details)
  155. AArch64: add apple-a14 as a CPU (details)
  156. [mlir][spirv] Define spv.GLSL.Fma and add lowerings (details)
  157. [lldb] Fix two documentation typos (details)
  158. [X86] Regenerate fmin/fmax reduction tests (details)
  159. [Flang][OpenMP] Add semantic checks for OpenMP Workshare Construct (details)
  160. [LoopRotate] Calls not lowered to calls should not block rotation. (details)
  161. [libc++] Sync TEST_HAS_TIMESPEC_GET and _LIBCPP_HAS_TIMESPEC_GET on FreeBSD (details)
  162. [ARM] Expand add.sat/sub.sat cost checks. NFC (details)
  163. [WebAssembly][lld] Fix call-indirect.s test to validate (details)
  164. [clangd] Index local classes, virtual and overriding methods. (details)
  165. [CMake] Remove dead code setting policies to NEW (details)
  166. [PowerPC] Fix the check for the instruction using FRSP/XSRSP output register (details)
  167. [flang][directive] Get rid of flangClassValue in TableGen (details)
  168. [ARM] Add MVE add.sat costs (details)
  169. [RISCV] Extend RVV VType info with the type's AVL (NFC) (details)
  170. [OpenMP] Fix atomic entries for captured logical operation (details)
  171. [AMDGPU] Simplify test case for D94010 (details)
  172. [MLIR][SPIRV] Add `SignedOp` trait. (details)
  173. [AMDGPU] Fix test case for D94010 (details)
  174. [ValueTracking] Strengthen impliesPoison reasoning (details)
  175. [clang-format] Apply Allman style to lambdas (details)
  176. [mlir][python] Factor out standalone OpView._ods_build_default class method. (details)
  177. [flang][driver] Move isFixedFormSuffix and isFreeFormSuffix to flangFrontend (details)
  178. [lldb][docs] Add a doc page for enums and constants (details)
  179. [ARM] Expand vXi1 VSELECT's (details)
  180. [lldb][docs] Update .htaccess to redirect from old SB API documentation to new one (details)
  181. [Polly] Update isl to isl-0.23-61-g24e8cd12. (details)
  182. [SystemZ][z/OS] Fix Permission denied pattern matching (details)
  183. [RISCV] Add ISel patterns for scalable mask exts & truncs (details)
  184. [GlobalISel] Combine (a[0]) | (a[1] << k1) | ...|  (a[m] << kn) into a wide load (details)
  185. Fix buildbot after cfc60730179042a93cb9cb338982e71d20707a24 (details)
  186. [AMDGPU] Simpler names for arch-specific ttmp registers. NFC. (details)
  187. [clangd] Use ASTSignals in Heuristics CC Ranking. (details)
  188. [Hexagon] Fix segment start to adjust for gaps between segments (details)
  189. [www] Fix background color in table cell. (details)
  190. [noalias.decl] Look through llvm.experimental.noalias.scope.decl (details)
  191. Consider ASan messages interesting for creduce (details)
  192. Add bounds checking assertions to APValue, NFC (details)
  193. [libc++] Unbreak the debug mode (details)
  194. [libc++] Make LIBCXX_ENABLE_FILESYSTEM fully consistent (details)
  195. [Clang][OpenMP] Fixed an issue that clang crashed when compiling OpenMP program in device only mode without host IR (details)
  196. [RISCV] Add DAG combine to turn (setcc X, 1, setne) -> (setcc X, 0, seteq) if we can prove X is 0/1. (details)
  197. [wasm][LLD] Rename --lto-new-pass-manager to --no-lto-legacy-pass-manager (details)
  198. [InstCombine] Add additional tests for select operand replacement (NFC) (details)
  199. Reapply [InstCombine] Replace one-use select operand based on condition (details)
  200. [ScalarizeMaskedMemIntrin] Add missing dependency (details)
  201. [libc++][P1679] add string contains (details)
  202. [llvm] Protect signpost map with a mutex (details)
  203. [ELF] Improve R_PPC64_ADDR* relocation tests (details)
  204. [ELF] Error for out-of-range R_PPC64_ADDR16_HA, R_PPC64_ADDR16_HI and their friends (details)
  205. [ELF] Support R_PPC64_ADDR16_HIGH (details)
  206. [flang] Refine WhyNotModifiable() (details)
  207. Revert "[PDB] Defer relocating .debug$S until commit time and parallelize it" (details)
  208. [NFC] cleanup noalias2.ll test (details)
  209. Revert "[SLP]Merge reorder and reuse shuffles." (details)
  210. [NFC] Disallow unused prefixes under Other (details)
  211. [polly][NewPM][test] Fix polly tests under -enable-new-pm (details)
  212. [OPENMP]Do not use OMP_MAP_TARGET_PARAM for data movement directives. (details)
  213. [libc] Extend the current fenv functions to aarch64. (details)
  214. Ensure we don't strip the ConstantExpr carrying a non-type template (details)
  215. Revert "DR2064: decltype(E) is only a dependent type if E is type-dependent, not (details)
  216. [lld][WebAssembly] Don't defined indirect function table in relocatable output (details)
  217. [mlir][python] Add facility for extending generated python ODS. (details)
  218. [ASTMatchers] NFC Rearrange declarations to allow more arg adapting (details)
  219. [mlir][splitting std] move 2 more ops to `tensor` (details)
  220. [lldb/test] Skip TestProcessAttach: test_attach_to_process_from_different_dir_by_id on Windows (details)
  221. [ASTMatchers] Allow use of mapAnyOf in more contexts (details)
  222. [RISCV] Remove NotHasStdExtZbb predicate from zext.h/sext.b/sext.h InstAliases. NFC (details)
  223. [msabi] Mangle a template argument referring to array-to-pointer decay (details)
  224. Remove TypedMatcherOps from VariantValue (details)
  225. Remove unused functions. (details)
  226. Add API to retrieve a clade kind from ASTNodeKind (details)
  227. Revert "[WebAssembly] call_indirect issues table number relocs" (details)
  228. Implement constant folding for DivFOp (details)
  229. [SampleFDO] Add the support to split the function profiles with context into (details)
  230. Fix Wmissing-field-initializers warnings. (details)
  231. [xray] Honor xray-never function-instrument attribute (details)
  232. [gn build] (manually) port 933518fff82c (details)
  233. [gn build] fix libcxx gn file with libcxx_abi_namespace set (details)
  234. [mlir][python] Swap shape and element_type order for MemRefType. (details)
  235. [llvm-link] Improve link time for bitcode archives [NFC] (details)
  236. [llvm-profgen][NFC] Fix the incorrect computation of callsite sample count (details)
  237. Allow nonnull/align attribute to accept poison (details)
  238. [RISCV] refactor VPatBinary (NFC) (details)
  239. [SimplifyCFG] Reapply update_test_checks.py (NFC) (details)
  240. [llvm] Use llvm::find (NFC) (details)
  241. [llvm] Use llvm::any_of (NFC) (details)
  242. [llvm] Use llvm::all_of (NFC) (details)
  243. [mlir][sparse] add narrower choices for pointers/indices (details)
  244. [ELF][test] Improve --wrap tests (details)
  245. [ELF] --wrap: Produce a dynamic symbol for undefined __wrap_ (details)
  246. [RISCV] Implement vlseg intrinsics. (details)
  247. [X86] Add segment and address-size override prefixes (details)
  248. [lldb][docs] Remove -webkit-hyphens in table cells so that table widths are correct on Safari (details)
  249. [lldb][docs] Filter out 'thisown' attribute and inheritance boilerplate (details)
  250. [NFC][InstructionCost] Use InstructionCost in lib/Transforms/IPO/IROutliner.cpp (details)
  251. [lldb][docs] Expand CSS fix for LLDB doc tables (details)
  252. [GlobalISel] Add missing operand update when copy is required (details)
  253. [AMDGPU][MC] Add tfe disassembler support MIMG opcodes (details)
  254. [clang][cli] Port more options to new parsing system (details)
  255. [Test Commit] This is a test commit for https://reviews.llvm.org/D94904 (details)
  256. [clangd] Allow CDBs to have background work to block on. (details)
  257. [clangd] Move DirBasedCDB broadcasting onto its own thread. (details)
  258. [clangd] Remove the recovery-ast options. (details)
  259. [clangd] Retire some flags for uncontroversial, stable features. (details)
  260. [AMDGPU][GlobalISel] Avoid selecting S_PACK with constants (details)
  261. [Coroutine] Remain alignment information when merging frame variables (details)
  262. [PostRASched] Regenerate Whole Test with update_llc_test_checks.py (details)
  263. [mlir] Link mlir_runner_utils statically into cuda/rocm-runtime-wrappers. (details)
  264. Added check if there are regions that do not implement the RegionBranchOpInterface. (details)
  265. [LLD][ELF] Correct test temporary file paths (details)
  266. [LV] Add test cases with multiple exits which require versioning. (details)
  267. [llvm-symbolizer][doc] Reorder --relativenames in options list (details)
  268. [clangd] Fix division by zero when computing scores (details)
  269. [AArch64] Add missing "pauth" feature to the .arch_extension directive. (details)
  270. [AArch64] Add missing "flagm" feature to the .arch_extension directive. (details)
  271. Fix cuda-runner tests. (details)
  272. [clangd] Extend find-refs to include overrides. (details)
  273. [PM] Avoid duplicates in the Used/Preserved/Required sets (details)
  274. [SCEV] Add a test with wrong exit counts. (NFC) (details)
  275. [AArch64] Add support for the GNU ILP32 ABI (details)
  276. [TableGen] Improve algorithm for inheriting class template args and fields (details)
  277. [X86][AVX] Fold extract_subvector(VSRLI/VSHLI(x,32)) -> VSRLI/VSHLI(extract_subvector(x),32) (details)
  278. Revert "[TableGen] Improve algorithm for inheriting class template args and fields" (details)
  279. Revert "Following up on PR48517, fix handling of template arguments that refer" (details)
  280. [DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE (details)
  281. Make it possible to store a ASTNodeKind in VariantValue (details)
  282. [libc++] Split re.alg tests into locale-dependent and independent tests (details)
  283. [libomptarget][devicertl] Wrap source in declare target pragmas (details)
  284. Implement dynamic mapAnyOf in terms of ASTNodeKinds (details)
  285. Loop peeling: check that latch is conditional branch (details)
  286. [docs] Fix overly specific link to uploading patches on Phabricator (details)
  287. [SLP] move reduction createOp functions; NFC (details)
  288. [SLP] refactor more reduction functions; NFC (details)
  289. [SLP] reduce reduction code for checking vectorizable ops; NFC (details)
  290. [AMDGPU] pin lit test divergent-unswitch.ll to the old pass manager (details)
  291. [OpenMP][NVPTX] Replaced CUDA builtin vars with LLVM intrinsics (details)
  292. [mlir][Affine] Add support for multi-store producer fusion (details)
  293. [RISCV] Add way to mark CompressPats that should only be used for compressing. (details)
  294. Avoid unused variable warning in opt mode (details)
  295. [mlir] fix the rocm runtime wrapper to account for cuda / rocm api differences (details)
  296. [lldb/Commands] Refactor ProcessLaunchCommandOptions to use TableGen (NFC) (details)
  297. [PowerPC][Power10] Exploit splat instruction xxsplti32dx in Power10 (details)
  298. [MLIR][Standard] Add log1p operation to std (details)
  299. [AArch64] Fix -Wunused-but-set-variable in GCC -DLLVM_ENABLE_ASSERTIONS=off build (details)
  300. [X86][AVX] Handle vperm2x128 shuffling of a subvector splat. (details)
  301. [RISCV] Remove unnecessary APInt copy. NFC (details)
  302. [BuildLibcalls] Mark some libcalls with inaccessiblememonly and inaccessiblemem_or_argmemonly (details)
  303. [COFF] Use range for on relocations, NFC (details)
  304. Revert "[clang] Change builtin object size when subobject is invalid" (details)
  305. Revert "[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE" (details)
  306. [NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor (details)
  307. [flang] Fix ASSOCIATE statement name resolution (details)
  308. Revert "[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor" (details)
  309. [lld-macho][easy] Create group for LLD-specific CLI flags (details)
  310. [lld-macho] Run ObjCContractPass during LTO (details)
  311. [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets (details)
  312. [mlir][Linalg] NFC - getAssumedNonShapedOperands now returns OperandRange (details)
  313. [WebAssembly] Prototype new f64x2 conversions (details)
  314. [EXTINT][OMP] Fix _ExtInt type checking in device code (details)
  315. [flang][driver] Refactor one unit-test case to use fixtures (nfc) (details)
  316. [PredicateInfo] Generalize processing of conditions (details)
  317. [libomptarget][devicertl][nfc] Remove some cuda intrinsics, simplify (details)
  318. [COFF] Fix relocation offsets in pdb-file-statics test input (details)
  319. Revert "[lldb] Re-enable TestPlatformProcessConnect on macos" (details)
  320. [libomptarget][devicertl][nfc] Simplify target_atomic abstraction (details)
  321. [mlir][Linalg] NFC - Expose getSmallestBoundingIndex as an utility function (details)
  322. Reland "[PDB] Defer relocating .debug$S until commit time and parallelize it" (details)
  323. [PredicateInfo][SCCP][NewGVN] Add tests for logical and/or (NFC) (details)
  324. [lldb/Commands] Align process launch --plugin with process attach (NFC) (details)
  325. [PredicateInfo] Handle logical and/or (details)
  326. [mlir] Fix SubTensorInsertOp semantics (details)
  327. [mlir] Add ComplexDialect to SCF->GPU pass. (details)
  328. [mlir][Linalg] NFC - Fully compose map and operands when creating AffineMin in tiling. (details)
  329. [flang] Infrastructure improvements in utility routines (details)
  330. [CodeView] Emit function types in -gline-tables-only. (details)
  331. [OpenMP][NVPTX] Added forward declaration to pave the way for building deviceRTLs with OpenMP (details)
  332. [flang] Fix creation of deferred shape arrays by POINTER statement (details)
  333. [NFC] Move ImportedFunctionsInliningStatistics to Analysis (details)
  334. [gn build] Port 95ce32c7878d (details)
  335. [mlir:async] Fix data races in AsyncRuntime (details)
  336. Reland "[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor" (details)
  337. [hip] Fix `<complex>` compilation on Windows with VS2019. (details)
  338. [NFC][AMDGPU] Document target ID syntax for code object V2 to V3 (details)
  339. [mlir] NFC - Fix unused variable in non-debug mode (details)
  340. Makefile.rules: Avoid redundant .d generation (make restart) and inline archive rule to the only test (details)
  341. D94954: Fixes Snapdragon Kryo CPU core detection (details)
  342. [mlir][sparse] add asserts on reading in tensor data (details)
  343. Revert "[mlir][Affine] Add support for multi-store producer fusion" (details)
  344. [RISCV] Add addu.w and slliu.w test that uses getelementptr with zero extended indices. (details)
  345. [RISCV] Add another isel pattern for slliu.w. (details)
  346. [BuildLibcalls, Attrs] Support more variants of C++'s new, add attributes for C++'s delete (details)
  347. [libc][NFC] add "LlvmLibc" as a prefix to all test names (details)
  348. [libc][NFC][obvious] fix the names of MPFR tests (details)
  349. [NFC] Minor cleanup for ValueHandle code. (details)
  350. [mlir] Add an interface for Cast-Like operations (details)
  351. [mlir] Add a new builtin `unrealized_conversion_cast` operation (details)
  352. [mlir] Make MLIRContext::getOrLoadDialect(StringRef, TypeID, ...) public (details)
  353. [mlir][OpFormatGen] Fix incorrect kind used for RegionsDirective (details)
  354. [DAGCombiner] Precommit test case for D95086 (details)
  355. [Clang][OpenMP] Use `clang_cc1` test for `declare_target_device_only_compilation.cpp` (details)
  356. [lld-macho] Add dependency on ObjCARC to fix shared build (details)
  357. Fix a bug with setting breakpoints on C++11 inline initialization statements. (details)
  358. [MSan] Move origins for overlapped memory transfer (details)
  359. Use CXX_SOURCES and point to the right source file. (details)
  360. [dsymutil] Compare object modification times using second precision (details)
  361. [RISCV] Use update_llc_test_checks.py to regenerate check lines in vleff-rv32.ll and vleff-rv64.ll. (details)
  362. [lldb] Upstream eCore_arm_arm64e enum value in ArchSpec (details)
  363. [RISCV] Implement vsseg intrinsics. (details)
  364. [RISCV] Implement vlsseg intrinsics. (details)
  365. [RISCV] Implement vssseg intrinsics. (details)
  366. [X86] Add experimental option to separately tune alignment of innermost loops (details)
  367. [llvm] Construct SmallVector with iterator ranges (NFC) (details)
  368. [Transforms] Use llvm::append_range (NFC) (details)
  369. [llvm] Use hasSingleElement (NFC) (details)
  370. [IndirectFunctions] Skip propagating attributes to address taken functions (details)
  371. [yaml2obj/obj2yaml] - Improve dumping/creating of ELF versioning sections. (details)
  372. [X86][AMX] Fix tile config register spill issue. (details)
  373. [llvm-nm][ELF] - Make -D display symbol versions. (details)
  374. MCDwarf: Delete uneeded parameter (details)
  375. [mlir] Remove complex ops from Standard dialect. (details)
  376. [LoopUnswitch] Implement first version of partial unswitching. (details)
  377. [clangd] Fix a missing override keyword, NFC. (details)
  378. Revert "[X86][AMX] Fix tile config register spill issue." (details)
  379. [X86] Avoid a std::string copy by replacing auto with const auto&. NFC. (details)
  380. [DAG] CombineToPreIndexedLoadStore - use const APInt& for getAPIntValue(). NFCI. (details)
  381. MC: AArch64: Add support for gotpage_lo15 (details)
  382. [lldb][import-std-module] Do some basic file checks before trying to import a module (details)
  383. [lldb] Make TestBSDArchives a no-debug-info-test (details)
  384. Reland [lldb] Fix TestThreadStepOut.py after "Flush local value map on every instruction" (details)
  385. [DAG] SimplifyDemandedBits - correctly adjust truncated shift amount type (details)
  386. [X86][SSE] Add uitofp(trunc(and(lshr(x,c)))) vector test (details)
  387. Add log1p lowering from standard to NVVM intrinsics (details)
  388. [DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE (REAPPLIED). (details)
  389. Add log1p lowering from standard to ROCDL intrinsics (details)
  390. [MC] Use std::make_tuple to make some toolchains happy again (details)
  391. [InstCombine] avoid crashing on attribute propagation (details)
  392. [clang][AST] Add get functions for CXXFoldExpr paren locations. (details)
  393. [lldb][NFC] Fix build with GCC<6 (details)
  394. AMDGPU: Add occupancy to serialized MachineFunctionInfo (details)
  395. [OpenMP] Add support for mapping names in mapper API (details)
  396. [flang][driver] Make the driver report diagnostics from the prescanner (details)
  397. [ARM] Fix vector saddsat costs. (details)
  398. [AMDGPU] Implement mir parseCustomPseudoSourceValue (details)
  399. AArch64/GlobalISel: Factor out parametersInCSRMatch (details)
  400. [OpenMP][NVPTX] Added forward declaration for atomic operations (details)
  401. AMDGPU: Use more accurate fast f64 fdiv (details)
  402. AMDGPU: Remove v_rsq_f64 patterns (details)
  403. [AMDGPU][GlobalISel] Run SIAddImgInit (details)
  404. [mlir][SPIRV] Rename OpSpecConstantOperation -> OpSpecConstantOp (details)
  405. [mlir]][SPIRV] Define OrderedOp and UnorderedOp and add lowerings from Standard. (details)
  406. [RISCV] Make LMUL field in VTYPE continuous. (details)
  407. [flang][driver] Move fixed/free from detection out of FrontendAction API (details)
  408. [RISCV] Add new V instructions in v1.0-08a0b46. (details)
  409. [libc++] Use ioctl when available to get random_device entropy. (details)
  410. Revert "[AMDGPU] Implement mir parseCustomPseudoSourceValue" (details)
  411. [OpenMP] Add time profiling support in libomp (details)
  412. [RISCV] Update V instructions constraints to conform to v1.0 (details)
  413. [NFC][Doc] Mention SystemZ supports StackMap generation (details)
Commit 3cbd476c54886e8ebac64b4145d4517732a71023 by marukawa
[VE] Support VE in libunwind

Modify libunwind to support SjLj exception handling routines for VE.
In order to do that, we need to implement not only SjLj exception
handling routines but also a Registers_ve class.  This implementation
of Registers_ve is incomplete.  We will work on it later when we need
backtrace in libunwind.

Reviewed By: #libunwind, compnerd

Differential Revision: https://reviews.llvm.org/D94591
The file was modifiedlibunwind/include/libunwind.h
The file was modifiedlibunwind/src/libunwind.cpp
The file was modifiedlibunwind/src/Registers.hpp
The file was modifiedlibunwind/src/Unwind-sjlj.c
The file was modifiedlibunwind/include/__libunwind_config.h
Commit 3809f4ebabde98bfdc1fdcdad2963a874151820b by i
[ELF] Support R_PPC_ADDR24 (ba foo; bla foo)
The file was modifiedlld/ELF/Arch/PPC.cpp
The file was modifiedlld/test/ELF/ppc32-reloc-addr.s
Commit b1c2f1282a237e9bc60f1b0020bc7535ca019739 by nikita.ppv
[BasicAA] Move assumption tracking into AAQI

D91936 placed the tracking for the assumptions into BasicAA.
However, when recursing over phis, we may use fresh AAQI instances.
In this case AssumptionBasedResults from an inner AAQI can reesult
in a removal of an element from the outer AAQI.

To avoid this, move the tracking into AAQI. This generally makes
more sense, as the NoAlias assumptions themselves are also stored
in AAQI.

The test case only produces an assertion failure with D90094
reapplied. I think the issue exists independently of that change
as well, but I wasn't able to come up with a reproducer.
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
The file was modifiedllvm/include/llvm/Analysis/AliasAnalysis.h
The file was addedllvm/test/Transforms/MemCpyOpt/aa-recursion-assertion-failure.ll
The file was modifiedllvm/include/llvm/Analysis/BasicAliasAnalysis.h
Commit 0b84afa5fcb41429004db72a0588656a8d76bf48 by nikita.ppv
Reapply [BasicAA] Handle recursive queries more efficiently

There are no changes relative to the original commit. However, an issue
this exposed in BasicAA assumption tracking has been fixed in the
previous commit.

-----

An alias query currently works out roughly like this:

* Look up location pair in cache.
* Perform BasicAA logic (including cache lookup and insertion...)
* Perform a recursive query using BestAAResults.
   * Look up location pair in cache (and thus do not recurse into BasicAA)
   * Query all the other AA providers.
* Query all the other AA providers.

This is a lot of unnecessary work, all ultimately caused by the
BestAAResults query at the end of aliasCheck(). The reason we perform
it, is that aliasCheck() is getting called recursively, and we of
course want those recursive queries to also make use of other AA
providers, not just BasicAA. We can solve this by making the recursive
queries directly use BestAAResults (which will check both BasicAA
and other providers), rather than recursing into aliasCheck().

There are some tradeoffs:

* We can no longer pass through the precomputed underlying object
   to aliasCheck(). This is not a major concern, because nowadays
   getUnderlyingObject() is quite cheap.
* Results from other AA providers are no longer cached inside
   BasicAA. The way this worked was already a bit iffy, in that a
   result could be cached, but if it was MayAlias, we'd still end
   up re-querying other providers anyway. If we want to cache
   non-BasicAA results, we should do that in a more principled manner.

In any case, despite those tradeoffs, this works out to be a decent
compile-time improvment. I think it also simplifies the mental model
of how BasicAA works. It took me quite a while to fully understand
how these things interact.

Differential Revision: https://reviews.llvm.org/D90094
The file was modifiedllvm/include/llvm/Analysis/BasicAliasAnalysis.h
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
The file was modifiedllvm/lib/Analysis/GlobalsModRef.cpp
Commit 9af03864df746aa9a9cf3573da952ce6c5d902cd by mydeveloperday
[clang-format] Revert e9e6e3b34a8e

Reverting {D92753} due to issues with #pragma indentation in #ifdef/endif structure
The file was modifiedclang/lib/Format/UnwrappedLineParser.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/lib/Format/UnwrappedLineFormatter.cpp
The file was modifiedclang/include/clang/Format/Format.h
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
The file was modifiedclang/lib/Format/ContinuationIndenter.cpp
The file was modifiedclang/lib/Format/UnwrappedLineParser.h
Commit e7bc6c594b75602c23cb901f53b3a30d48e2ee78 by Raphael Isemann
Reland [lldb][docs] Use sphinx instead of epydoc to generate LLDB's Python reference

The build server should now have the missing dependencies.

Original summary:

Currently LLDB uses epydoc to generate the Python API reference for the website.
epydoc however is unmaintained since more than a decade and no longer works with
Python 3. Also whatever setup we had once for generating the documentation on
the website server no longer seems to work, so the current website documentation
has been stale since more than a year.

This patch replaces epydoc with sphinx and its automodapi plugin that can
generate Python API references. LLVM already uses sphinx for the rest of the
documentation, so this way we are more consistent with the rest of LLVM. The
only new dependency is the automodapi plugin for sphinx.

This patch effectively does the following things:
* Remove the epydoc code.
* Make a new dummy Python API page in our website that just calls the Sphinx
  command for generated the API documentation.
* Add a mock _lldb module that is only used when generating the Python API.
This way we don't have to build all of LLDB to generate the API reference.

Some notes:
* The long list of skips is necessary due to boilerplate functions that SWIG
  is generating. Sadly automodapi is not really scriptable from what I can see,
  so we have to blacklist this stuff manually.
* The .gitignore change because automodapi wants a subfolder of our
  documentation directory to place generated documentation files there. The path
  is also what is used on the website, so we can't really workaround this
  (without copying the whole `docs` dir somewhere else when we build).
* We have to use environment variables to pass our build path to our sphinx
  configuration. Sphinx doesn't support passing variables onto that script.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D94489
The file was addedlldb/docs/python_api.rst
The file was modified.gitignore
The file was modifiedllvm/cmake/modules/AddSphinxTarget.cmake
The file was addedlldb/docs/_lldb/__init__.py
The file was modifiedlldb/docs/CMakeLists.txt
The file was modifiedlldb/docs/conf.py
The file was modifiedlldb/docs/index.rst
Commit 00dc97f16708aad67834552285c0af01b37303d6 by mydeveloperday
[clang-format] PR48594 BraceWrapping: SplitEmptyRecord ignored for templates

https://bugs.llvm.org/show_bug.cgi?id=48594

Empty or small templates were not being treated the same way as small classes especially when SplitEmptyRecord was set to true

This revision aims to help this by identifying a case when we should try not to merge the lines together

Reviewed By: curdeius, JohelEGP

Differential Revision: https://reviews.llvm.org/D93839
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/unittests/Format/FormatTestCSharp.cpp
The file was modifiedclang/lib/Format/UnwrappedLineFormatter.cpp
Commit 0f9908a7c9c547f2675e00f88cc11ec02ca28e8d by usx
[clangd] Use empty() instead of size()>0
The file was modifiedclang-tools-extra/clangd/Quality.cpp
Commit 9abbc050974ff117b79e8e049c52c56db3f49aec by usx
[clangd] Use !empty() instead of size()>0
The file was modifiedclang-tools-extra/clangd/Quality.cpp
Commit 4bfbfb9bcb790931b97da972ff02865810f43ce8 by nikita.ppv
[InstSimplify] Add tests for x*C1/C2<=x (NFC)

Tests for PR48744.
The file was modifiedllvm/test/Transforms/InstSimplify/icmp.ll
Commit a13c0f62c38131ef2656b06de02d82110abaf272 by nikita.ppv
[InstSimplify] Fold x*C1/C2 <= x (PR48744)

We can fold x*C1/C2 <= x to true if C1 <= C2. This is valid even
if the multiplication is not nuw: https://alive2.llvm.org/ce/z/vULors

The multiplication or division can be replaced by shifts. We don't
handle the case where both are shifts, as that should get folded
away by InstCombine.
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/icmp.ll
Commit acdc74568927d47f94816e73b6e105c9460cc3e4 by Raphael Isemann
[lldb][docs] Cleanup the Python doc strings for SB API classes

The first line of the doc string ends up on the SB API class summary at
the root page of the Python API  web page of LLDB. Currently many of the
descriptions are missing or are several lines which makes the table really
hard to read.

This just adds the missing docstrings where possible and fixes the formatting
where necessary.
The file was modifiedlldb/bindings/interface/SBQueue.i
The file was modifiedlldb/bindings/interface/SBHostOS.i
The file was modifiedlldb/bindings/interface/SBMemoryRegionInfoList.i
The file was modifiedlldb/bindings/interface/SBInstruction.i
The file was modifiedlldb/bindings/interface/SBType.i
The file was modifiedlldb/bindings/interface/SBData.i
The file was modifiedlldb/bindings/interface/SBThreadPlan.i
The file was modifiedlldb/bindings/interface/SBStringList.i
The file was modifiedlldb/bindings/interface/SBAttachInfo.i
The file was modifiedlldb/bindings/interface/SBFileSpecList.i
The file was modifiedlldb/bindings/interface/SBTypeEnumMember.i
The file was modifiedlldb/bindings/interface/SBVariablesOptions.i
The file was modifiedlldb/bindings/python/python-extensions.swig
The file was modifiedlldb/bindings/interface/SBPlatform.i
The file was modifiedlldb/bindings/interface/SBTraceOptions.i
The file was modifiedlldb/bindings/interface/SBExecutionContext.i
The file was modifiedlldb/bindings/interface/SBLaunchInfo.i
The file was modifiedlldb/bindings/interface/SBLanguageRuntime.i
The file was modifiedlldb/bindings/interface/SBBreakpoint.i
The file was modifiedlldb/bindings/interface/SBCommunication.i
The file was modifiedlldb/bindings/interface/SBQueueItem.i
The file was modifiedlldb/bindings/interface/SBLineEntry.i
The file was modifiedlldb/bindings/interface/SBFrame.i
The file was modifiedlldb/bindings/interface/SBReproducer.i
The file was modifiedlldb/bindings/interface/SBModuleSpec.i
The file was modifiedlldb/bindings/interface/SBTrace.i
Commit 469ceaf53892d26f7b68f86f1feb38fe7057815e by Dávid Bolvanský
[Tests] Add test for PR45691
The file was addedllvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll
Commit ed396212da41feed9bffb8cc1ca6518ab031a3c7 by Dávid Bolvanský
[InstCombine] Transform abs pattern using multiplication to abs intrinsic (PR45691)

```
unsigned r(int v)
{
    return (1 | -(v < 0)) * v;
}

`r` is equivalent to `abs(v)`.

```

```
define <4 x i8> @src(<4 x i8> %0) {
%1:
  %2 = ashr <4 x i8> %0, { 31, undef, 31, 31 }
  %3 = or <4 x i8> %2, { 1, 1, 1, undef }
  %4 = mul nsw <4 x i8> %3, %0
  ret <4 x i8> %4
}
=>
define <4 x i8> @tgt(<4 x i8> %0) {
%1:
  %2 = icmp slt <4 x i8> %0, { 0, 0, 0, 0 }
  %3 = sub nsw <4 x i8> { 0, 0, 0, 0 }, %0
  %4 = select <4 x i1> %2, <4 x i8> %3, <4 x i8> %0
  ret <4 x i8> %4
}
Transformation seems to be correct!
```

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D94874
The file was modifiedllvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
Commit 7e9e6ac526ebd90fe8ec0b8d2bb6edd3516ab908 by Raphael Isemann
[lldb][docs] Fix some RST formatting errors related to code examples.

Mostly just making sure the indentation is right (SBDebugger had 0 spaces
as it was still plain text, the others had too much indentation or other
minor issues).
The file was modifiedlldb/bindings/interface/SBBroadcaster.i
The file was modifiedlldb/bindings/interface/SBStructuredData.i
The file was modifiedlldb/bindings/interface/SBCommandInterpreterRunOptions.i
The file was modifiedlldb/bindings/interface/SBProcess.i
The file was modifiedlldb/bindings/interface/SBType.i
The file was modifiedlldb/bindings/interface/SBDebugger.i
Commit 352fcfc69788093b50971a9f5540a61fa0887ce1 by kazu
[llvm] Use llvm::sort (NFC)
The file was modifiedllvm/lib/ExecutionEngine/Orc/SpeculateAnalyses.cpp
The file was modifiedllvm/lib/TextAPI/MachO/TextStub.cpp
The file was modifiedllvm/tools/llvm-jitlink/llvm-jitlink.cpp
The file was modifiedllvm/lib/Support/DebugCounter.cpp
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/tools/llvm-cov/CoverageExporterLcov.cpp
The file was modifiedllvm/lib/Object/COFFObjectFile.cpp
The file was modifiedllvm/tools/llvm-cov/CoverageExporterJson.cpp
The file was modifiedllvm/lib/DWARFLinker/DWARFLinker.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
The file was modifiedllvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
The file was modifiedllvm/lib/FileCheck/FileCheck.cpp
The file was modifiedllvm/lib/DebugInfo/CodeView/DebugFrameDataSubsection.cpp
The file was modifiedllvm/lib/DebugInfo/GSYM/GsymCreator.cpp
Commit a59126115e9586dd7fda4bb365ee43682814fc53 by kazu
[IRBuilder] "Zero"-initialize SmallVector (NFC)
The file was modifiedllvm/lib/IR/IRBuilder.cpp
Commit 50be8e447152b8512521e568e4918dec486c25a5 by kazu
[TableGen] Drop redundant const from return types (NFC)

Identified with readability-const-return-type.
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/utils/TableGen/CodeGenRegisters.h
The file was modifiedllvm/utils/TableGen/CodeGenTarget.h
The file was modifiedllvm/utils/TableGen/OptParserEmitter.cpp
The file was modifiedllvm/utils/TableGen/CodeGenRegisters.cpp
The file was modifiedllvm/utils/TableGen/DAGISelMatcher.h
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp
Commit 9a7fb0848771e3d38baf10e4d1078b50dd884265 by steveire
NFC: Minor cleanup of function calls
The file was modifiedclang/lib/ASTMatchers/ASTMatchFinder.cpp
Commit 1cc477f030bdeb6de98c6bde89fa7850630def24 by nikita.ppv
[SimplifyCFG] Add test for PR48778 (NFC)

The sdiv is incorrectly speculated.
The file was addedllvm/test/Transforms/SimplifyCFG/pr48778-sdiv-speculation.ll
Commit 4229b87ed36cf20b95b363393452aa4815e344e2 by nikita.ppv
[ValueTracking] Fix isSafeToSpeculativelyExecute for sdiv (PR48778)

The != -1 check does not work correctly for all bitwidths. Use
isAllOnesValue() instead.
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/test/Transforms/SimplifyCFG/pr48778-sdiv-speculation.ll
Commit a89242d874df72cddeafbebc75ac377371e72796 by pavel
[lldb] Skip TestPlatformProcessConnect on windows and darwin

The test fails (for different reasons) on these platforms. Skip for now.
The file was modifiedlldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
Commit 95d146182fdf2315e74943b93fb3bb0cbafc5d89 by i
Makefile.rules: Delete GCC 4.6 workaround

5.1 is the minimum supported version.
The file was modifiedlldb/packages/Python/lldbsuite/test/make/Makefile.rules
Commit f855751c1284c82c1c46b98f6d1b3ca2021d6cb9 by chandlerc
Fix openmp CMake build on non-Linux AArch64 systems.

This just checks for `/proc/cpuinfo` existing before reading it.

Tested on an ARM macOS machine.
The file was modifiedopenmp/runtime/cmake/LibompGetArchitecture.cmake
Commit 3bdf4507b66348ad78df4655a8e4f36c3fc10f3c by czhengsz
[NFC] [TargetRegisterInfo] add one use check to lookThruCopyLike.

add one use check to lookThruCopyLike.

The root node is safe to be deleted if we are sure that every
definition in the copy chain only has one use.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D92069
The file was modifiedllvm/lib/CodeGen/TargetRegisterInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetRegisterInfo.h
Commit b74ae43c44b1c954508149409d3cfe6477be4079 by i
Makefile.rules: Make HOST_OS/OS simply expanded variable to avoid excess uname -s invocations

This decreases the number of runs from 18 to 1.
The file was modifiedlldb/packages/Python/lldbsuite/test/make/Makefile.rules
Commit a817f46d50c34ea6b798d28bd5fa6a3ee7435497 by Lang Hames
[JITLink][ELF] Skip DWARF sections in ELF objects.

This matches current JITLink/MachO behavior and avoids processing currently
unsupported relocations.
The file was addedllvm/test/ExecutionEngine/JITLink/X86/ELF_skip_debug_sections.s
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
Commit 2639c162b71f4b9e5c0ffefaa861fe915b73cb87 by aqjune
[InstCombine] more tests for D94861 (NFC)
The file was modifiedllvm/test/Transforms/InstCombine/select-safe-transforms.ll
Commit 2d9890775f523a7a7ed2d7d064273bf7e28ebf20 by qiucofan
[PowerPC] [NFC] Add AIX triple to some regression tests

As part of the effort to improve AIX support, regression test coverage
misses quite a lot for AIX subtarget. This patch adds AIX triple to
those don't need extra change, and we can cover more cases in following
commits.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D94159
The file was modifiedllvm/test/CodeGen/PowerPC/constants-i64.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ori_imm32.ll
The file was modifiedllvm/test/CodeGen/PowerPC/unal-vec-ldst.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vec_revb.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vmladduhm.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pr33093.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ftrunc-vec.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vec_constants.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vec_clz.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pr39478.ll
The file was modifiedllvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll
The file was modifiedllvm/test/CodeGen/PowerPC/popcnt-zext.ll
The file was modifiedllvm/test/CodeGen/PowerPC/rotl-2.ll
The file was modifiedllvm/test/CodeGen/PowerPC/setcc-to-sub.ll
The file was modifiedllvm/test/CodeGen/PowerPC/cmpb.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fma-assoc.ll
The file was modifiedllvm/test/CodeGen/PowerPC/hoist-logic.ll
The file was modifiedllvm/test/CodeGen/PowerPC/and-mask.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fdiv.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mi-peephole-splat.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mulli.ll
The file was modifiedllvm/test/CodeGen/PowerPC/bool-math.ll
The file was modifiedllvm/test/CodeGen/PowerPC/cmpb-ppc32.ll
The file was modifiedllvm/test/CodeGen/PowerPC/bswap64.ll
The file was modifiedllvm/test/CodeGen/PowerPC/maddld.ll
The file was modifiedllvm/test/CodeGen/PowerPC/inc-of-add.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ori_imm64.ll
The file was modifiedllvm/test/CodeGen/PowerPC/constant-combines.ll
The file was modifiedllvm/test/CodeGen/PowerPC/shift-cmp.ll
Commit f776d8b12f0ec19cfff60c967565788ce4f926e6 by qiucofan
[Legalizer] Promote result type in expanding FP_TO_XINT

This patch promotes result integer type of FP_TO_XINT in expanding.
So crash in conversion from ppc_fp128 to i1 will be fixed.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D92473
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
Commit 7011086dc1cd5575f971db0138a62387939e6a73 by listmail
[test] Autogen a loop vectorizer test to make future changes visible
The file was modifiedllvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
Commit 8356610f8d48ca7ecbb930dd9b987e4269784710 by listmail
[test] pre commit a couple more tests for vectorizing multiple exit loops
The file was modifiedllvm/test/Transforms/LoopVectorize/loop-form.ll
Commit e5619065b8b8c441c0cbccbb81f5fa7857cf670a by Lang Hames
[JITLink][ELF] New ELF skip-debug-sections test requires asserts.

This should fix the failures on Release mode testers.
The file was modifiedllvm/test/ExecutionEngine/JITLink/X86/ELF_skip_debug_sections.s
Commit 26a396c4ef481cb159bba631982841736a125a9c by czhengsz
[PowerPC] support register pressure reduction in machine combiner.

Reassociating some patterns to generate more fma instructions to
reduce register pressure.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D92071
The file was addedllvm/test/CodeGen/PowerPC/register-pressure-reduction.ll
The file was modifiedllvm/include/llvm/CodeGen/MachineCombinerPattern.h
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.h
The file was modifiedllvm/lib/CodeGen/MachineCombiner.cpp
Commit bcc1dee60019f3a488a04dc7f701f7a692040fed by bjoern
[clang-format] Add StatementAttributeLikeMacros option

This allows to ignore for example Qts emit when
AlignConsecutiveDeclarations is set, otherwise it is parsed as a type
and it results in some misformating:

unsigned char MyChar = 'x';
emit          signal(MyChar);

Differential Revision: https://reviews.llvm.org/D93776
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/lib/Format/FormatToken.h
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
The file was modifiedclang/include/clang/Format/Format.h
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/lib/Format/WhitespaceManager.cpp
The file was modifiedclang/lib/Format/FormatTokenLexer.cpp
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
Commit cfec6cd50c36f3db2fcd4084a8ef4df834a4eb24 by craig.topper
[IR] Allow scalable vectors in structs to support intrinsics returning multiple values.

RISC-V would like to use a struct of scalable vectors to return multiple
values from intrinsics. This woud also be needed for target independent
intrinsics like llvm.sadd.overflow.

This patch removes the existing restriction for this. I've modified
StructType::isSized to consider a struct containing scalable vectors
as unsized so the verifier won't allow loads/stores/allocas of these
structs.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D94142
The file was removedllvm/test/Other/scalable-vector-struct.ll
The file was addedllvm/test/CodeGen/RISCV/scalable-vector-struct.ll
The file was addedllvm/test/Verifier/scalable-vector-struct-alloca.ll
The file was addedllvm/test/Verifier/scalable-vector-struct-load.ll
The file was modifiedllvm/lib/IR/DataLayout.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/test/Verifier/scalable-global-vars.ll
The file was addedllvm/test/Other/scalable-vector-struct-intrinsic.ll
The file was modifiedllvm/include/llvm/IR/DerivedTypes.h
The file was modifiedllvm/lib/CodeGen/Analysis.cpp
The file was modifiedllvm/lib/IR/Type.cpp
The file was addedllvm/test/Verifier/scalable-vector-struct-store.ll
Commit 383b6501ffedc85c2ecfaa7852ec1a9e9c374e3f by craig.topper
[RISCV] Use tail agnostic policy for instructions with tied defs if the use operand is IMPLICIT_DEF.

The vcompress intrinsic is defined such that it requires a tail
undisturbed policy. This patch makes it so we can use the tail
agnostic policy if the user has passed vundefined to the dest
operand.

We need to do something similar for masked policy, but we need
annotation of which instructions use the mask policy first.

Not sure if this is sufficient for scheduling or if we'll need to
select different pseudos that don't have a tied def.

Reviewed By: evandro

Differential Revision: https://reviews.llvm.org/D94566
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit f446fc5acf88fda676b5df1c04838f7244201d20 by Raphael Isemann
[lldb][docs] Resolve the remaining sphinx formatter warnings in the SB API docs

With this patch there should no longer be any warnings when generating the
SB API sphinx docs.
The file was modifiedlldb/bindings/interface/SBValue.i
The file was modifiedlldb/bindings/interface/SBTarget.i
The file was modifiedlldb/bindings/interface/SBAddress.i
The file was modifiedlldb/bindings/interface/SBDebugger.i
The file was modifiedlldb/bindings/interface/SBFrame.i
The file was modifiedlldb/bindings/interface/SBModule.i
The file was modifiedlldb/bindings/interface/SBBroadcaster.i
The file was modifiedlldb/bindings/interface/SBProcess.i
Commit b9ce772b8fb5d02afd026c9b029f5d53d1ea9591 by grimar
[Object, llvm-readelf] - Move the API for retrieving symbol versions to ELF.h

`ELFDumper.cpp` implements the functionality that allows to get symbol versions.
It is used for dumping versioned symbols.

This helps to implement https://bugs.llvm.org/show_bug.cgi?id=48670 ("make llvm-nm -D print version names"):
we can move out and reuse the code from `ELFDumper.cpp`.
This is what this patch do: it moves the related functionality to `ELFFile<ELFT>`.

Differential revision: https://reviews.llvm.org/D94771
The file was modifiedllvm/test/tools/llvm-readobj/ELF/verneed-invalid.test
The file was modifiedllvm/include/llvm/Object/ELF.h
The file was modifiedllvm/test/tools/llvm-readobj/ELF/verdef-invalid.test
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit b43075e34a598460fe1590d950862a26449e8d10 by bjoern
[clang-format] Fix documentation of bcc1dee600

That was an oversight.

Differential Revision: https://reviews.llvm.org/D93776
The file was modifiedclang/include/clang/Format/Format.h
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
Commit 6e75ee6b65c1c9924c0c9c10b1cbd57f10fe127b by Raphael Isemann
[lldb][docs] Use inline literals for code/paths instead of rendering it with the default role

Right now we're using the 'content' role as default which will just render
these things as cursive (which isn't really useful for code examples). It also
prevents us from assigning a more useful default role in the future.
The file was modifiedlldb/docs/design/reproducers.rst
The file was modifiedlldb/docs/design/sbapi.rst
The file was modifiedlldb/docs/resources/contributing.rst
The file was modifiedlldb/docs/man/lldb.rst
The file was modifiedlldb/bindings/interface/SBValue.i
The file was modifiedlldb/bindings/interface/SBFile.i
The file was modifiedlldb/docs/resources/build.rst
The file was modifiedlldb/bindings/interface/SBFrame.i
Commit 770d1e0a8828010a7c95de4596e24d54ed2527c3 by llvm-dev
[X86][SSE] isHorizontalBinOp - reuse any existing horizontal ops.

If we already have similar horizontal ops using the same args, then match that, even if we are on a target with slow horizontal ops.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/haddsub-shuf.ll
The file was modifiedllvm/test/CodeGen/X86/haddsub-undef.ll
Commit ac603c8d3850ed0c715c421d79bb5cb014bb21de by fraser
[RISCV] Add scalable vector truncate patterns

Original patch by @rogfer01.

This patch supports vector truncates, which on RVV must be done in a
series of instructions truncating by one power-of-two at a time. This is
done through custom-lowering and a custom node to avoid LLVM
re-combining the split TRUNCATE nodes.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Fraser Cormack <fraser@codeplay.com>

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D94796
The file was addedllvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv32.ll
Commit 207f32948b2408bebd5a523695f6f7c08049db74 by llvm-dev
[DAG] SimplifyDemandedBits - use KnownBits comparisons to remove ISD::UMIN/UMAX ops

Use the KnownBits icmp comparisons to determine when a ISD::UMIN/UMAX op is unnecessary should either op be known to be ULT/ULE or UGT/UGE than the other.

Differential Revision: https://reviews.llvm.org/D94532
The file was modifiedllvm/test/CodeGen/X86/combine-umin.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll
The file was modifiedllvm/test/CodeGen/X86/sdiv_fix_sat.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/X86/udiv_fix_sat.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit aca240b4f69e908b31e30b7ccece3c5b1d58426e by zinenko
[mlir] Fix cross-compilation (Linalg ODS gen)

Use cross-compilation approach for `mlir-linalg-ods-gen` application
similar to TblGen tools.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D94598
The file was modifiedmlir/tools/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
The file was modifiedmlir/tools/mlir-linalg-ods-gen/CMakeLists.txt
The file was modifiedmlir/CMakeLists.txt
Commit 3bd24574c7d0187e69780540fe0681914d71794f by tpopp
Revert "[PowerPC] support register pressure reduction in machine combiner."

This reverts commit 26a396c4ef481cb159bba631982841736a125a9c.

See https://reviews.llvm.org/D92071 for a description of the issue.
The file was modifiedllvm/lib/CodeGen/MachineCombiner.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.h
The file was removedllvm/test/CodeGen/PowerPC/register-pressure-reduction.ll
The file was modifiedllvm/include/llvm/CodeGen/MachineCombinerPattern.h
Commit 83aa93e99542dbbfc5223130482ad6d7744d9a78 by flo
[VectorUtils] Do not try to add indices matching tombstone/empty values.

Keys matching the tombstone/empty special values cannot be inserted in a
DenseMap. Under some circumstances, LV tries to add members to an
interleave group that match the special values. Skip adding such
members. This is unlikely to have any impact in practice, because
interleave groups with such indices are very likely to not be
vectorized, due to gaps.

This issue has been surfaced by fuzzing, see
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=11638
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-large-gap.ll
The file was modifiedllvm/include/llvm/Analysis/VectorUtils.h
Commit 9bf843bdc88f89193939445828105d97ac83f963 by tianshilei1992
Revert "[OpenMP] Added the support for hidden helper task in RTL"

This reverts commit ed939f853da1f2266f00ea087f778fda88848f73.
The file was modifiedopenmp/runtime/test/worksharing/for/kmp_sch_simd_guided.c
The file was removedopenmp/runtime/test/tasking/hidden_helper_task/common.h
The file was modifiedopenmp/runtime/src/z_Linux_util.cpp
The file was modifiedopenmp/runtime/src/kmp_taskdeps.h
The file was removedopenmp/runtime/test/tasking/hidden_helper_task/depend.cpp
The file was removedopenmp/runtime/test/tasking/hidden_helper_task/taskgroup.cpp
The file was modifiedopenmp/runtime/src/kmp.h
The file was modifiedopenmp/runtime/src/kmp_wait_release.h
The file was modifiedopenmp/runtime/src/kmp_runtime.cpp
The file was modifiedopenmp/runtime/src/kmp_global.cpp
The file was removedopenmp/runtime/test/tasking/hidden_helper_task/gtid.cpp
The file was modifiedopenmp/runtime/src/kmp_settings.cpp
The file was modifiedopenmp/runtime/src/kmp_tasking.cpp
Commit 911961c9c1320ba985ac06c1866b33a5a247a94e by dmitry.preobrazhensky
[AMDGPU][MC][GFX10] Improved dpp8 errors handling

Reviewers: rampitec

Differential Revision: https://reviews.llvm.org/D94756
The file was modifiedllvm/test/MC/AMDGPU/gfx10_err_pos.s
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Commit 689aaba7acf5778bfe96bfd7bc4f1f3ceed20dc8 by Abhina.Sreeskantharajan
[SystemZ][z/OS] Fix No such file or directory expression error matching in lit tests

On z/OS, the following error message is not matched correctly in lit tests. This patch updates the CHECK expression to match successfully.
```
EDC5129I No such file or directory.
```

Reviewed By: muiez

Differential Revision: https://reviews.llvm.org/D94239
The file was modifiedclang/test/CodeGen/ubsan-blacklist-vfs.c
The file was modifiedlld/test/ELF/basic.s
The file was modifiedclang/test/CodeGen/basic-block-sections.c
The file was modifiedllvm/test/tools/llvm-readobj/ELF/thin-archive-paths.test
The file was modifiedllvm/test/tools/llvm-objcopy/redefine-symbols.test
The file was modifiedllvm/test/tools/llvm-cxxdump/trivial.test
The file was modifiedllvm/test/tools/llvm-ar/response.test
The file was modifiedllvm/test/tools/llvm-ar/missing-thin-archive-member.test
The file was modifiedlld/test/COFF/nodefaultlib.test
The file was modifiedllvm/test/tools/llvm-profdata/weight-sample.test
The file was modifiedllvm/test/tools/llvm-objcopy/MachO/add-section-error.test
The file was modifiedllvm/test/tools/llvm-lto2/X86/stats-file-option.ll
The file was modifiedlld/test/COFF/manifestinput-error.test
The file was modifiedlld/test/COFF/pdb-type-server-invalid-signature.yaml
The file was modifiedllvm/test/tools/llvm-objcopy/COFF/add-section.test
The file was modifiedllvm/test/tools/llvm-mca/invalid_input_file_name.test
The file was modifiedllvm/test/tools/llvm-objcopy/ELF/add-section.test
The file was modifiedllvm/test/tools/obj2yaml/invalid_input_file.test
The file was modifiedllvm/test/tools/llvm-readobj/thin-archive.test
The file was modifiedlld/test/ELF/symbol-ordering-file.s
The file was modifiedllvm/test/tools/yaml2obj/output-file.yaml
The file was modifiedllvm/test/DebugInfo/symbolize-missing-file.test
The file was modifiedllvm/test/tools/llvm-ml/basic.test
The file was modifiedlld/test/COFF/driver.test
The file was modifiedllvm/test/tools/llvm-size/no-input.test
The file was modifiedllvm/test/tools/llvm-objcopy/ELF/error-format.test
The file was modifiedllvm/test/tools/dsymutil/X86/papertrail-warnings.test
The file was modifiedllvm/test/tools/llvm-ar/replace.test
The file was modifiedllvm/test/tools/llvm-xray/X86/no-such-file.txt
The file was modifiedlld/test/ELF/archive-thin-missing-member.s
The file was modifiedllvm/test/tools/llvm-profdata/weight-instr.test
The file was modifiedllvm/test/tools/llvm-readobj/basic.test
The file was modifiedclang/test/Frontend/stats-file.c
The file was modifiedllvm/test/tools/llvm-mc/basic.test
Commit f7443905af1e06eaacda1e437fff8d54dc89c487 by dantrushin
[Statepoint] Handle `undef` operands in statepoint.

Currently when spilling statepoint register operands in FixupStatepoints
we do not pay attention that it might be `undef`. We just generate a
spill, which may lead to verifier error because we have a use without def.

To handle it, let FixupStateponts ignore `undef` register operands
completely and change them to some constant value when generating
stack map. Use same value as used by ISel for this purpose (0xFEFEFEFE).

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D94703
The file was modifiedllvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
The file was addedllvm/test/CodeGen/X86/statepoint-fixup-undef.mir
The file was modifiedllvm/lib/CodeGen/StackMaps.cpp
Commit 9399681a57cef143dc4d087706947a03af819ef5 by kai
[Doc] Fix example in codegen doc.

The attributes in the example are placed wrong:
They belong after the type, not after the parameter name.

Reviewed by: abhina.sreeskantharajan

Differential Revision: https://reviews.llvm.org/D94683
The file was modifiedllvm/docs/CodeGenerator.rst
Commit 36710c38c1b741ff9cc70060893d53fc24c07833 by caroline.concatto
[NFC]Migrate VectorCombine.cpp to use InstructionCost

This patch changes these functions:
vectorizeLoadInsert
isExtractExtractCheap
foldExtractedCmps
scalarizeBinopOrCmp
getShuffleExtract
foldBitcastShuf
to use the class InstructionCost when calling TTI.get<something>Cost().

This patch is part of a series of patches to use InstructionCost instead of
unsigned/int for the cost model functions.
See this thread for context:
    http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
See this patch for the introduction of the type:
    https://reviews.llvm.org/D91174

ps.:This patch adds the test || !NewCost.isValid(), because we want to
return false when:
!NewCost.isValid && !OldCost.isValid()->the cost to transform it expensive
and
!NewCost.isValid() && OldCost.isValid()
Therefore for simplication we only add  test for !NewCost.isValid()

Differential Revision: https://reviews.llvm.org/D94069
The file was modifiedllvm/lib/Transforms/Vectorize/VectorCombine.cpp
Commit e6d758de82b6f93f81e71617aeb5a37e57d6ada9 by flo
[InferAttrs] Mark some library functions as willreturn.

This patch marks some library functions as willreturn. On the first pass, I
excluded most functions that interact with streams/the filesystem.

Along with willreturn, it also adds nounwind to a set of math functions.
There probably are a few additional attributes we can add for those, but
that should be done separately.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D94684
The file was modifiedllvm/test/Transforms/InferFunctionAttrs/annotate.ll
The file was modifiedllvm/test/Transforms/LICM/strlen.ll
The file was modifiedllvm/lib/Transforms/Utils/BuildLibCalls.cpp
Commit ead71a23edde5f8a1acfdd75bd01f1fa6e0c4014 by sd.fertile
[PowerPC][AIX]Do not emit xxspltd mnemonic on AIX.

A bug in the system assembler can assemble the xxspltd extended
menemonic into the wrong instruction (extracting the wrong element).
Emit the full xxpermdi with all operands to work around the problem.

Differential Revision: https://reviews.llvm.org/D94419
The file was modifiedllvm/test/MC/PowerPC/modern-aix-as.s
The file was addedllvm/test/CodeGen/PowerPC/xxpermdi_mnemonics.s
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td
Commit 2040c1110b661caae7999abc0158a7f57a6400fb by djolertrk
[CSInfo][MIPS] Update CSInfo in delay slot filler

In MipsDelaySlotFiller, when replacing old call-branch with
the compact branch instruction, an assertion is caused by erasing
the old call with unhandled CSInfo.
The problem was reported in PR48695.
This patch fixes it, by moving call site info from the old call
instruction to its replace.

Patch by Nikola Tesic

Differential revision: https://reviews.llvm.org/D94685
The file was modifiedllvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
The file was addedllvm/test/DebugInfo/MIR/Mips/call-site-info-update-delay-slot-filler.mir
Commit d1c4e859ce42c35c61a0db2f1eb8a4209be4503d by spatel
[SLP] reduce opcode API dependency in reduction cost calc; NFC

The icmp opcode is now hard-coded in the cost model call.
This will make it easier to eventually remove all opcode
queries for min/max patterns as we transition to intrinsics.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 3dbbadb8ef53d1e91785c17ccd70848de7e842e9 by spatel
[SLP] rename reduction query for min/max ops; NFC

This will avoid confusion once we start matching
min/max intrinsics. All of these hacks to accomodate
cmp+sel idioms should disappear once we canonicalize
to min/max intrinsics.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 55c557a5d25fd0f4db55fc4a406a1ea74594cfad by dmitry.preobrazhensky
[AMDGPU][MC] Refactored parsing of dpp ctrl

Summary of changes:
- simplified code to improve maintainability;
- replaced lex() with higher level parser functions;
- improved errors handling.

Reviewers: rampitec

Differential Revision: https://reviews.llvm.org/D94777
The file was modifiedllvm/test/MC/AMDGPU/regression/bug28538.s
The file was modifiedllvm/test/MC/AMDGPU/gfx10_err_pos.s
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Commit 34a2c138c8960b47a35054312ebd746b320cac03 by flo
[LoopRotate] Precommit test for prepare-for-lto handling.

Precommit test for D94232.
The file was addedllvm/test/Transforms/LoopRotate/call-prepare-for-lto.ll
Commit 30b8f55378cc57f7589694ca9bc4212ce7c2f4ec by dmitry.preobrazhensky
Fix for sanitizer issue in 55c557a
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Commit ce06475da94f1040d17d46d471dd48478576a76f by llvm-dev
[X86][AVX] IsElementEquivalent - add matchShuffleWithUNPCK + VBROADCAST/VBROADCAST_LOAD handling

Specify LHS/RHS operands in matchShuffleWithUNPCK's calls to isTargetShuffleEquivalent, and handle VBROADCAST/VBROADCAST_LOAD matching in IsElementEquivalent
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/avg.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
Commit 63393828078c382e8e69d9b8146372b70bbce20f by wingo
[WebAssembly] Add support for table linking to wasm-ld

This patch adds support to wasm-ld for linking multiple table references
together, in a manner similar to wasm globals. The indirect function
table is synthesized as needed.

To manage the transitional period in which the compiler doesn't yet
produce TABLE_NUMBER relocations and doesn't residualize table symbols,
the linker will detect object files which have table imports or
definitions, but no table symbols. In that case it will synthesize
symbols for the defined and imported tables.

As a change, relocatable objects are now written with table symbols,
which can cause symbol renumbering in some of the tests. If no object
file requires an indirect function table, none will be written to the
file. Note that for legacy ObjFile inputs, this test is conservative: as
we don't have relocs for each use of the indirecy function table, we
just assume that any incoming indirect function table should be
propagated to the output.

Differential Revision: https://reviews.llvm.org/D91870
The file was modifiedlld/wasm/InputFiles.cpp
The file was modifiedlld/wasm/InputFiles.h
The file was modifiedlld/test/wasm/locals-duplicate.test
The file was modifiedlld/wasm/Symbols.cpp
The file was modifiedlld/test/wasm/signature-mismatch.ll
The file was modifiedlld/wasm/SyntheticSections.h
The file was addedlld/test/wasm/export-table-explicit.test
The file was modifiedlld/test/wasm/init-fini.ll
The file was modifiedlld/test/wasm/weak-alias.ll
The file was modifiedlld/wasm/MarkLive.cpp
The file was modifiedlld/test/wasm/local-symbols.ll
The file was modifiedlld/test/wasm/shared.ll
The file was modifiedlld/wasm/SymbolTable.h
The file was modifiedlld/wasm/Symbols.h
The file was modifiedlld/test/wasm/pie.ll
The file was modifiedlld/test/wasm/alias.s
The file was modifiedlld/wasm/Driver.cpp
The file was modifiedlld/test/wasm/section-symbol-relocs.yaml
The file was modifiedlld/test/wasm/stack-pointer.ll
The file was modifiedlld/wasm/SyntheticSections.cpp
The file was modifiedlld/wasm/SymbolTable.cpp
The file was modifiedlld/wasm/Writer.cpp
Commit d806618636f8a82bfc3f620e1fad83af4d2a2575 by wingo
[WebAssembly] MC layer writes table symbols to object files

Now that the linker handles table symbols, we can allow the frontend to
produce them.

Depends on D91870.

Differential Revision: https://reviews.llvm.org/D92215
The file was modifiedllvm/test/MC/WebAssembly/weak-alias.s
The file was modifiedllvm/test/MC/WebAssembly/debug-info.ll
The file was modifiedllvm/test/MC/WebAssembly/global-ctor-dtor.ll
The file was modifiedllvm/test/MC/WebAssembly/function-alias.ll
The file was modifiedllvm/test/MC/WebAssembly/reloc-pic.s
The file was modifiedllvm/test/MC/WebAssembly/debug-info64.ll
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
The file was modifiedllvm/test/MC/WebAssembly/type-index.s
Commit f5fcbe4e3c68584ef4858590a079f17593feabbd by nicholas.guy
[AArch64] Further restricts when a dup(*ext) can be rearranged

In most cases, the dup(*ext) pattern can be rearranged to perform
the extension on the vector side, allowing for further vector-specific
optimisations to be made. However the initial checks for this conversion
were insufficient, allowing invalid encodings to be attempted (causing
compilation to fail).

Differential Revision: https://reviews.llvm.org/D94778
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/aarch64-dup-ext-crash.ll
Commit 16bf02c3a19d4e1f4a19cb243de612e17f54f5a9 by nicholas.guy
Reland "[AArch64] Attempt to sink mul operands""

This relands dda60035e9f0769c8907cdf6561489e0435c2275,
which was reverted by dbaa6a1858a42f72b683f700d3bd7a9632f7a518
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
Commit 9f32f1d6fbfa4f4d654876e29c1c2b84e18b1a2e by arjunpitchanathan
[MLIR] Support checking if two FlatAffineConstraints are equal

This patch adds support for checking if two PresburgerSets are equal. In particular, one can check if two FlatAffineConstraints are equal by constructing PrebsurgerSets from them and comparing these.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D94915
The file was modifiedmlir/include/mlir/Analysis/PresburgerSet.h
The file was modifiedmlir/unittests/Analysis/PresburgerSetTest.cpp
The file was modifiedmlir/lib/Analysis/PresburgerSet.cpp
Commit 69295815ed92cc125f7ae0a0c41c99fd507dad9d by david.green
[ARM] Update test target triple. NFC
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smladx-1.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlad0.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlad3.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlad2.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlad4.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/multi-use-loads.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlad9.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlad11.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/aliasing.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlad1.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlald2.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlaldx-1.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlad8.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlald1.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlad12.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlald0.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlaldx-2.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlad5.ll
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/smlad10.ll
Commit 275716d6db79a6da3d5cee12139dd0c0abf8fd07 by usx
[clangd] Derive new signals in CC from ASTSignals.

This patch only introduces new signals but does not use their value
in scoring a CC candidate. Usage of these signals in CC ranking in both
heiristics and ML model will be introduced in later patches.

Differential Revision: https://reviews.llvm.org/D94473
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/Quality.h
The file was modifiedclang-tools-extra/clangd/CodeComplete.h
The file was modifiedclang-tools-extra/clangd/Quality.cpp
The file was modifiedclang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
The file was modifiedclang-tools-extra/clangd/CodeComplete.cpp
Commit 1d04dc52dd24d791970e56053cdd67fe149b0554 by lxfind
[Coroutine] Do not CoroElide if there are musttail calls

This is to address https://bugs.llvm.org/show_bug.cgi?id=48626.
When there are musttail calls that use parameters aliasing the newly created coroutine frame, the existing implementation will fatal.
We simply cannot perform CoroElide in such cases. In theory a precise analysis can be done to check whether the parameters of the musttail call
actually alias the frame, but it's very hard to do it before the transformation happens. Also in most cases the existence of musttail call is
generated due to symmetric transfers, and in those cases alias analysis won't be able to tell that they don't alias anyway.

Differential Revision: https://reviews.llvm.org/D94834
The file was addedllvm/test/Transforms/Coroutines/coro-elide-musttail.ll
The file was modifiedllvm/lib/Transforms/Coroutines/CoroElide.cpp
Commit e7dc083a410f187e143138b4956993370626268b by david.green
[ARM] Don't handle low overhead branches in AnalyzeBranch

It turns our that the BranchFolder and IfCvt does not like unanalyzable
branches that fall-through. This means that removing the unconditional
branches from the end of tail predicated instruction can run into
asserts and verifier issues.

This effectively reverts 372eb2bbb6fb903ce76266e659dfefbaee67722b, but
adds handling to t2DoLoopEndDec which are not branches, so can be safely
skipped.
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/varying-outer-2d-reduction.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-float16regloops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vcmp-vpst-combination.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-tailpred.ll
The file was addedllvm/test/CodeGen/Thumb2/mve-blockplacement.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vldshuffle.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-increment.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/while-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-float-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/sibling-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/aligned-nonfallthrough.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-scatter-increment.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-float32regloops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
Commit fa9851ebfee48014a1c48a7e7d625d9ecff3ebad by arjunpitchanathan
[MLIR] NFC: simplify PresburgerSet::isEqual

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D94918
The file was modifiedmlir/lib/Analysis/PresburgerSet.cpp
Commit a5a6164f6de5bea2ad1e78445684cc81fe632e56 by flo
[AArch64] Add test to check the attributes for some intrinsics.
The file was addedllvm/test/Assembler/aarch64-intrinsics-attributes.ll
Commit ca7e27054c25c2bc6cf88879d73745699251412c by spatel
[SLP] add more FMF tests for fmax/fmin reductions; NFC
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/fmaxnum.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/fminnum.ll
Commit b42ff9fb038206c7967e22ceef2c7ea8275dc198 by sam
[RISCV][NFC] Increase test coverage of Zbt extension

Add Zbt (ternary) extension code generation to the select lowering
tests since it can have a significant impact on how select is
lowered.

While we are here make the neg-abs commands more consistent with
the other tests.

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D94798
The file was modifiedllvm/test/CodeGen/RISCV/select-cc.ll
The file was modifiedllvm/test/CodeGen/RISCV/neg-abs.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-const.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-optimize-multiple.mir
The file was addedllvm/test/CodeGen/RISCV/select-bare.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-or.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-and.ll
The file was removedllvm/test/CodeGen/RISCV/bare-select.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-optimize-multiple.ll
Commit 50ae6a3ac9bdf640ecc69fe6540b08a8b4355398 by flo
[AArch64] Make target intrinsics DefaultAttrIntrinsics.

DefaultAttrIntrinsics was introduced to add very common attributes to a
large set of intrinsics.

Currently the added attributes include:

    nofree nosync nounwind willreturn

I think those should hold for most AArch64 target intrinsics, but
there are too many to check manually. This patch makes most AArch64 target
intrinsics DefaultAttrsIntrinsics.

Some notable exceptions I think are exclusive loads and stores as well
as the memory barrier intrinsics, for which nosync does not apply I
think.

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D94687
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/test/Assembler/aarch64-intrinsics-attributes.ll
Commit 2f92386e721acd7badac06b67229537c4f0adfad by adhemerval.zanella
[LLD][ELF][AArch64] Set _GLOBAL_OFFSET_TABLE_ at the start of .got

The commit 18aa0be36ed9 changed the default GotBaseSymInGotPlt to true
for AArch64.  This is different than binutils, where
_GLOBAL_OFFSET_TABLE_ points at the start or .got.

It seems to not intefere with current relocations used by LLVM.  However
as indicated by PR#40357 [1] gcc generates R_AARCH64_LD64_GOTPAGE_LO15
for -pie (in fact it also generated the relocation for -fpic).

This change is requires to correctly handle R_AARCH64_LD64_GOTPAGE_LO15
by lld from objects generated by gcc.

[1] https://bugs.llvm.org/show_bug.cgi?id=40357
The file was modifiedlld/ELF/Arch/AArch64.cpp
The file was modifiedlld/test/ELF/global-offset-table-position-aarch64.s
Commit 291ac7e622d542f8b25f74bc28051762edc90938 by flo
[AArch64] Revert back to Intrinsic<> for TME instructions.

This patch reverts back to Intrinsic for the instructions for the
transactional memory extension, so nosync is not included.
The file was modifiedclang/test/CodeGen/aarch64-tme.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
Commit a58aceffad61ebffb1a860763299b3307041efa6 by Raphael Isemann
[lldb][docs] Use 'any' as the default role in LLDB's sphinx project

sphinx processes text in backticks depending on what 'role' it has (e.g.,
`:code:\`blub\`` -> role is `code`). If no role is provided, the default role is
taken which is right now using the default value of `content`. `content` only
really makes the text cursive which isn't really useful for anything right now.

Sphinx recommends using the `any` role by default [1] as that turns text in
backticks without an explicit roles into some kind of smart reference. If we did
this in LLDB, then we could just reference SB API classes by doing `\`SBValue\``
instead of typing out the rather verbose `:py:class:`/`:py:func:`/... role
before each reference. This would be especially nice when writing the SB API
docs itself as we constantly have to reference other classes.

[1] https://www.sphinx-doc.org/en/master/usage/restructuredtext/roles.html#role-any

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D94899
The file was modifiedlldb/docs/conf.py
The file was modifiedlldb/docs/use/python.rst
The file was modifiedlldb/docs/use/variable.rst
Commit 28ea50f524b56e11b608ca1f768d2981579ebe75 by kazu
[llvm] Populate std::vector at construction time (NFC)
The file was modifiedllvm/lib/ProfileData/SampleProf.cpp
The file was modifiedllvm/lib/ObjectYAML/DWARFEmitter.cpp
The file was modifiedllvm/lib/ObjectYAML/MachOEmitter.cpp
Commit dc300beba7a849aac44c39ccc450a575db99bc14 by kazu
[STLExtras] Add a default value to drop_begin

This patch adds the default value of 1 to drop_begin.

In the llvm codebase, 70% of calls to drop_begin have 1 as the second
argument.  The interface similar to with std::next should improve
readability.

This patch converts a couple of calls to drop_begin as examples.

Differential Revision: https://reviews.llvm.org/D94858
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/include/llvm/ADT/STLExtras.h
The file was modifiedllvm/unittests/ADT/STLExtrasTest.cpp
Commit 23b0ab2acb424e3e74722c0183e5c5ac84e6ea4c by kazu
[llvm] Use the default value of drop_begin (NFC)
The file was modifiedllvm/lib/Analysis/ModuleSummaryAnalysis.cpp
The file was modifiedllvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopInterchange.cpp
The file was modifiedllvm/lib/CodeGen/SafeStackLayout.cpp
The file was modifiedllvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
The file was modifiedllvm/lib/Analysis/LoopInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86MCInstLower.cpp
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
The file was modifiedllvm/tools/llvm-xray/xray-stacks.cpp
The file was modifiedllvm/lib/Analysis/VFABIDemangling.cpp
Commit 196cc96f9a643d1cb828f48ef15ec30d0de24df7 by adamcz
[clang] Allow LifetimeExtendedTemporary to have no access specifier

The check only runs in debug mode during serialization, but
assert()-fail on:
  struct S { const int& x = 7; };
in C++ mode.

Differential Revision: https://reviews.llvm.org/D94804
The file was modifiedclang/lib/AST/DeclBase.cpp
The file was modifiedclang/test/PCH/cxx-reference.h
Commit 2c51bef76cbf0149101b9e7c7c658b4a58657929 by craig.topper
[RISCV] Add a test of vector sadd.overflow to demonstrate intrinsics with multiple scalable vector results.

This builds on D94142 where scalable vectors are allowed in structs.

I did have to fix one scalable vector issue in the vector type
creation for these intrinsics where we used getVectorNumElements
instead of ElementCount.

Differential Revision: https://reviews.llvm.org/D94149
The file was addedllvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit 5d431c3d32c7736d74c6a9dfe4a9a43f183d880f by craig.topper
Revert "[RISCV] Add a test of vector sadd.overflow to demonstrate intrinsics with multiple scalable vector results."

This reverts commit 2c51bef76cbf0149101b9e7c7c658b4a58657929.

I seem to have messed up the check lines in the test.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was removedllvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll
Commit 79e798aca38baa260b9f3318991232dd1b5fc3f6 by craig.topper
Recommit "[RISCV] Add a test of vector sadd.overflow to demonstrate intrinsics with multiple scalable vector results."

This recommits 2c51bef76cbf0149101b9e7c7c658b4a58657929.

I've fixed the broken check line from when I renamed the test function.

Original commit message:
This builds on D94142 where scalable vectors are allowed in structs.

I did have to fix one scalable vector issue in the vector type
creation for these intrinsics where we used getVectorNumElements
instead of ElementCount.
The file was addedllvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit 01a13f127a8b17c7827cc19302fc612532249795 by Louis Dionne
[libc++] Rename check-cxx-deps to cxx-test-depends for consistency

Several subprojects have targets that do the same thing, and they all
follow the same naming convention: llvm-test-depends, clang-test-depends,
lld-test-depends, etc.

This makes libc++ consistent with other LLVM projects.
Thanks to Duncan Exon Smith for noticing and suggesting the change.

Differential Revision: https://reviews.llvm.org/D94499
The file was modifiedlibcxx/test/CMakeLists.txt
The file was modifiedlibcxx/docs/TestingLibcxx.rst
Commit 417f613743239a716d812443ba131207d78c6c9d by stellaraccident
[NFC] Update some mlir python documentation.

* Development setup recommendations.
* Test updates to match what we actually do.
* Update cmake variable `PYTHON_EXECUTABLE` -> `Python3_EXECUTABLE` to match the upgrade to python3 repo wide.
The file was modifiedmlir/docs/Bindings/Python.md
Commit 2776be43f0c28031348d2b18a050a8d6d01120f2 by Louis Dionne
[libc++] improve feature test macro script

I've been playing a bit with the `generate_feature_test_macro_components.py` script and replaced some hardcoded values with extra code generation (generate ALL the things).
The output is the same and it makes updating the script less work for the coming 25 C++ standards (until 2 digit number overflow).

Feel free to 'veto' if you think it's overkill.

Differential Revision: https://reviews.llvm.org/D94530
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
Commit d9b6e4d583c5585b756680e6da3fbd0bb8f0a722 by stellaraccident
NFC: Document current MLIR Python ODS conventions.

* We had let the documentation get stale and catching it up prior to proposing changes.
The file was modifiedmlir/docs/Bindings/Python.md
Commit aa3a59e0c69e16ff25ee991636247f9f99bfc34d by Andrey.Churbanov
[OpenMP][NFC] Fix test

The test fails if memkind library is accessible.
The file was modifiedopenmp/runtime/test/api/omp_alloc_null_fb.c
Commit 22b68440e1647e16b5ee24b924986207173c02d1 by nikita.ppv
[PredicateInfo] Add more and/or tests (NFC)
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/testandor.ll
Commit 1c31459153647a21da9b5cdbb01f78bccfb341a5 by craig.topper
[RISCV] Remove empty Sched instantiations from the end of InstAlias defs. NFCI

InstAliases don't need scheduling information so I'm not sure what
these lines were even doing. Especially since the records don't
have names.
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
Commit 5b77ac32b1150d066b35b45d6d982f4b4a1f62ff by spatel
[SLP] match maxnum/minnum intrinsics as FP reduction ops

After much refactoring over the last 2 weeks to the reduction
matching code, I think this change is finally ready.

We effectively broke fmax/fmin vector reduction optimization
when we started canonicalizing to intrinsics in instcombine,
so this should restore that functionality for SLP.

There are still FMF problems here as noted in the code comments,
but we should be avoiding miscompiles on those for fmax/fmin by
restricting to full 'fast' ops (negative tests are included).

Fixing FMF propagation is a planned follow-up.

Differential Revision: https://reviews.llvm.org/D94913
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/fminnum.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/fmaxnum.ll
Commit 2cb4a96a99e8acbf57a31d4d06ed5e21799d878e by Louis Dionne
[libc++] NFCI: Refactor allocator_traits

The implementation had a lot of boilerplate and was more complicated than
necessary. This NFC refactoring introduces a few macros to reduce code
duplication, and uses a consistent style and formatting for the whole file.

Differential Revision: https://reviews.llvm.org/D94544
The file was modifiedlibcxx/include/__memory/allocator_traits.h
The file was modifiedlibcxx/include/memory
Commit d27bb5c375ca8e96e15168587a3bcd91b244fcad by spatel
[x86] add cast to avoid compile-time warning; NFC
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit fe301f474977da0b82548652ef4bbd058542d076 by kazu
[LoopInfo] Fix a typo in compareLoops

The code here is checking to see if two sets are identical.
OtherBlocksSet should point to OtherL->getBlocksSet() instead.

Differential Revision: https://reviews.llvm.org/D94926
The file was modifiedllvm/include/llvm/Analysis/LoopInfoImpl.h
Commit 395c737d9fcefb0fb99ac6c524b1d47e697d31d6 by aqjune
[SimplifyCFG] Update SimplifyBranchOnICmpChain to recognize select form of and/or

This patch teaches SimplifyCFG::SimplifyBranchOnICmpChain to understand select form of
(x == C1 || x == C2 || ...) / (x != C1 && x != C2 && ...) and optimize them into switch if possible.
D93065 has more context about the transition, including links to the list of optimizations being updated.

Differential Revision: https://reviews.llvm.org/D93943
The file was modifiedllvm/test/Transforms/SimplifyCFG/switch_create.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 9d81073acb49d2bdf32dc3477310dd20ffa0436f by kkwli0
[OpenMP][Docs] Fix typos in FAQ (NFC)
The file was modifiedopenmp/docs/SupportAndFAQ.rst
Commit 14573d44ae097969a6168fbf14cc7f796442a296 by arthur.j.odwyer
Regenerate the feature test macro unit-tests. NFCI.

Somehow commit 1f1250151f222ba391d05dcc173f4b6c65d05ca2 added the
right code but with the wrong whitespace.
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/type_traits.version.pass.cpp
Commit 0441df94ad874c0c59a3785bd54a3d2f9a616fac by aqjune
[InstCombine,InstSimplify] Optimize select followed by and/or/xor

This patch adds `A & (A && B)` -> `A && B`  (similarly for or + logical or)

Also, this patch adds `~(select C, (icmp pred X, Y), const)` -> `select C, (icmp pred' X, Y), ~const`.

Alive2 proof:
merge_and: https://alive2.llvm.org/ce/z/teMR97
merge_or: https://alive2.llvm.org/ce/z/b4yZUp
xor_and: https://alive2.llvm.org/ce/z/_-TXHi
xor_or: https://alive2.llvm.org/ce/z/2uYx_a

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D94861
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
The file was modifiedllvm/test/Transforms/InstCombine/select-safe-transforms.ll
Commit 2d89ebd5d17b8d8800606880fe02cd867e4a0b90 by aqjune
Address unused variable warning
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Commit a9b3303a8847e100ae23fa711f9b5b8963ebdaf9 by czhengsz
Revert "[NFC] [TargetRegisterInfo] add one use check to lookThruCopyLike."

This reverts commit 3bdf4507b66348ad78df4655a8e4f36c3fc10f3c.

Post commit comments need to be addressed first.
The file was modifiedllvm/lib/CodeGen/TargetRegisterInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetRegisterInfo.h
Commit c535a7fdadb4679327ebb1b3b82c73c9ff6a164a by yuanke.luo
[X86] Fix tile spill merge issue.

This is a additional bug fix for c5be0e0cc0. The distance for
the spill instructions is wrong in previous patch.

Differential Revision: https://reviews.llvm.org/D94772
The file was modifiedllvm/lib/CodeGen/InlineSpiller.cpp
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
Commit bc713f6a004723d1325bc16e1efc32d0ac82f939 by richard
PR48763: Better handling for classes that inherit a default constructor.

The C++ standard wording doesn't appear to properly handle the case
where a class inherits a default constructor from a base class. Various
properties of classes are defined in terms of the corresponding property
of the default constructor, and in this case, the class does not have a
default constructor despite being default-constructible, which the
wording doesn't handle properly.

This change implements a tentative fix for these problems, which has
also been proposed to the C++ committee: if a class would inherit a
default constructor, and does not explicitly declare one, then one is
implicitly declared.
The file was modifiedclang/include/clang/AST/CXXRecordDeclDefinitionBits.def
The file was modifiedclang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/p15.cpp
The file was modifiedclang/test/CXX/special/class.ctor/p6-0x.cpp
The file was modifiedclang/include/clang/AST/DeclCXX.h
The file was modifiedclang/test/CXX/special/class.inhctor/p2.cpp
The file was modifiedclang/test/CXX/special/class.inhctor/p1.cpp
The file was modifiedclang/lib/AST/DeclCXX.cpp
Commit 61f69153e8dd7956d03ce46e30257c5bb3e41873 by nemanja.i.ibm
[PowerPC] Sign extend comparison operand for signed atomic comparisons

As of 8dacca943af8a53a23b1caf3142d10fb4a77b645, we sign extend the atomic loaded
operand for signed subword comparisons. However, the assumption that the other
operand is correctly sign extended doesn't always hold. This patch sign extends
the other operand if it needs to be sign extended.

This is a second fix for https://bugs.llvm.org/show_bug.cgi?id=30451

Differential revision: https://reviews.llvm.org/D94058
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was addedllvm/test/CodeGen/PowerPC/sign-ext-atomics.ll
The file was modifiedllvm/test/CodeGen/PowerPC/atomics-regression.ll
Commit e147eccafa157668c9cd0eb26f0042ad82425874 by yuanke.luo
[X86][AMX] Clear AMX lit test case.

Add nounwind attribute to avoid generating cfi instructions. Also make
global buffer 64 bytes align in lit test case.

Differential Revision: https://reviews.llvm.org/D94910
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-type.ll
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-config.ll
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-spill.ll
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-across-func.ll
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
Commit e3065ce238475ec202c707f4c58d90df171626ca by richard
DR2064: decltype(E) is only a dependent type if E is type-dependent, not
if E is merely instantiation-dependent.

Previously reverted in 34e72a146111dd986889a0f0ec8767b2ca6b2913;
re-committed with a fix to an issue that caused name mangling to assert.
The file was modifiedclang/test/SemaTemplate/temp_arg_template_cxx1z.cpp
The file was modifiedclang/lib/AST/Type.cpp
The file was modifiedclang/test/Sema/invalid-bitwidth-expr.mm
The file was modifiedclang/include/clang/AST/DependenceFlags.h
The file was modifiedclang/test/CXX/drs/dr20xx.cpp
The file was modifiedclang/test/SemaTemplate/dependent-expr.cpp
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/test/CodeGenCXX/mangle-subst.cpp
The file was modifiedclang/test/SemaCXX/invalid-template-base-specifier.cpp
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/www/cxx_dr_status.html
Commit fbb83f18b5485218ad3c36c1d079c89f061372b8 by richard
PR24076, PR33655, C++ CWG 1558: Consider the instantiation-dependence of
the nested-name-specifier when determining whether a qualified type is
instantiation-dependent.

Previously reverted in 25a02c3d1a688d3cd18faef96c75fa553efbbac7 due to
causing us to reject some code. It turns out that the rejected code was
ill-formed (no diagnostic required).
The file was addedclang/test/SemaTemplate/instantiation-dependence.cpp
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/test/CXX/drs/dr15xx.cpp
The file was modifiedclang/test/CodeGenCXX/mangle-template.cpp
The file was modifiedclang/include/clang/AST/Type.h
The file was modifiedclang/www/cxx_dr_status.html
The file was modifiedclang/test/SemaTemplate/partial-spec-instantiate.cpp
Commit 5a391d38ac6c561ba908334d427f26124ed9132e by richard
Following up on PR48517, fix handling of template arguments that refer
to dependent declarations.

Treat an id-expression that names a local variable in a templated
function as being instantiation-dependent.

This addresses a language defect whereby a reference to a dependent
declaration can be formed without any construct being value-dependent.
Fixing that through value-dependence turns out to be problematic, so
instead this patch takes the approach (proposed on the core reflector)
of allowing the use of pointers or references to (but not values of)
dependent declarations inside value-dependent expressions, and instead
treating template arguments as dependent if they evaluate to a constant
involving such dependent declarations.

This ends up affecting a bunch of OpenMP tests, due to OpenMP
imprecisely handling instantiation-dependent constructs, bailing out
early instead of processing dependent constructs to the extent possible
when handling the template.

Previously committed as 8c1f2d15b826591cdf6bd6b468b8a7d23377b29e, and
reverted because a dependency commit was reverted.
The file was modifiedclang/lib/AST/ExprCXX.cpp
The file was modifiedclang/test/OpenMP/teams_distribute_simd_dist_schedule_messages.cpp
The file was modifiedclang/include/clang/AST/Expr.h
The file was modifiedclang/test/OpenMP/target_parallel_for_simd_ordered_messages.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_messages.cpp
The file was modifiedclang/test/OpenMP/target_update_from_messages.cpp
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp
The file was addedclang/test/SemaTemplate/temp_arg_nontype_cxx17.cpp
The file was modifiedclang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_messages.cpp
The file was modifiedclang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
The file was modifiedclang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_messages.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_dist_schedule_messages.cpp
The file was modifiedclang/test/OpenMP/task_messages.cpp
The file was modifiedclang/test/OpenMP/teams_distribute_dist_schedule_messages.cpp
The file was modifiedclang/lib/AST/TemplateBase.cpp
The file was modifiedclang/test/OpenMP/distribute_dist_schedule_messages.cpp
The file was modifiedclang/test/OpenMP/target_parallel_for_simd_collapse_messages.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_messages.cpp
The file was modifiedclang/lib/AST/ComputeDependence.cpp
The file was removedclang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaOverload.cpp
The file was modifiedclang/test/OpenMP/target_simd_collapse_messages.cpp
The file was modifiedclang/test/OpenMP/target_update_to_messages.cpp
The file was modifiedclang/test/OpenMP/distribute_parallel_for_simd_dist_schedule_messages.cpp
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/test/OpenMP/distribute_simd_dist_schedule_messages.cpp
The file was modifiedclang/test/SemaCXX/warn-unused-lambda-capture.cpp
The file was modifiedclang/include/clang/AST/TemplateBase.h
The file was modifiedclang/test/OpenMP/distribute_parallel_for_dist_schedule_messages.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_simd_dist_schedule_messages.cpp
The file was modifiedclang/lib/AST/ExprConstant.cpp
Commit 4b574008aef5a7235c1f894ab065fe300d26e786 by richard
[c++20] P1907R1: Support for generalized non-type template arguments of scalar type.

Previously committed as 9e08e51a20d0d2b1c5724bb17e969d036fced4cd, and
reverted because a dependency commit was reverted. This incorporates the
following follow-on commits that were also reverted:

7e84aa1b81e72d44bcc58ffe1731bfc7abb73ce0 by Simon Pilgrim
ed13d8c66781b50ff007cb089c5905f9bb9e8af2 by me
95c7b6cadbc9a3d4376ef44edbeb3c8bb5b8d7fc by Sam McCall
430d5d8429473c2b10b109991d7577a3cea41140 by Dave Zarzycki
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/AST/TypeLoc.cpp
The file was modifiedclang/tools/libclang/CXCursor.cpp
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang-tools-extra/clangd/DumpAST.cpp
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was modifiedclang/lib/AST/StmtProfile.cpp
The file was modifiedclang/lib/Serialization/ASTWriter.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedlldb/include/lldb/lldb-enumerations.h
The file was modifiedclang-tools-extra/clangd/FindTarget.cpp
The file was modifiedclang/include/clang/AST/ASTContext.h
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp
The file was modifiedclang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was addedclang/test/CodeGenCXX/template-arguments.cpp
The file was modifiedclang/lib/AST/ODRHash.cpp
The file was modifiedclang/lib/AST/MicrosoftMangle.cpp
The file was modifiedclang/lib/AST/ASTStructuralEquivalence.cpp
The file was modifiedclang/test/CodeGenCXX/mangle-template.cpp
The file was modifiedclang/lib/CodeGen/CGExprConstant.cpp
The file was modifiedclang/lib/Sema/SemaLookup.cpp
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
The file was modifiedclang/test/SemaTemplate/temp_arg_nontype_cxx17.cpp
The file was modifiedclang/lib/AST/Decl.cpp
The file was modifiedclang/include/clang/AST/PropertiesBase.td
The file was modifiedclang/include/clang/AST/TemplateBase.h
The file was modifiedclang/tools/libclang/CIndex.cpp
The file was modifiedclang/lib/Sema/SemaTemplateVariadic.cpp
The file was modifiedclang/lib/Sema/SemaOverload.cpp
The file was modifiedclang/lib/Index/USRGeneration.cpp
The file was modifiedclang-tools-extra/clangd/index/remote/Client.cpp
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp
The file was modifiedclang/include/clang/AST/TemplateArgumentVisitor.h
The file was modifiedclang/lib/AST/TemplateBase.cpp
The file was modifiedclang/test/CodeGenCXX/mangle-ms-templates.cpp
Commit 24672ddea3c97fd1eca3e905b23c0116d7759ab8 by Lang Hames
[ORC] Move OrcError.h to include/llvm/ExecutionEngine/Orc/Shared.

OrcShared is the correct home for this header since Orc was split in
1d0676b54c4. (It should have been moved in that commit, but was overlooked).
The file was modifiedllvm/lib/ExecutionEngine/Orc/LLJIT.cpp
The file was removedllvm/include/llvm/ExecutionEngine/Orc/OrcError.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/Shared/OrcError.cpp
The file was addedllvm/include/llvm/ExecutionEngine/Orc/Shared/OrcError.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetServer.h
The file was modifiedllvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/ResourceTrackerTest.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/Serialization.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/RPCUtils.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/Core.cpp
Commit bfbbb62b22f8ba7cabd3b4dece4e72f62b2d972b by sivachandra
[libc][NFC] Use ASSERT_EQ instead of EXPECT_EQ in fenv/exception_status_test
The file was modifiedlibc/test/src/fenv/exception_status_test.cpp
Commit 7dadcd02d6ce0278723c87736f6278610da0ddb2 by joker.eph
Fix a few GCC compiler warnings (NFC)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
The file was modifiedmlir/lib/CAPI/Dialect/Shape.cpp
The file was modifiedmlir/tools/mlir-tblgen/OpFormatGen.cpp
The file was modifiedmlir/lib/CAPI/Dialect/Standard.cpp
The file was modifiedmlir/lib/ExecutionEngine/SparseUtils.cpp
The file was modifiedmlir/lib/CAPI/Dialect/SCF.cpp
The file was modifiedmlir/lib/Rewrite/ByteCode.cpp
The file was modifiedmlir/lib/CAPI/Dialect/Linalg.cpp
The file was modifiedmlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
The file was modifiedmlir/lib/CAPI/Dialect/Tensor.cpp
Commit ffb254978cf4e7a9cdbb4cbb51bfc589072353c1 by sivachandra
[libc][NFC][Obvious] Add a missing dep.
The file was modifiedlibc/include/CMakeLists.txt
Commit 9a0900dc4c6b3390fc886b7b556196da82ba1204 by nullptr.cpp
[NFC][AIX][XCOFF] Fix compile warning on strncpy

GCC warning:
```
In file included from /usr/include/string.h:495,
                 from /usr/include/c++/9/cstring:42,
                 from /llvm-project/llvm/include/llvm/ADT/Hashing.h:53,
                 from /llvm-project/llvm/include/llvm/ADT/ArrayRef.h:12,
                 from /llvm-project/llvm/include/llvm/MC/MCAsmBackend.h:12,
                 from /llvm-project/llvm/lib/MC/XCOFFObjectWriter.cpp:14:
In function ‘char* strncpy(char*, const char*, size_t)’,
    inlined from ‘{anonymous}::Section::Section(const char*, llvm::XCOFF::SectionTypeFlags, bool, {anonymous}::CsectGroups)’ at /llvm-project/llvm/lib/MC/XCOFFObjectWriter.cpp:146:12:
/usr/include/x86_64-linux-gnu/bits/string_fortified.h:106:34: warning: ‘char* __builtin_strncpy(char*, const char*, long unsigned int)’ specified bound 8 equals destination size [-Wstringop-truncation]
  106 |   return __builtin___strncpy_chk (__dest, __src, __len, __bos (__dest));
      |          ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
         ~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D94872
The file was modifiedllvm/lib/MC/XCOFFObjectWriter.cpp
Commit 9cf511aa08ae2a5b94e9cefe3fc60cc33358519b by shihpo.hung
[RISCV] Add intrinsics for vector AMO operations

Add vamoswap, vamoadd, vamoxor, vamoand, vamoor,
    vamomin, vamomax, vamominu, vamomaxu intrinsics.

Reviewed By: craig.topper, khchen

Differential Revision: https://reviews.llvm.org/D94589
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamoxor-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamoswap-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamomax-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamomax-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamoand-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamomin-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamominu-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamominu-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamoor-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vamoadd-rv32.ll
Commit a11f8b1ad66d68ca0a3a277ce776007abff9c7eb by marek.kurdej
[libc++] [P0935] [C++20] Eradicating unnecessarily explicit default constructors from the standard library.

http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0935r0.html

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D91292
The file was modifiedlibcxx/test/std/containers/container.adaptors/stack/stack.cons/ctor_container.pass.cpp
The file was modifiedlibcxx/test/std/containers/container.adaptors/queue/queue.cons/ctor_default.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.eng/rand.eng.mers/ctor_result_type.pass.cpp
The file was modifiedlibcxx/test/std/localization/locales/locale.convenience/conversions/conversions.buffer/ctor.pass.cpp
The file was modifiedlibcxx/test/std/containers/container.adaptors/priority.queue/priqueue.cons/ctor_comp_rcontainer.pass.cpp
The file was modifiedlibcxx/test/std/depr/depr.str.strstreams/depr.strstreambuf/depr.strstreambuf.cons/default.pass.cpp
The file was modifiedlibcxx/include/sstream
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.norm/rand.dist.norm.normal/ctor_double_double.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.bern/rand.dist.bern.bin/ctor_int_double.pass.cpp
The file was modifiedlibcxx/test/std/containers/container.adaptors/priority.queue/priqueue.cons/ctor_comp.pass.cpp
The file was modifiedlibcxx/include/queue
The file was modifiedlibcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/default.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.eng/rand.eng.lcong/ctor_result_type.pass.cpp
The file was addedlibcxx/test/support/make_implicit.h
The file was modifiedlibcxx/test/std/containers/container.adaptors/stack/stack.cons/ctor_default.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.pois/rand.dist.pois.extreme/ctor_double_double.pass.cpp
The file was modifiedlibcxx/test/std/containers/container.adaptors/queue/queue.cons/ctor_container.pass.cpp
The file was modifiedlibcxx/test/std/input.output/string.streams/stringbuf/stringbuf.cons/default.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.pois/rand.dist.pois.gamma/ctor_double_double.pass.cpp
The file was modifiedlibcxx/test/std/input.output/string.streams/stringstream.cons/default.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.pois/rand.dist.pois.exp/ctor_double.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.bern/rand.dist.bern.geo/ctor_double.pass.cpp
The file was modifiedlibcxx/include/strstream
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.norm/rand.dist.norm.chisq/ctor_double.pass.cpp
The file was modifiedlibcxx/test/std/re/re.results/re.results.const/default.pass.cpp
The file was modifiedlibcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/default.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.device/ctor.pass.cpp
The file was modifiedlibcxx/include/locale
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.bern/rand.dist.bern.bernoulli/ctor_double.pass.cpp
The file was modifiedlibcxx/test/std/containers/container.adaptors/priority.queue/priqueue.cons/ctor_comp_container.pass.cpp
The file was modifiedlibcxx/test/std/containers/container.adaptors/priority.queue/priqueue.cons/ctor_default.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.norm/rand.dist.norm.cauchy/ctor_double_double.pass.cpp
The file was modifiedlibcxx/include/random
The file was modifiedlibcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_codecvt.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.eng/rand.eng.sub/ctor_result_type.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.pois/rand.dist.pois.weibull/ctor_double_double.pass.cpp
The file was removedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.uni/rand.dist.uni.real/ctor_int_int.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.norm/rand.dist.norm.lognormal/ctor_double_double.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.norm/rand.dist.norm.t/ctor_double.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.bern/rand.dist.bern.negbin/ctor_int_double.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.norm/rand.dist.norm.f/ctor_double_double.pass.cpp
The file was addedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.uni/rand.dist.uni.real/ctor_real_real.pass.cpp
The file was modifiedlibcxx/docs/Cxx2aStatusPaperStatus.csv
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.uni/rand.dist.uni.int/ctor_int_int.pass.cpp
The file was modifiedlibcxx/include/algorithm
The file was modifiedlibcxx/test/std/containers/container.adaptors/queue/queue.cons/ctor_rcontainer.pass.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.dis/rand.dist.pois/rand.dist.pois.poisson/ctor_double.pass.cpp
The file was modifiedlibcxx/test/std/containers/container.adaptors/stack/stack.cons/ctor_rcontainer.pass.cpp
The file was modifiedlibcxx/include/regex
Commit d4bb3ef53276213d3ba8987da5f76f423b86160d by gchatelet
[libc][NFC] Remove dead code
The file was modifiedlibc/benchmarks/LibcMemoryBenchmarkMain.cpp
The file was modifiedlibc/benchmarks/JSON.cpp
Commit e517dff50a4f933d0729026901b14c7c1112a359 by gchatelet
[libc][NFC] remove dependency on non standard ssize_t

`ssize_t` is from POSIX and is not standard unfortunately.
Rewritting the code so it doesn't depend on it.

Differential Revision: https://reviews.llvm.org/D94760
The file was modifiedlibc/src/string/memmove.cpp
Commit b86e7ae66cb988dda33445c29fa64f93e7ca9c3c by tbaeder
[clang][driver][NFC][obvious] Remove obsolete unistd.h include

getuid() is not being called in this file anymore.
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit 418df4a6ab35d343cc0f2608c90a73dd9b8d0ab1 by wingo
[WebAssembly] call_indirect issues table number relocs

This patch changes to make call_indirect explicitly refer to the
corresponding function table, residualizing TABLE_NUMBER relocs against
it.

With this change, wasm-ld now sees all references to tables, and can
link multiple tables.

Differential Revision: https://reviews.llvm.org/D90948
The file was modifiedllvm/test/MC/WebAssembly/tail-call-encodings.s
The file was modifiedllvm/test/MC/WebAssembly/weak-alias.s
The file was modifiedllvm/test/MC/WebAssembly/reloc-code.ll
The file was addedllvm/test/MC/WebAssembly/call-indirect-relocs.s
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
The file was modifiedlld/test/wasm/compress-relocs.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
The file was modifiedllvm/test/MC/WebAssembly/basic-assembly.s
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td
The file was modifiedllvm/test/MC/WebAssembly/type-index.s
The file was modifiedlld/test/wasm/shared.ll
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
The file was modifiedlld/test/wasm/call-indirect.ll
The file was modifiedllvm/test/CodeGen/WebAssembly/multivalue.ll
The file was modifiedllvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/function-pointer64.ll
Commit 831a143e50cac873ec095fc7139a485173ba8c35 by wingo
[WebAssembly] Change prefix on data segment flags to WASM_DATA_SEGMENT

Element sections will also need flags, so we shouldn't squat the
WASM_SEGMENT namespace.

Depends on D90948.

Differential Revision: https://reviews.llvm.org/D92315
The file was modifiedlld/wasm/OutputSections.cpp
The file was modifiedllvm/lib/ObjectYAML/WasmEmitter.cpp
The file was modifiedllvm/lib/Object/WasmObjectFile.cpp
The file was modifiedlld/wasm/Writer.cpp
The file was modifiedllvm/include/llvm/BinaryFormat/Wasm.h
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
The file was modifiedllvm/lib/ObjectYAML/WasmYAML.cpp
Commit 39a2a233f88443e865758ba73c156787c77ead2c by Jan Svoboda
[clang][cli] Parse Lang and CodeGen options separately

This patch moves the parsing of `{Lang,CodeGen}Options` from `parseSimpleArgs` to the original `Parse{Lang,CodeGen}Args` functions.

This ensures all marshalled `LangOptions` are being parsed **after** the call `setLangDefaults`, which in turn enables us to marshall `LangOptions` that somehow depend on the defaults. (In a future patch.)

Now, `CodeGenOptions` need to be parsed **after** `LangOptions`, because `-cl-mad-enable` (a `CodeGenOpt`) depends on the value of `-cl-fast-relaxed-math` and `-cl-unsafe-math-optimizations` (`LangOpts`).

Unfortunately, this removes the nice property that marshalled options get parsed in the exact order they appear in the `.td` file. Now we cannot be sure that a TableGen record referenced in `ImpliedByAnyOf` has already been parsed. This might cause an ordering issues (i.e. reading value of uninitialized variable). I plan to mitigate this by moving each `XxxOpt` group from `parseSimpleArgs` back to their original parsing function. With this setup, if an option from group `A` references option from group `B` in TableGen, the compiler will require us to make the `CompilerInvocation` member for `B` visible in the parsing function for `A`. That's where we notice that `B` didn't get parsed yet.

Reviewed By: Bigcheese

Differential Revision: https://reviews.llvm.org/D94682
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/test/Frontend/diagnostics-order.c
The file was modifiedclang/include/clang/Frontend/CompilerInvocation.h
Commit 7e1d2224b42b411acf2d3cb20e3cf5a564ef79bb by yuanke.luo
[X86][AMX] Fix the typo.

The dpbsud should be dpbssd.

Differential Revision: https://reviews.llvm.org/D94943
The file was modifiedclang/test/CodeGen/X86/amx_api.c
The file was modifiedclang/lib/Headers/amxintrin.h
Commit c3ce2627949eee3b5d3012db78f670919a49b35d by david.sherwood
[NFC] Make remaining cost functions in LoopVectorize.cpp use InstructionCost

A previous patch has already changed getInstructionCost to return
an InstructionCost type. This patch changes the other various
getXXXCost functions to return an InstructionCost too. This is a
non-functional change - I've added a few asserts that the costs
are valid in places where we're selecting between vector call
and intrinsic costs. However, since we don't yet return invalid
costs from any of the TTI implementations these asserts should
not fire.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential Revision: https://reviews.llvm.org/D94065
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 170199f56262cc3c80591d332da3128bc25ada96 by tpopp
[llvm][nvptx] add atomicity to counter in ISelLowering

Previously uniqueCallSite could have race conditions between different
threads. Now it is accessed with an atomic RMW and will be unique
between different threads.

Differential Revision: https://reviews.llvm.org/D94784
The file was modifiedllvm/lib/Target/NVPTX/NVPTXISelLowering.h
The file was modifiedllvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Commit 95b63c7b139449b2d4084e986ca3f5bfde46b50c by Lang Hames
[ORC] Move LookupRequest from OrcShared to Orc.

It depends on Orc types (SymbolLookupSet), so can't be part of OrcShared.
The file was modifiedllvm/lib/ExecutionEngine/Orc/TargetProcessControl.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/TPCDynamicLibrarySearchGenerator.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/TargetProcessControl.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/OrcRPCTargetProcessControl.h
Commit fb5b12e42ef2255aaf6ab43cb426955257302531 by sguelton
[lit] Harmonize lit and llvm versionning

In addition to consistency, we'll hit a wall when 11.1.0 gets released, because
we cannot represent it with lit versioning scheme.

Differential Revision: https://reviews.llvm.org/D94157
The file was modifiedllvm/utils/lit/lit/__init__.py
Commit a003f26539cf4db744655e76c41f4c4a8913f116 by tpopp
[llvm] Prevent infinite loop in InstCombine of select statements

This fixes an issue where the RHS and LHS the comparison operation
creating the predicate were swapped back and forth forever.

Differential Revision: https://reviews.llvm.org/D94934
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Commit c81ea9429f8d0f4e4f7a8b3ccf29b63f4810102b by fraser
[RISCV] Add scalable-vector integer extension patterns

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D94694
The file was addedllvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
Commit 9a7672ac4980bca8829814e1e49e1c201a5bf9b6 by david.spickett
[lldb] Fix crash in "help memory read"

When a command option does not have a short version
(e.g. -f for --file), we use an arbitrary value in the
short_option field to mark it as invalid.
(though this value is unqiue to be used later for other
things)

We check that this short option is valid to print using
llvm::isPrint. This implicitly casts our int to char,
meaning we check the last char of any short_option value.

Since the arbitrary value we chose for these options is
some shortened hex version of the name, this returned true
even for invalid values.

Since llvm::isPrint returns true we later call std::islower
and/or std::isupper on the short_option value. (the int)

Calling these functions with something that cannot be validly
converted to unsigned char is undefined. Somehow we got/get
away with this but for me compiling with g++-9 I got a crash
for "help memory read".

The other command that uses this is "target variable" but that
didn't crash for unknown reasons.

Checking that short_option can fit into an unsigned char before
we call llvm::isPrint means we will not attempt to call islower/upper
on these options since we have no reason to print them.

This also fixes bogus short options being shown for "memory read"
and target variable.

For "target variable", before:
       -e <filename> ( --file <filename> )
       -b <filename> ( --shlib <filename> )
After:
       --file <filename>
       --shlib <filename>

(note that the bogus short options are just the bottom byte of our
arbitrary short_option value)

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D94917
The file was modifiedlldb/include/lldb/Utility/OptionDefinition.h
The file was modifiedlldb/test/API/commands/help/TestHelp.py
Commit 244ad228f34363b508cd1096c99d8f1bbe999d85 by yvan.roux
[ARM][MachineOutliner] Add stack fixup feature

This patch handles cases where we have to save/restore the link register
into the stack and and load/store instruction which use the stack are
part of the outlined region. It checks that there will be no overflow
introduced by the new offset and fixup these instructions accordingly.

Differential Revision: https://reviews.llvm.org/D92934
The file was addedllvm/test/CodeGen/ARM/machine-outliner-stack-fixup-arm.mir
The file was modifiedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/arm_generated_funcs.ll.generated.expected
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.h
The file was modifiedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/arm_generated_funcs.ll.nogenerated.expected
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/arm_generated_funcs.ll
The file was modifiedllvm/test/CodeGen/ARM/machine-outliner-no-lr-save.mir
The file was modifiedllvm/test/CodeGen/ARM/machine-outliner-default.mir
The file was addedllvm/test/CodeGen/ARM/machine-outliner-stack-fixup-thumb.mir
Commit 079e664661770a78e30c0d27a12d50047f1b1ea8 by pavel
[lldb] Re-enable TestPlatformProcessConnect on macos

The test couldn't find lldb-server as it's path was being overridden by
LLDB_DEBUGSERVER_PATH environment variable (pointing to debugserver).
This test should always use lldb-server, as it tests its platform
capabilities.

There's no need for the environment override, as lldb-server tests
should test the executable they just built, so I just remote the
override capability.
The file was modifiedlldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
The file was modifiedlldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
Commit e448ad787e16119f8db8cc6999896e678a0356ac by omair.javaid
[LLDB] Add support to resize SVE registers at run-time

This patch builds on previously submitted SVE patches regarding expedited
register set and per thread register infos. (D82853 D82855 and D82857)

We need to resize SVE register based on value received in expedited list.
Also we need to resize SVE registers when we write vg register using
register write vg command. The resize will result in a updated offset
for all of fpr and sve register set. This offset will be configured
in native register context by RegisterInfoInterface and will also be
be updated on client side in GDBRemoteRegisterContext.

A follow up patch will provide a API test to verify this change.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D82863
The file was modifiedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h
Commit 4d3081331ad854e0bff5032c818ec6414fb974c0 by omair.javaid
[LLDB] Test SVE dynamic resize with multiple threads

This patch adds a new test case which depends on AArch64 SVE support and
dynamic resize capability enabled. It created two seperate threads which
have different values of sve registers and SVE vector granule at various
points during execution.

We test that LLDB is doing the size and offset updates properly for all
of the threads including the main thread and when we VG is updated using
prctl call or by 'register write vg' command the appropriate changes are
also update in register infos.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D82866
The file was addedlldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/main.c
The file was addedlldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/Makefile
The file was addedlldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/TestSVEThreadedDynamic.py
Commit 83daa49758a12d585fe2d9a64448e54d91bcfaff by flo
[LoopRotate] Add PrepareForLTO stage, avoid rotating with inline cands.

D84108 exposed a bad interaction between inlining and loop-rotation
during regular LTO, which is causing notable regressions in at least
CINT2006/473.astar.

The problem boils down to: we now rotate a loop just before the vectorizer
which requires duplicating a function call in the preheader when compiling
the individual files ('prepare for LTO'). But this then prevents further
inlining of the function during LTO.

This patch tries to resolve this issue by making LoopRotate more
conservative with respect to rotating loops that have inline-able calls
during the 'prepare for LTO' stage.

I think this change intuitively improves the current situation in
general. Loop-rotate tries hard to avoid creating headers that are 'too
big'. At the moment, it assumes all inlining already happened and the
cost of duplicating a call is equal to just doing the call. But with LTO,
inlining also happens during full LTO and it is possible that a previously
duplicated call is actually a huge function which gets inlined
during LTO.

From the perspective of LV, not much should change overall. Most loops
calling user-provided functions won't get vectorized to start with
(unless we can infer that the function does not touch memory, has no
other side effects). If we do not inline the 'inline-able' call during
the LTO stage, we merely delayed loop-rotation & vectorization. If we
inline during LTO, chances should be very high that the inlined code is
itself vectorizable or the user call was not vectorizable to start with.

There could of course be scenarios where we inline a sufficiently large
function with code not profitable to vectorize, which would have be
vectorized earlier (by scalarzing the call). But even in that case,
there probably is no big performance impact, because it should be mostly
down to the cost-model to reject vectorization in that case. And then
the version with scalarized calls should also not be beneficial. In a way,
LV should have strictly more information after inlining and make more
accurate decisions (barring cost-model issues).

There is of course plenty of room for things to go wrong unexpectedly,
so we need to keep a close look at actual performance and address any
follow-up issues.

I took a look at the impact on statistics for
MultiSource/SPEC2000/SPEC2006. There are a few benchmarks with fewer
loops rotated, but no change to the number of loops vectorized.

Reviewed By: sanwou01

Differential Revision: https://reviews.llvm.org/D94232
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopRotationUtils.h
The file was modifiedllvm/include/llvm/Transforms/Scalar/LoopRotation.h
The file was modifiedllvm/include/llvm/Analysis/CodeMetrics.h
The file was modifiedllvm/lib/Analysis/CodeMetrics.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopRotationUtils.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopRotation.cpp
The file was modifiedllvm/test/Transforms/LoopRotate/call-prepare-for-lto.ll
The file was modifiedllvm/include/llvm/Transforms/Scalar.h
The file was modifiedllvm/lib/Transforms/IPO/PassManagerBuilder.cpp
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
Commit 49dce85584e34ee7fb973da9ba617169fd0f103c by jay.foad
[AMDGPU] Simplify AMDGPUInstPrinter::printExpSrcN. NFC.

Change-Id: Idd7f47647bc0faa3ad6f61f44728c0f20540ec00
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
Commit 58bdfcfac048563e0dbcecc7c75e4e7897c8da18 by hans
Revert 5238e7b302 "[InstCombine] Replace one-use select operand based on condition"

This caused a miscompile in Chromium, see comments on the codereview for
discussion and pointer to a reproducer.

> InstCombine already performs a fold where X == Y ? f(X) : Z is
> transformed to X == Y ? f(Y) : Z if f(Y) simplifies. However,
> if f(X) only has one use, then we can always directly replace the
> use inside the instruction. To actually be profitable, limit it to
> the case where Y is a non-expr constant.
>
> This could be further extended to replace uses further up a one-use
> instruction chain, but for now this only looks one level up.
>
> Among other things, this also subsumes D94860.
>
> Differential Revision: https://reviews.llvm.org/D94862

This also reverts the follow-up
a003f26539cf4db744655e76c41f4c4a8913f116:

> [llvm] Prevent infinite loop in InstCombine of select statements
>
> This fixes an issue where the RHS and LHS the comparison operation
> creating the predicate were swapped back and forth forever.
>
> Differential Revision: https://reviews.llvm.org/D94934
The file was modifiedllvm/test/Transforms/InstCombine/select-safe-transforms.ll
The file was modifiedllvm/test/Transforms/InstCombine/select-binop-cmp.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Commit 5626adcd6bbaadd12fe5bf15cd2d39ece2e5c406 by llvm-dev
[X86][SSE] combineVectorSignBitsTruncation - fold trunc(srl(x,c)) -> packss(sra(x,c))

If a srl doesn't introduce any sign bits into the truncated result, then replace with a sra to let us use a PACKSS truncation - fixes a regression noticed in D56387 on pre-SSE41 targets that don't have PACKUSDW.
The file was modifiedllvm/test/CodeGen/X86/vector-trunc.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 11f4c58c153cedf6fe04cab49d4a4f02d00e3383 by pifon
[mlir] Add `complex.abs`, `complex.div` and `complex.mul` to ComplexOps.

Differential Revision: https://reviews.llvm.org/D94911
The file was modifiedmlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
The file was modifiedmlir/test/Dialect/Complex/ops.mlir
The file was modifiedmlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
The file was modifiedmlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
Commit 87dfd5e012e147f4bfa3a9a4564e9cbc167278ff by andrzej.warzynski
[flang][driver] Add support for `-I` in the new driver

Add support for option -I in the new Flang driver. This will allow for
included headers and module files in other directories, as the default
search path is currently the working folder. The behaviour of this is
consistent with the current f18 driver, where the current folder (i.e.
".") has the highest priority followed by the order of '-I's taking
priority from first to last.

Summary of changes:
- Add SearchDirectoriesFromDashI to PreprocessorOptions, to be forwarded
  into the parser's searchDirectories
- Add header files and non-functional module files to be used in
  regression tests. The module files are just text files and are used to
  demonstrated that paths specified with `-I` are taken into account when
  searching for .mod files.

Differential Revision: https://reviews.llvm.org/D93453
The file was modifiedflang/lib/Frontend/CompilerInvocation.cpp
The file was addedflang/test/Flang-Driver/Inputs/header-dir/basic-header-one.h
The file was addedflang/test/Flang-Driver/Inputs/header-dir/basic-header-two.h
The file was modifiedflang/include/flang/Frontend/PreprocessorOptions.h
The file was addedflang/test/Flang-Driver/Inputs/basictestmoduleone.mod
The file was modifiedflang/test/Flang-Driver/driver-help-hidden.f90
The file was modifiedclang/lib/Driver/ToolChains/Flang.cpp
The file was addedflang/test/Flang-Driver/Inputs/module-dir/basictestmoduletwo.mod
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedflang/test/Flang-Driver/Inputs/basic-header-one.h
The file was addedflang/test/Flang-Driver/include-header.f90
The file was addedflang/test/Flang-Driver/Inputs/basic-header-two.h
The file was addedflang/test/Flang-Driver/include-module.f90
The file was modifiedflang/test/Flang-Driver/driver-help.f90
Commit b7e516202eb66e004c49b89964bd5b30b287af87 by orlando.hyams
[DebugInfo][dexter] Add dexter tests for merged values

These dexter tests illustrate PR48719, the summary of which is:

Sometimes we insert dbg.values for merged values (PHIs) when promoting
variables, sometimes we don't. Sometimes there is no PHI because the merged
value is never used. It doesn't matter because LiveDebugValues understands these
merged values (implicit or otherwise) and correctly updates the debug
info. Importantly, these merged variable values (which may or may not exist as
PHIs, and may or not be represented with dbg.values) are //always// implicitly
defined by the combination of incoming edges and the incoming variable locations
along those edges by virtue of LiveDebugValues existing. Unfortunately, it is
possible to mess with the CFG and remove / move these edges before
LiveDebugValues runs. In this case our debug info model only works when the
merged value is tracked by a dbg.value. Currently, this is only done rigorously
for variables which are A) promoted in the first round of mem2reg and B) are
used after the merge point.

As an example, compile the following source with -O3 -g and step through with a
debugger. You will see parama=5 throughout the function fun which is incorrect -
we expect to see param=20 after the conditional assignment.

    __attribute__((optnone))
    void esc(int* p) {}

    __attribute__((optnone))
    void fluff() {}

    __attribute__((noinline))
    int fun(int parama, int paramb) {
      if (parama)
        parama = paramb;
      fluff();           // DexLabel('s0')
      esc(&parama);
      return 0;
    }

    int main() {
      return fun(5, 20);
    }

1. parama is escaped by esc(&parama) so it is not promoted by
   SROA/mem2reg (failing condition "A" above).
2. InstCombine's LowerDbgDeclare converts the dbg.declare to a set of
   dbg.values (tracking the stored SSA values).
3. InstCombine replaces the two stores to parama's alloca (the initial
   parameter register store in entry and the assignment in if.then) with a
   PHI+store in the common sucessor.
4. SimplifyCFG folds the blocks together and converts the PHI to a
   select.

The debug info is not updated to account for the merged value in the successor
prior to SimplifyCFG when it exists as a PHI, or during when it becomes a
select.

As with D89543, which added some dexter tests for escaped locals, the idea is
to build a set of source-level tests which highlights existing issues and
might be useful in evaluating a new debug info model.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D94761
The file was addeddebuginfo-tests/dexter-tests/memvars/merged-store.c
The file was addeddebuginfo-tests/dexter-tests/memvars/inline-escaping-function.c
The file was addeddebuginfo-tests/dexter-tests/memvars/unused-merged-value.c
Commit 172f1f8952c977c0101ba19e6ecb9474aa3bdd4b by caroline.concatto
[AArch64][SVE]Add cost model for vector reduce for scalable vector

This patch computes the cost for vector.reduce<operand> for scalable vectors.
The cost is split into two parts:  the legalization cost and the horizontal
reduction.

Differential Revision: https://reviews.llvm.org/D93639
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was addedllvm/test/Analysis/CostModel/AArch64/sve-getIntrinsicInstrCost-vector-reduce.ll
Commit 2c4f6be86c14c28243915ab9eb3a2ff1902fee99 by Abhina.Sreeskantharajan
[SystemZ][z/OS] Fix No such file or directory expression error

On z/OS, the following error message is not matched correctly in lit tests. This patch updates the CHECK expression to match the end period successfully.
```
EDC5129I No such file or directory.
```

Differential Revision: https://reviews.llvm.org/D94239
The file was modifiedclang/test/Frontend/stats-file.c
Commit 9a60ad216d2fa2e9701849922bfb0db9917f9c93 by zinenko
[mlir] Clarify docs around LLVM dialect-compatible types

Explicitly mention that there is exactly one MLIR type that corresponds
to a given LLVM IR type.
The file was modifiedmlir/docs/Dialects/LLVM.md
Commit a6f9077b16da90204b296acd4f840769e83460ac by adamcz
[clang] Check for nullptr when instantiating late attrs

This was already done in SemaTemplateInstantiateDecl.cpp, but not in
SemaTemplateInstantiate.cpp.

Anecdotally I've seen some clangd crashes where coredumps point to this
being a problem, but I cannot reproduce this so far.

Differential Revision: https://reviews.llvm.org/D94933
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp
Commit 443d6957ca712aacdfd72c3408a8837580f6a286 by andrzej.warzynski
[flang][driver] Add support for fixed form detection

Currently the new flang driver always runs in free form mode. This patch
adds support for fixed form mode detection based on the file extensions.

Like `f18`, `flang-new` will treat files ending with ".f", ".F" and
".ff" as fixed form. Additionally, ".for", ".FOR", ".fpp" and ".FPP"
file extensions are recognised as fixed form files. This is consistent
with gfortran [1]. In summary, files with the following extensions are
treated as fixed-form:
  * ".f", ".F", ".ff", ".for", ".FOR", ".fpp", ".FPP"

For consistency with flang/test/lit.cfg.py and f18, this patch also adds
support for the following file extensions:
  * ".ff", ".FOR", ".for", ".ff90", ".fpp", ".FPP"
This is added in flang/lib/Frontend/FrontendOptions.cpp. Additionally,
the following extensions are included:
  * ".f03", ".F03", ".f08", ".F08"
This is for compatibility with gfortran [1] and other popular Fortran
compilers [2].

NOTE: internally Flang will only differentiate between fixed and free
form files. Currently Flang does not support switching between language
standards, so in this regard file extensions are irrelevant. More
specifically, both `file.f03` and `file.f18` are represented with
`Language::Fortran` (as opposed to e.g. `Language::Fortran03`).

Summary of changes:
- Set Fortran::parser::Options::sFixedForm according to the file type
- Add isFixedFormSuffix and isFreeFormSuffix helper functions to
  FrontendTool/Utils.h
- Change FrontendOptions::GetInputKindForExtension to support the missing
  file extensions that f18 supports and some additional ones
- FrontendActionTest.cpp is updated to make sure that the test input is
  treated as free-form

[1] https://gcc.gnu.org/onlinedocs/gfortran/GNU-Fortran-and-GCC.html
[2] https://github.com/llvm/llvm-project/blob/master/flang/docs/OptionComparison.md#notes

Differential Revision: https://reviews.llvm.org/D94228
The file was modifiedflang/lib/Frontend/FrontendOptions.cpp
The file was modifiedflang/include/flang/FrontendTool/Utils.h
The file was addedflang/test/Flang-Driver/fixed-free-detection.f90
The file was addedflang/test/Flang-Driver/Inputs/free-form-test.f90
The file was modifiedflang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
The file was addedflang/test/Flang-Driver/Inputs/fixed-form-test.f
The file was modifiedflang/lib/Frontend/FrontendAction.cpp
The file was modifiedflang/test/lit.cfg.py
The file was modifiedflang/unittests/Frontend/FrontendActionTest.cpp
Commit d77a57208770470d546194ad81bd01ae5d94df0d by orlando.hyams
[DebugInfo][dexter] Tweak dexter test for merged values

Tweak dexter-tests/memvars/inline-escaping-function.c added in D94761
(b7e516202eb6) by adding a 'param' use after the merge point. The test XFAILS
with and without this change, but without it the test looks very similar to
memvars/unused-merged-value.c. The test now demonstrates the problem more
clearly.
The file was modifieddebuginfo-tests/dexter-tests/memvars/inline-escaping-function.c
Commit a60bc55c693609e9417419b72754b9984f52acbe by Andrey.Churbanov
[OpenMP] libomp: cleanup parsing of OMP_ALLOCATOR env variable.

Differential Revision: https://reviews.llvm.org/D94932
The file was addedopenmp/runtime/test/env/omp_alloc_env_invalid.c
The file was modifiedopenmp/runtime/src/kmp_settings.cpp
Commit 197d9a55f105391f34a0657e6c1d5ef3166dad7d by andrzej.warzynski
[flang][driver] Add standard macro predefinitions for compiler version

Add the following standard predefinitions that f18 supports:
  * `__flang__`,
  * `__flang_major__`,
  * `__flang_minor__`,
  * `__flang_patchlevel__`

Summary of changes:
- Populate Fortran::parser::Options#predefinitions with the default
  supported predefinitions

Differential Revision: https://reviews.llvm.org/D94516
The file was addedflang/test/Flang-Driver/predefined-macros-compiler-version.f90
The file was modifiedflang/lib/Frontend/CompilerInvocation.cpp
Commit 1d37db6ef53db453534b9edfcc6a58c4f4f5c914 by medismail.bennani
[llvm/Orc] Fix ExecutionEngine module build breakage

This patch updates the llvm module map to reflect changes made in
`24672ddea3c97fd1eca3e905b23c0116d7759ab8` and fixes the module builds
(`-DLLVM_ENABLE_MODULES=On`).

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
The file was modifiedllvm/include/llvm/module.modulemap
Commit ec877106a38b760229a2d676b7d2278b2bade8ab by hans
[ThinLTO] Also prune Thin-* files from the ThinLTO cache

Such files (Thin-%%%%%%.tmp.o) are supposed to be deleted immediately
after they're used (either by renaming or deletion). However, we've seen
instances on Windows where this doesn't happen, probably due to the
filesystem being flaky. This is effectively a resource leak which has
prevented us from using the ThinLTO cache on Windows.

Since those temporary files are in the thinlto cache directory which we
prune periodically anyway, allowing them to be pruned too seems like a
tidy way to solve the problem.

Differential revision: https://reviews.llvm.org/D94962
The file was modifiedlld/test/COFF/lto-cache.ll
The file was modifiedllvm/lib/Support/CachePruning.cpp
Commit 93a873dfc9ee7e8b4386dea87e43c5f238eeef06 by nicolas.vasilache
[mlir][Affine] Revisit and simplify composeAffineMapAndOperands.

In prehistorical times, AffineApplyOp was allowed to produce multiple values.
This allowed the creation of intricate SSA use-def chains.
AffineApplyNormalizer was originally introduced as a means of reusing the AffineMap::compose method to write SSA use-def chains.
Unfortunately, symbols that were produced by an AffineApplyOp needed to be promoted to dims and reordered for the mathematical composition to be valid.

Since then, single result AffineApplyOp became the law of the land but the original assumptions were not revisited.

This revision revisits these assumptions and retires AffineApplyNormalizer.

Differential Revision: https://reviews.llvm.org/D94920
The file was modifiedmlir/include/mlir/Dialect/Affine/IR/AffineOps.h
The file was modifiedmlir/test/Dialect/Affine/canonicalize.mlir
The file was modifiedmlir/lib/IR/AffineMap.cpp
The file was modifiedmlir/include/mlir/IR/AffineMap.h
The file was removedmlir/test/Dialect/Affine/SuperVectorize/normalize_maps.mlir
The file was modifiedmlir/test/Dialect/Affine/affine-data-copy.mlir
The file was modifiedmlir/test/lib/Dialect/Affine/TestVectorizationUtils.cpp
The file was modifiedmlir/test/EDSC/builder-api-test.cpp
The file was modifiedmlir/test/Dialect/Linalg/reshape_fusion.mlir
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
The file was modifiedmlir/include/mlir/IR/AffineExpr.h
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineValueMap.cpp
The file was modifiedmlir/lib/IR/AffineExpr.cpp
Commit 6259fbd8b69531133d24b5367a6a2cd9b183ce48 by Tim Northover
AArch64: add apple-a14 as a CPU

This CPU supports all v8.5a features except BTI, and so identifies as v8.5a to
Clang. A bit weird, but the best way for things like xnu to detect the new
features it cares about.
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
The file was modifiedllvm/include/llvm/Support/AArch64TargetParser.def
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.cpp
The file was modifiedllvm/unittests/Support/TargetParserTest.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
Commit 3a56a96664de955888d63c49a33808e3a1a294d9 by antiagainst
[mlir][spirv] Define spv.GLSL.Fma and add lowerings

Also changes some rewriter.create + rewriter.replaceOp calls
into rewriter.replaceOpWithNewOp calls.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D94965
The file was modifiedmlir/test/Conversion/VectorToSPIRV/simple.mlir
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td
The file was modifiedmlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
The file was modifiedmlir/test/Dialect/SPIRV/IR/glsl-ops.mlir
The file was modifiedmlir/test/Target/SPIRV/glsl-ops.mlir
Commit 626681b09a3e87cfeda54a3cd00f7b0ed9df3bcc by Raphael Isemann
[lldb] Fix two documentation typos
The file was modifiedlldb/include/lldb/lldb-enumerations.h
The file was modifiedlldb/bindings/interface/SBListener.i
Commit 2988f940d861f0fa76bc5b749772f2b9239d5a1b by llvm-dev
[X86] Regenerate fmin/fmax reduction tests

Add missing check-prefixes + v1f32 tests
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-fmax.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-fmin.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll
Commit c42f5ca3d84c7b0d4e735ab3794718c429369309 by praveen
[Flang][OpenMP] Add semantic checks for OpenMP Workshare Construct

Add Semantic checks for OpenMP 4.5 - 2.7.4 Workshare Construct.

- The structured block in a workshare construct may consist of only
   scalar or array assignments, forall or where statements,
   forall, where, atomic, critical or parallel constructs.

- All array assignments, scalar assignments, and masked array
   assignments must be intrinsic assignments.

- The construct must not contain any user defined function calls unless
   the function is ELEMENTAL.

Test cases : omp-workshare03.f90, omp-workshare04.f90, omp-workshare05.f90

Resolve test cases (omp-workshare01.f90 and omp-workshare02.f90) marked as XFAIL

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D93091
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp
The file was addedflang/test/Semantics/omp-workshare04.f90
The file was modifiedflang/test/Semantics/omp-workshare02.f90
The file was addedflang/test/Semantics/omp-workshare05.f90
The file was addedflang/test/Semantics/omp-workshare03.f90
The file was modifiedflang/test/Semantics/omp-workshare01.f90
The file was modifiedflang/lib/Semantics/check-omp-structure.h
Commit 3747b69b531299f7a2a0289b8a59ac7234e47d4f by flo
[LoopRotate] Calls not lowered to calls should not block rotation.

83daa49758a1 made loop-rotate more conservative in the presence of
function calls in the prepare-for-lto stage. The code did not properly
account for calls that are no actual function calls, like calls to
intrinsics. This patch updates the code to ensure only calls that are
lowered to actual calls are considered inline candidates.
The file was modifiedllvm/test/Transforms/LoopRotate/call-prepare-for-lto.ll
The file was modifiedllvm/lib/Analysis/CodeMetrics.cpp
Commit 077a84f911403dc92d7918aebfb5611b6e0677d2 by Alexander.Richardson
[libc++] Sync TEST_HAS_TIMESPEC_GET and _LIBCPP_HAS_TIMESPEC_GET on FreeBSD

Commit 5e416ba943b7c737deb8eca62756f7b4fa925845 (D71522) updated the
__config header but didn't change test_macros.h.
This fixes libcxx/language.support/has_timespec_get.compile.pass.cpp on
FreeBSD12/13.

Reviewed By: #libc, dim, ldionne

Differential Revision: https://reviews.llvm.org/D94292
The file was modifiedlibcxx/test/support/test_macros.h
Commit 54e38440e74f98ec58a22d7d8f9fc5e550ce65aa by david.green
[ARM] Expand add.sat/sub.sat cost checks. NFC
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-ssat.ll
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-usat.ll
Commit 1a9b6e4a327f20189adde1129019c6652b818b43 by wingo
[WebAssembly][lld] Fix call-indirect.s test to validate

Add missing address operand, so that we can validate the output files.

Depends on D92315.

Differential Revision: https://reviews.llvm.org/D92320
The file was modifiedlld/test/wasm/Inputs/call-indirect.s
The file was modifiedlld/test/wasm/call-indirect.ll
The file was modifiedlld/test/wasm/compress-relocs.ll
Commit 8bf7116d50bfe8cb881273798ff384ed965c05e9 by usx
[clangd] Index local classes, virtual and overriding methods.

Previously we did not record local class declarations. Now with features like
findImplementation and typeHierarchy, we have a need to index such local
classes to accurately report subclasses and implementations of methods.

Performance testing results:
- No changes in indexing timing.
- No significant change in memory usage.
- **1%** increase in #relations.
- **0.17%** increase in #refs.
- **0.22%** increase #symbols.

**New index stats**
Time to index: **4:13 min**
memory usage **543MB**
number of symbols: **521.5K**
number of refs: **8679K**
number of relations: **49K**

**Base Index stats**
Time to index: **4:15 min**
memory usage **542MB**
number of symbols: **520K**
number of refs: **8664K**
number of relations: **48.5K**

Fixes: https://github.com/clangd/clangd/issues/644

Differential Revision: https://reviews.llvm.org/D94785
The file was modifiedclang-tools-extra/clangd/unittests/FindSymbolsTests.cpp
The file was modifiedclang-tools-extra/clangd/index/SymbolCollector.h
The file was modifiedclang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
The file was modifiedclang-tools-extra/clangd/index/FileIndex.cpp
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
The file was modifiedclang-tools-extra/clangd/index/Serialization.cpp
The file was modifiedclang-tools-extra/clangd/index/IndexAction.cpp
The file was modifiedclang-tools-extra/clangd/index/SymbolCollector.cpp
The file was modifiedclang-tools-extra/clangd/test/index-serialization/Inputs/sample.idx
Commit 480643a95cd157e654f4f97e8231b18850e7d79a by raul
[CMake] Remove dead code setting policies to NEW

cmake_minimum_required(VERSION) calls cmake_policy(VERSION),
which sets all policies up to VERSION to NEW.
LLVM started requiring CMake 3.13 last year, so we can remove
a bunch of code setting policies prior to 3.13 to NEW as it
no longer has any effect.

Reviewed By: phosek, #libunwind, #libc, #libc_abi, ldionne

Differential Revision: https://reviews.llvm.org/D94374
The file was modifiedllvm/CMakeLists.txt
The file was modifiedlibcxx/CMakeLists.txt
The file was modifiedlibunwind/CMakeLists.txt
The file was modifiedflang/CMakeLists.txt
The file was modifiedlibcxx/utils/ci/runtimes/CMakeLists.txt
The file was modifiedlldb/CMakeLists.txt
The file was modifiedcompiler-rt/CMakeLists.txt
The file was modifiedclang/CMakeLists.txt
The file was modifiedlibcxxabi/CMakeLists.txt
The file was modifiedmlir/examples/standalone/CMakeLists.txt
Commit 909d6c86eae32ef350ac35ba8564ed728544ac63 by wei.huang
[PowerPC] Fix the check for the instruction using FRSP/XSRSP output register

When performing peephole optimization to simplify the code, after removing
passed FPSP/XSRSP instruction we will set any uses of that FRSP/XSRSP to the
source of the FRSP/XSRSP.

We are finding the machine instruction using virtual register holding FRSP/XSRSP
results by searching all following instructions and encountering an issue
that the first use of the virtual register is a debug MI causing:
1. virtual register in the debug MI removed unexpectedly.
2. virtual register used in non-debug MI not replaced with the source of
  FRSP/XSRSP. which stays in a undef status.

This patch fix the issue by only searching non-debug machine instruction using
virtual register holding FRSP/XSRSP results when the vr only has one non debug
usage.

Differential Revisien: https://reviews.llvm.org/D94711
Reviewed by: nemanjai
The file was modifiedllvm/lib/Target/PowerPC/PPCMIPeephole.cpp
The file was addedllvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll
Commit 6bd0a4451ccd4a5cbab1f735052edbcafcb856ea by clementval
[flang][directive] Get rid of flangClassValue in TableGen

The TableGen emitter for directives has two slots for flangClass information and this was mainly
to be able to keep up with the legacy openmp parser at the time. Now that all clauses are encapsulated in
AccClause or OmpClause, these two strings are not necessary anymore and were the the source of couple
of problem while working with the generic structure checker for OpenMP.
This patch remove the flangClassValue string from DirectiveBase.td and use the string flangClass as the
placeholder for the encapsulated class.

Reviewed By: sameeranjoshi

Differential Revision: https://reviews.llvm.org/D94821
The file was modifiedflang/lib/Lower/OpenMP.cpp
The file was modifiedllvm/test/TableGen/directive1.td
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMP.td
The file was modifiedllvm/include/llvm/TableGen/DirectiveEmitter.h
The file was modifiedllvm/test/TableGen/directive2.td
The file was modifiedflang/lib/Parser/openmp-parsers.cpp
The file was modifiedllvm/include/llvm/Frontend/OpenACC/ACC.td
The file was modifiedllvm/include/llvm/Frontend/Directive/DirectiveBase.td
The file was modifiedllvm/utils/TableGen/DirectiveEmitter.cpp
The file was modifiedflang/lib/Parser/unparse.cpp
Commit f373b30923d7a83985e59ec76a566dd889e684d9 by david.green
[ARM] Add MVE add.sat costs

This adds some basic MVE sadd_sat/ssub_sat/uadd_sat/usub_sat costs,
based on when the instruction is legal. With smaller than legal types
that are promoted we generate shr(qadd(shl, shl)), so the cost is 4
appropriately.

Differential Revision: https://reviews.llvm.org/D94958
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-ssat.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-usat.ll
Commit 15fd6bae0e4938ebbd4751a4ba1c85b4145894b5 by fraser
[RISCV] Extend RVV VType info with the type's AVL (NFC)

This patch factors out the "VLMax" operand passed to most
scalable-vector ISel patterns into a property of each VType.

This is seen as a preparatory change to allow RVV in the future to
more easily support fixed-length vector types with constrained vector
lengths, with the AVL operand set to the length of the fixed-length
vector. It has no effect on the scalable code generation path.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D94594
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Commit 2d911f7c72f9174a34f74abe2909f992b03caaf1 by hansang.bae
[OpenMP] Fix atomic entries for captured logical operation

Added missing code for the captured atomic operation.

Differential Revision: https://reviews.llvm.org/D94848
The file was modifiedopenmp/runtime/src/kmp_atomic.cpp
Commit de2f9423995d52a5457752256815dc54d317c8d1 by jay.foad
[AMDGPU] Simplify test case for D94010
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
Commit 27820496a71d5f73950e0d57b5dead236304b4e7 by kareem.ergawy
[MLIR][SPIRV] Add `SignedOp` trait.

This commit adds a new trait that can be attached to ops that have
signed semantics.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D94896
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
Commit 0808c7009a06773e78772c7b74d254fd3572f0ea by jay.foad
[AMDGPU] Fix test case for D94010
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
Commit 051ec9f5f43a83e23bd3e20e512fc5ec44c19850 by nikita.ppv
[ValueTracking] Strengthen impliesPoison reasoning

Split impliesPoison into two recursive walks, one over V, the
other over ValAssumedPoison. This allows us to reason about poison
implications in a number of additional cases that are important
in practice. This is a generalized form of D94859, which handles
the cmp to cmp implication in particular.

Differential Revision: https://reviews.llvm.org/D94866
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/test/Transforms/InstCombine/select-and-or.ll
Commit cbdde495ba28915d52b561e44aaba12db4cf724f by bjoern
[clang-format] Apply Allman style to lambdas

Differential Revision: https://reviews.llvm.org/D94906
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/lib/Format/Format.cpp
Commit 71b6b010e6bc49caaec511195e33ac1f43f07c64 by stellaraccident
[mlir][python] Factor out standalone OpView._ods_build_default class method.

* This allows us to hoist trait level information for regions and sized-variadic to class level attributes (_ODS_REGIONS, _ODS_OPERAND_SEGMENTS, _ODS_RESULT_SEGMENTS).
* Eliminates some splicey python generated code in favor of a native helper for it.
* Makes it possible to implement custom, variadic and region based builders with one line of python, without needing to manually code access to the segment attributes.
* Needs follow-on work for region based callbacks and support for SingleBlockImplicitTerminator.
* A follow-up will actually add ODS support for generating custom Python builders that delegate to this new method.
* Also includes the start of an e2e sample for constructing linalg ops where this limitation was discovered (working progressively through this example and cleaning up as I go).

Differential Revision: https://reviews.llvm.org/D94738
The file was addedmlir/examples/python/linalg_matmul.py
The file was modifiedmlir/docs/Bindings/Python.md
The file was modifiedmlir/test/mlir-tblgen/op-python-bindings.td
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp
The file was modifiedmlir/lib/Bindings/Python/IRModules.h
The file was modifiedmlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
The file was addedmlir/test/Bindings/Python/ods_helpers.py
Commit cea3abc26f7cbc4ec4cf4cf73b4cce5f926420a9 by andrzej.warzynski
[flang][driver] Move isFixedFormSuffix and isFreeFormSuffix to flangFrontend

isFixedFormSuffix and isFreeFormSuffix should be defined in
flangFrontend rather than flangFrontendTool library. That's for 2
reasons:
  * these methods are used in flangFrontend rather than flangFrontendTool
  * flangFrontendTool depends on flangFrontend

As mentioned in the post-commit review for D94228, without this change
shared library builds fail.

Differential Revision: https://reviews.llvm.org/D94968
The file was modifiedflang/lib/Frontend/FrontendAction.cpp
The file was modifiedflang/include/flang/Frontend/FrontendOptions.h
The file was modifiedflang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
The file was modifiedflang/include/flang/FrontendTool/Utils.h
The file was modifiedflang/lib/Frontend/FrontendOptions.cpp
Commit 3cae8b33297b14449514a87dcaa8996ba40db412 by Raphael Isemann
[lldb][docs] Add a doc page for enums and constants

Enums and constants are currently missing in the new LLDB Python API docs.

In theory we could just let them be autogenerated like the SB API classes, but sadly the generated documentation
suffers from a bunch of problems. Most of these problems come from the way SWIG is representing enums, which is
done by translating every single enum case into its own constant. This has a bunch of nasty effects:

* Because SWIG throws away the enum types, we can't actually reference the enum type itself in the API. Also because automodapi is impossible to script, this can't be fixed in post (at least without running like sed over the output files).
* The lack of enum types also causes that every enum *case* has its own full doc page. Having a full doc page that just shows a single enum case is pointless and it really slows down sphinx.
* There is no SWIG code for the enums, so there is also no place to write documentation strings for them. Also there is no support for copying the doxygen strings (which would be in the wrong format, but better than nothing) for enums (let alone our defines), so we can't really document all this code.
* Because the enum cases are just forwards to the native lldb module (which we mock), automodapi actually takes the `Mock` docstrings and adds it to every single enum case.

I don't see any way to solve this via automodapi or SWIG. The most reasonable way to solve this is IMHO to write a simple Clang tool
that just parses our enum/constant headers and emits an *.rst file that we check in. This way we can do all the LLDB-specific enum case and constant
grouping that we need to make a readable documentation page.

As we're without any real documentation until I get around to write that tool, I wrote a doc page for the enums/constants as a stop gap measure.
Most of this is done by just grepping our enum header and then manually cleaning up all the artifacts and copying the few doc strings we have.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D94959
The file was addedlldb/docs/python_api_enums.rst
The file was modifiedlldb/bindings/interface/SBLanguageRuntime.i
The file was modifiedlldb/bindings/python/python.swig
Commit 6a563eef1321f742fa06482f4536cd41fb8e24c7 by david.green
[ARM] Expand vXi1 VSELECT's

We have no lowering for VSELECT vXi1, vXi1, vXi1, so mark them as
expanded to turn them into a series of logical operations.

Differential Revision: https://reviews.llvm.org/D94946
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-overflow.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was addedllvm/test/CodeGen/Thumb2/mve-pred-vselect.ll
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-ssat.ll
Commit 2f8099509030d3352ac211b1fbae4c6c32b0bfa7 by Raphael Isemann
[lldb][docs] Update .htaccess to redirect from old SB API documentation to new one

This is mostly SEO so that the new API can take over the old API when people
search for the different SB* classes. Sadly epydoc decided to throw in a -class
prefix behind all the class file names, so we can't just overwrite the old files
with the newly generated ones.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D94900
The file was modifiedlldb/docs/.htaccess
Commit 842314b5f078b5c63df1d7e271fc6fad8461d44f by llvm-project
[Polly] Update isl to isl-0.23-61-g24e8cd12.

This fixes llvm.org/PR48554

Some test cases had to be updated because the hash function for
union_maps have been changed which affects the output order.
The file was modifiedpolly/lib/External/isl/include/isl/multi.h
The file was removedpolly/lib/External/isl/test_inputs/gist1.polylib
The file was modifiedpolly/lib/External/isl/interface/compile
The file was modifiedpolly/lib/External/isl/isl_polynomial_private.h
The file was modifiedpolly/lib/External/isl/isl_test.c
The file was modifiedpolly/lib/External/isl/include/isl/union_map.h
The file was modifiedpolly/lib/External/isl/isl_pw_union_opt.c
The file was modifiedpolly/test/DependenceInfo/reduction_privatization_deps_3.ll
The file was modifiedpolly/lib/External/isl/isl_tab_pip.c
The file was modifiedpolly/lib/External/isl/doc/user.pod
The file was addedpolly/lib/External/isl/isl_list_private.h
The file was modifiedpolly/test/Isl/Ast/alias_checks_with_empty_context.ll
The file was modifiedpolly/lib/External/isl/include/isl/schedule.h
The file was modifiedpolly/lib/External/isl/interface/generator.cc
The file was modifiedpolly/test/DependenceInfo/computeout.ll
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/shift2.c
The file was modifiedpolly/lib/External/isl/isl_test_imath.c
The file was modifiedpolly/lib/External/isl/isl_union_map.c
The file was modifiedpolly/lib/External/isl/isl_seq.c
The file was modifiedpolly/lib/External/isl/depcomp
The file was modifiedpolly/lib/External/isl/include/isl/cpp.h
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/pldi2012/figure8_b.in
The file was modifiedpolly/lib/External/isl/isl_aff_lex_templ.c
The file was modifiedpolly/test/DependenceInfo/reduction_simple_privatization_deps_2.ll
The file was modifiedpolly/lib/External/isl/interface/Makefile.in
The file was modifiedpolly/lib/External/isl/isl_union_map_private.h
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/yosr2.c
The file was modifiedpolly/lib/External/isl/test-driver
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/correlation.c
The file was modifiedpolly/lib/External/isl/interface/install-sh
The file was modifiedpolly/lib/External/isl/isl_aff_private.h
The file was modifiedpolly/lib/External/isl/ltmain.sh
The file was addedpolly/lib/External/isl/isl_type_has_space_templ.c
The file was modifiedpolly/lib/External/isl/isl_union_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/dot2.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/vivien2.c
The file was modifiedpolly/lib/External/isl/configure
The file was modifiedpolly/lib/External/isl/include/isl/space.h
The file was modifiedpolly/lib/External/isl/isl_input.c
The file was modifiedpolly/lib/External/isl/interface/missing
The file was modifiedpolly/lib/External/isl/isl_fold.c
The file was modifiedpolly/lib/External/isl/isl_union_eval.c
The file was modifiedpolly/lib/External/isl/isl_pw_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/dealII.c
The file was modifiedpolly/test/DependenceInfo/reduction_multiple_reductions_2.ll
The file was modifiedpolly/lib/External/isl/interface/aclocal.m4
The file was modifiedpolly/test/GPGPU/non-zero-array-offset.ll
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/test.c
The file was modifiedpolly/lib/External/isl/include/isl/cpp-checked.h
The file was modifiedpolly/lib/External/isl/imath/imath.h
The file was modifiedpolly/lib/External/isl/imath/imath.c
The file was modifiedpolly/lib/External/isl/interface/depcomp
The file was modifiedpolly/test/Isl/CodeGen/empty_domain_in_context.ll
The file was modifiedpolly/lib/External/isl/interface/cpp.cc
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/gesced3.c
The file was modifiedpolly/lib/External/isl/isl_map_private.h
The file was modifiedpolly/lib/External/isl/isl_bernstein.c
The file was modifiedpolly/lib/External/isl/compile
The file was modifiedpolly/lib/External/isl/isl_bound.h
The file was modifiedpolly/test/DependenceInfo/generate_may_write_dependence_info.ll
The file was modifiedpolly/lib/External/isl/doc/Makefile.in
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/mode.c
The file was modifiedpolly/test/DependenceInfo/reduction_multiple_reductions.ll
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/faber.c
The file was modifiedpolly/lib/External/isl/isl_space.c
The file was modifiedpolly/lib/External/isl/aclocal.m4
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/vivien.c
The file was addedpolly/lib/External/isl/isl_union_map_lex_templ.c
The file was modifiedpolly/lib/External/isl/isl_space_private.h
The file was modifiedpolly/lib/External/isl/isl_tab.h
The file was modifiedpolly/lib/External/isl/isl_tab.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/reservoir-liu-zhuge1.c
The file was addedpolly/lib/External/isl/isl_copy_tuple_id_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/empty.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/if_then-2.c
The file was modifiedpolly/test/DependenceInfo/sequential_loops.ll
The file was modifiedpolly/lib/External/isl/Makefile.am
The file was modifiedpolly/lib/External/isl/isl_bound.c
The file was modifiedpolly/test/DependenceInfo/reduction_privatization_deps_4.ll
The file was modifiedpolly/test/DependenceInfo/reduction_sequence.ll
The file was modifiedpolly/lib/External/isl/AUTHORS
The file was modifiedpolly/lib/External/isl/interface/configure
The file was modifiedpolly/lib/External/isl/isl_map_simplify.c
The file was modifiedpolly/test/DependenceInfo/different_schedule_dimensions.ll
The file was modifiedpolly/test/DependenceInfo/may_writes_do_not_block_must_writes_for_war.ll
The file was modifiedpolly/lib/External/isl/isl_convex_hull.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/pldi2012/figure7_d.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/if_then-1.c
The file was modifiedpolly/lib/External/isl/interface/ltmain.sh
The file was modifiedpolly/lib/External/isl/include/isl/polynomial.h
The file was modifiedpolly/lib/External/isl/isl_list_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/m12-1.c
The file was modifiedpolly/lib/External/isl/missing
The file was modifiedpolly/lib/External/isl/isl_output.c
The file was modifiedpolly/lib/External/isl/isl_union_single.c
The file was modifiedpolly/lib/External/isl/include/isl/aff.h
The file was modifiedpolly/lib/External/isl/imath/imrat.h
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/if_then-3.c
The file was modifiedpolly/lib/External/isl/isl_map_bound_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/yosr.c
The file was modifiedpolly/lib/External/isl/interface/isl.py
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/group.c
The file was modifiedpolly/test/ScheduleOptimizer/focaltech_test_detail_threshold-7bc17e.ll
The file was modifiedpolly/test/DependenceInfo/fine_grain_dep_0.ll
The file was modifiedpolly/lib/External/isl/isl_local_space.c
The file was modifiedpolly/lib/External/isl/isl_morph.h
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/iter9-0.c
The file was modifiedpolly/lib/External/isl/include/isl/map.h
The file was modifiedpolly/test/DependenceInfo/reduction_privatization_deps_5.ll
The file was modifiedpolly/lib/External/isl/isl_morph.c
The file was modifiedpolly/lib/External/isl/imath/gmp_compat.c
The file was modifiedpolly/lib/External/isl/isl_union_multi.c
The file was modifiedpolly/lib/External/isl/isl_polynomial.c
The file was modifiedpolly/lib/External/isl/isl_mat.c
The file was modifiedpolly/test/DependenceInfo/reduction_privatization_deps.ll
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/wak1-0.c
The file was modifiedpolly/lib/External/isl/isl_map.c
The file was modifiedpolly/lib/External/isl/install-sh
The file was modifiedpolly/lib/External/isl/Makefile.in
The file was modifiedpolly/test/GPGPU/managed-pointers-preparation.ll
The file was addedpolly/lib/External/isl/check_single_reference_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/pldi2012/figure7_b.c
The file was modifiedpolly/lib/External/isl/isl_opt_mpa_templ.c
The file was modifiedpolly/lib/External/isl/GIT_HEAD_ID
The file was modifiedpolly/lib/External/isl/isl_arg.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/classen.c
The file was modifiedpolly/lib/External/isl/imath/imrat.c
The file was modifiedpolly/test/DependenceInfo/reduction_simple_privatization_deps_w_parameter.ll
The file was modifiedpolly/lib/External/isl/include/isl/polynomial_type.h
The file was modifiedpolly/lib/External/isl/ChangeLog
The file was modifiedpolly/lib/External/isl/isl_aff.c
The file was modifiedpolly/lib/External/isl/isl_ast_codegen.c
The file was modifiedpolly/lib/External/isl/m4/libtool.m4
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/gesced.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/pldi2012/figure7_c.c
The file was modifiedpolly/lib/External/isl/py-compile
The file was modifiedpolly/lib/External/isl/configure.ac
Commit 88e7c3498c3a8827c3706e39609b22dea9045432 by Abhina.Sreeskantharajan
[SystemZ][z/OS] Fix Permission denied pattern matching

On z/OS, the error message "EDC5111I Permission denied." is not matched correctly in lit tests. This patch updates the check expression to match successfully.

Differential Revision: https://reviews.llvm.org/D94432
The file was modifiedllvm/test/tools/llvm-ar/error-opening-permission.test
Commit 9c6a00fe99c4bbe329dd1933515f1a1a430fd5d7 by fraser
[RISCV] Add ISel patterns for scalable mask exts & truncs

Original patch by @rogfer01.

This patch adds support for sign-, zero-, and any-extension from
scalable mask vector types to integer vector types, as well as
truncation in the opposite direction.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Fraser Cormack <fraser@codeplay.com>

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D94590
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was addedllvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit cfc60730179042a93cb9cb338982e71d20707a24 by Jessica Paquette
[GlobalISel] Combine (a[0]) | (a[1] << k1) | ...|  (a[m] << kn) into a wide load

This is a restricted version of the combine in `DAGCombiner::MatchLoadCombine`.
(See D27861)

This tries to recognize patterns like below (assuming a little-endian target):

```
s8* x = ...
s32 val = a[0] | (a[1] << 8) | (a[2] << 16) | (a[3] << 24)
->
s32 val = *((i32)a)

s8* x = ...
s32 val = a[3] | (a[2] << 8) | (a[1] << 16) | (a[0] << 24)
->
s32 val = BSWAP(*((s32)a))
```

(This patch also handles the big-endian target case as well, in which the first
example above has a BSWAP, and the second example above does not.)

To recognize the pattern, this searches from the last G_OR in the expression
tree.

E.g.

```
    Reg   Reg
     \    /
      OR_1   Reg
       \    /
        OR_2
          \     Reg
           .. /
          Root
```

Each non-OR register in the tree is put in a list. Each register in the list is
then checked to see if it's an appropriate load + shift logic.

If every register is a load + potentially a shift, the combine checks if those
loads + shifts, when OR'd together, are equivalent to a wide load (possibly with
a BSWAP.)

To simplify things, this patch

(1) Only handles G_ZEXTLOADs (which appear to be the common case)
(2) Only works in a single MachineBasicBlock
(3) Only handles G_SHL as the bit twiddling to stick the small load into a
    specific location

An IR example of this is here: https://godbolt.org/z/4sP9Pj (lifted from
test/CodeGen/AArch64/load-combine.ll)

At -Os on AArch64, this is a 0.5% code size improvement for CTMark/sqlite3,
and a 0.4% improvement for CTMark/7zip-benchmark.

Also fix a bug in `isPredecessor` which caused it to fail whenever `DefMI` was
the first instruction in the block.

Differential Revision: https://reviews.llvm.org/D94350
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern-align.mir
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
Commit cbf52463599c860243d29877021fcdfcd9d46553 by Jessica Paquette
Fix buildbot after cfc60730179042a93cb9cb338982e71d20707a24

Windows buildbots were not happy with using find_if + instructionsWithoutDebug.

In cfc60730179042a9, instructionsWithoutDebug is not technically necessary. So,
just iterate over the block directly.

http://lab.llvm.org:8011/#/builders/127/builds/4732/steps/7/logs/stdio
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Commit 18cb7441b69a22565dcc340bac0e58bc9f301439 by jay.foad
[AMDGPU] Simpler names for arch-specific ttmp registers. NFC.

Rename the *_gfx9_gfx10 ttmp registers to *_gfx9plus for simplicity,
and use the corresponding isGFX9Plus predicate to decide when to use
them instead of the old *_vi versions.

Differential Revision: https://reviews.llvm.org/D94975
The file was modifiedllvm/lib/Target/AMDGPU/SIDefines.h
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
Commit 17846ed5af4a83334ef7d07f0b4a9d525e6ec0db by usx
[clangd] Use ASTSignals in Heuristics CC Ranking.

Differential Revision: https://reviews.llvm.org/D94927
The file was modifiedclang-tools-extra/clangd/Quality.cpp
Commit 57443bfb4ab06f7dc45f802119efc1068289cdd9 by kparzysz
[Hexagon] Fix segment start to adjust for gaps between segments

The Hexagon Vector Combine pass genertes stores for a complete
aligned vector. The start of each section is a multiple of the
vector size, so that value is passed to normalize to compute
the offset of the stores in the section.  The first store may
not occur at offset 0 when there is a gap between sections.
The file was modifiedllvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
The file was addedllvm/test/CodeGen/Hexagon/autohvx/vector-align-store-mask.ll
Commit 987760b463c1303121fff8197c4ebc66b61f0616 by richard
[www] Fix background color in table cell.
The file was modifiedclang/www/cxx_status.html
Commit 121cac01e8f8afe6ed2bb0b8ffe92f323776a716 by jeroen.dobbelaere
[noalias.decl] Look through llvm.experimental.noalias.scope.decl

Just like llvm.assume, there are a lot of cases where we can just ignore llvm.experimental.noalias.scope.decl.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D93042
The file was modifiedllvm/include/llvm/Analysis/VectorUtils.h
The file was modifiedllvm/lib/Analysis/VectorUtils.cpp
The file was addedllvm/test/Analysis/BasicAA/noalias-scope-decl.ll
The file was modifiedllvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/lib/CodeGen/Analysis.cpp
The file was modifiedllvm/lib/Transforms/Scalar/EarlyCSE.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
The file was modifiedllvm/lib/Analysis/AliasSetTracker.cpp
The file was addedllvm/test/Transforms/EarlyCSE/noalias-scope-decl.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Analysis/AliasSet/intrinsics.ll
The file was addedllvm/test/Analysis/MemorySSA/noalias-scope-decl.ll
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/test/Analysis/CostModel/X86/free-intrinsics.ll
The file was modifiedllvm/lib/Analysis/MemorySSA.cpp
The file was modifiedllvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
The file was addedllvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
Commit 6f69f2ed61ae805df496fc86ef22e7685573d556 by rnk
Consider ASan messages interesting for creduce

Helped me reduce llvm.org/pr48582
The file was modifiedclang/utils/creduce-clang-crash.py
Commit e678656625a3e2b6a5f2849f4a6f7612ceeaed07 by rnk
Add bounds checking assertions to APValue, NFC

These checks help find llvm.org/pr48582 without ASan
The file was modifiedclang/include/clang/AST/APValue.h
Commit 68dba7eae1df333738d1c77cbbefd480995c1972 by Louis Dionne
[libc++] Unbreak the debug mode

When the Debug mode is enabled, we disable extern declarations because we
don't want to use the functions compiled in the library, which might not
have had the debug mode enabled when built. However, some extern declarations
need to be kept, because code correctness depends on it.

31e820378b8a removed those declarations, which had the unintended
consequence of breaking the debug build. This commit fixes that by
re-introducing a separate macro for the required extern declarations,
and adds a comment so that we don't fall into that trap in the future.

Differential Revision: https://reviews.llvm.org/D94718
The file was modifiedlibcxx/include/__locale
The file was addedlibcxx/test/libcxx/debug/extern-templates.sh.cpp
The file was modifiedlibcxx/include/locale
The file was modifiedlibcxx/include/__config
Commit 933518fff82c8f39626bbcca81adc516483a9651 by Louis Dionne
[libc++] Make LIBCXX_ENABLE_FILESYSTEM fully consistent

Previously, LIBCXX_ENABLE_FILESYSTEM controlled only whether the filesystem
support was compiled into libc++'s library. This commit promotes the
setting to a first-class option like LIBCXX_ENABLE_LOCALIZATION, where
the whole library is aware of the setting and features that depend on
<filesystem> won't be provided at all. The test suite is also properly
annotated such that tests that depend on <filesystem> are disabled when
the library doesn't support it.

This is an alternative to https://llvm.org/D94824, but also an improvement
along the lines of LIBCXX_ENABLE_LOCALIZATION that I had been wanting to
make for a while.

Differential Revision: https://reviews.llvm.org/D94921
The file was modifiedlibcxx/test/configs/legacy.cfg.in
The file was modifiedlibcxx/test/std/input.output/file.streams/fstreams/fstream.cons/path.pass.cpp
The file was modifiedlibcxx/utils/libcxx/test/features.py
The file was modifiedlibcxx/utils/ci/run-buildbot
The file was modifiedlibcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/path.pass.cpp
The file was modifiedlibcxx/test/libcxx/modules/cinttypes_exports.compile.pass.cpp
The file was modifiedlibcxx/test/std/experimental/filesystem/fs.req.namespace/namespace.pass.cpp
The file was modifiedlibcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/path.pass.cpp
The file was modifiedlibcxx/test/libcxx/min_max_macros.compile.pass.cpp
The file was modifiedlibcxx/test/libcxx/modules/clocale_exports.compile.pass.cpp
The file was modifiedlibcxx/include/__config_site.in
The file was modifiedlibcxx/test/std/input.output/file.streams/fstreams/filebuf.members/open_path.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/lit.local.cfg
The file was modifiedlibcxx/test/libcxx/modules/stdint_h_exports.compile.pass.cpp
The file was modifiedlibcxx/utils/libcxx/test/params.py
The file was modifiedlibcxx/test/libcxx/experimental/filesystem/version.pass.cpp
The file was modifiedlibcxx/test/std/input.output/file.streams/fstreams/ofstream.members/open_path.pass.cpp
The file was modifiedlibcxx/utils/ci/macos-backdeployment.sh
The file was modifiedlibcxx/utils/generate_header_tests.py
The file was modifiedlibcxx/test/libcxx/experimental/filesystem/deprecated.verify.cpp
The file was modifiedlibcxx/include/fstream
The file was modifiedlibcxx/include/filesystem
The file was modifiedlibcxx/test/std/input.output/file.streams/fstreams/ifstream.members/open_path.pass.cpp
The file was modifiedlibcxx/utils/ci/buildkite-pipeline.yml
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
The file was addedlibcxx/cmake/caches/Generic-no-filesystem.cmake
The file was modifiedlibcxx/test/libcxx/no_assert_include.compile.pass.cpp
The file was modifiedlibcxx/test/std/experimental/filesystem/fs.req.macros/feature_macro.pass.cpp
The file was modifiedlibcxx/test/libcxx/modules/cstdint_exports.compile.pass.cpp
The file was modifiedlibcxx/test/libcxx/modules/inttypes_h_exports.compile.pass.cpp
The file was modifiedlibcxx/test/libcxx/modules/stds_include.sh.cpp
The file was modifiedlibcxx/CMakeLists.txt
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/filesystem.version.pass.cpp
The file was modifiedlibcxx/test/std/utilities/time/time.clock/time.clock.file/now.pass.cpp
The file was modifiedlibcxx/test/libcxx/double_include.sh.cpp
The file was modifiedlibcxx/test/std/input.output/file.streams/fstreams/fstream.members/open_path.pass.cpp
Commit 82e537a9d28a2c18bd1637e2eac0e0af658ed829 by tianshilei1992
[Clang][OpenMP] Fixed an issue that clang crashed when compiling OpenMP program in device only mode without host IR

D94745 rewrites the `deviceRTLs` using OpenMP and compiles it by directly
calling the device compilation. `clang` crashes because entry in
`OffloadEntriesDeviceGlobalVar` is unintialized. Current design supposes the
device compilation can only be invoked after host compilation with the host IR
such that `clang` can initialize `OffloadEntriesDeviceGlobalVar` from host IR.
This avoids us using device compilation directly, especially when we only have
code wrapped into `declare target` which are all device code. The same issue
also exists for `OffloadEntriesInfoManager`.

In this patch, we simply initialized an entry if it is not in the maps. Not sure
we need an option to tell the device compiler that it is invoked standalone.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94871
The file was addedclang/test/OpenMP/declare_target_device_only_compilation.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
Commit ce8b3937ddad39536e6e715813682d9198229fb5 by craig.topper
[RISCV] Add DAG combine to turn (setcc X, 1, setne) -> (setcc X, 0, seteq) if we can prove X is 0/1.

If we are able to compare with 0 instead of 1, we might be able
to fold the setcc into a beqz/bnez.

Often these setccs start life as an xor that gets converted to
a setcc by DAG combiner's rebuildSetcc. I looked into a detecting
(xor X, 1) and converting to (seteq X, 0) based on boolean contents
being 0/1 in rebuildSetcc instead of using computeKnownBits. It was
very perturbing to AMDGPU tests which I didn't look closely at.
It had a few changes on a couple other targets, but didn't seem
to be much if any improvement.

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D94730
The file was modifiedllvm/test/CodeGen/RISCV/float-br-fcmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-and.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-or.ll
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was modifiedllvm/test/CodeGen/RISCV/double-br-fcmp.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/half-br-fcmp.ll
Commit a23178690987f04a09125d712ec3168b084539bb by aeubanks
[wasm][LLD] Rename --lto-new-pass-manager to --no-lto-legacy-pass-manager

This follows a similar ELF change.

Reviewed By: MaskRay, sbc100

Differential Revision: https://reviews.llvm.org/D93253
The file was modifiedlld/test/wasm/lto/verify-invalid.ll
The file was modifiedlld/wasm/Options.td
The file was modifiedlld/test/wasm/lto/new-pass-manager.ll
The file was modifiedlld/wasm/Driver.cpp
Commit bedbb58203cd67a46f64a0182dc1e6717b3c536c by nikita.ppv
[InstCombine] Add additional tests for select operand replacement (NFC)

In particular, add tests for speculatable and non-speculatable
instructions.
The file was modifiedllvm/test/Transforms/InstCombine/select-binop-cmp.ll
Commit 21443381c00d9d5ddd6a73f2f839dc4872d79463 by nikita.ppv
Reapply [InstCombine] Replace one-use select operand based on condition

Relative to the original change, this adds a check that the
instruction on which we're replacing operands is safe to speculatively
execute, because that's what we're effectively doing. We're executing
the instruction with the replaced operand, which is fine if it's pure,
but not fine if can cause side-effects or UB (aka is not speculatable).

Additionally, we cannot (generally) replace operands in phi nodes,
as these may refer to a different loop iteration. This is also covered
by the speculation check.

-----

InstCombine already performs a fold where X == Y ? f(X) : Z is
transformed to X == Y ? f(Y) : Z if f(Y) simplifies. However,
if f(X) only has one use, then we can always directly replace the
use inside the instruction. To actually be profitable, limit it to
the case where Y is a non-expr constant.

This could be further extended to replace uses further up a one-use
instruction chain, but for now this only looks one level up.

Among other things, this also subsumes D94860.

Differential Revision: https://reviews.llvm.org/D94862
The file was modifiedllvm/test/Transforms/InstCombine/select-binop-cmp.ll
The file was modifiedllvm/test/Transforms/InstCombine/select-safe-transforms.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Commit 7113de301a846521a2bdd73d44ac9cf5827b37a6 by mariya.podchishchaeva
[ScalarizeMaskedMemIntrin] Add missing dependency

The pass has dependency on 'TargetTransformInfoWrapperPass', but the
corresponding call to INITIALIZE_PASS_DEPENDENCY was missing.

Differential Revision: https://reviews.llvm.org/D94916
The file was modifiedllvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
Commit 6ac9cb2a7c6c19797fc778f3d441a6fb7b69793c by Louis Dionne
[libc++][P1679] add string contains

C++23 string contains implementation and tests

Paper: https://wg21.link/P1679R3
Standard (string): https://eel.is/c++draft/string.contains
Standard (string_view): https://eel.is/c++draft/string.view.ops#lib:contains,basic_string_view

Differential Revision: https://reviews.llvm.org/D93912
The file was addedlibcxx/test/std/strings/string.view/string.view.template/contains.char.pass.cpp
The file was modifiedlibcxx/include/string_view
The file was modifiedlibcxx/docs/FeatureTestMacroTable.rst
The file was modifiedlibcxx/include/version
The file was addedlibcxx/test/std/strings/basic.string/string.contains/contains.ptr.pass.cpp
The file was addedlibcxx/test/std/strings/basic.string/string.contains/contains.string_view.pass.cpp
The file was addedlibcxx/test/std/strings/string.view/string.view.template/contains.ptr.pass.cpp
The file was modifiedlibcxx/include/string
The file was addedlibcxx/test/std/strings/string.view/string.view.template/contains.string_view.pass.cpp
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/string.version.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/string_view.version.pass.cpp
The file was addedlibcxx/test/std/strings/basic.string/string.contains/contains.char.pass.cpp
Commit a4b42c621b9e2009cfd8bc9265bbf970c7231271 by Jonas Devlieghere
[llvm] Protect signpost map with a mutex

Use a mutex to protect concurrent access to the signpost map. This fixes
nondeterministic crashes in LLDB that appeared after using signposts in
the timer implementation.

Differential revision: https://reviews.llvm.org/D94285
The file was modifiedllvm/lib/Support/Signposts.cpp
Commit d39adeaf440bc0db508b7d2a4eb9ace7f40178fc by i
[ELF] Improve R_PPC64_ADDR* relocation tests
The file was modifiedlld/test/ELF/ppc64-reloc-addr.s
The file was addedlld/test/ELF/ppc64-reloc-addr-err.s
The file was modifiedlld/test/ELF/ppc64-relocs.s
Commit e12e0d66c03c89d8ff0b08a4285f5b74a85a5812 by i
[ELF] Error for out-of-range R_PPC64_ADDR16_HA, R_PPC64_ADDR16_HI and their friends

There are no tests for REL16_* and TPREL16_*.
The file was modifiedlld/ELF/Arch/PPC64.cpp
The file was addedlld/test/ELF/ppc64-reloc-addr16-err.s
Commit 5fcb412ed0831ad763810f9b424149b3b353451a by i
[ELF] Support R_PPC64_ADDR16_HIGH

R_PPC64_ADDR16_HI represents bits 16-31 of a 32-bit value
R_PPC64_ADDR16_HIGH represents bits 16-31 of a 64-bit value.

In the Linux kernel, `LOAD_REG_IMMEDIATE_SYM` defined in `arch/powerpc/include/asm/ppc_asm.h`
uses @l, @high, @higher, @highest to load the 64-bit value of a symbol.

Fixes https://github.com/ClangBuiltLinux/linux/issues/1260
The file was modifiedlld/ELF/Arch/PPC64.cpp
The file was modifiedlld/test/ELF/ppc64-reloc-addr16-err.s
The file was modifiedlld/test/ELF/ppc64-reloc-addr.s
Commit 24e8e21f19f4380e8410a12f9135bfef3c046142 by pklausler
[flang] Refine WhyNotModifiable()

The utility routine WhyNotModifiable() needed to become more
aware of the use of pointers in data-refs; the targets of
pointer components are sometimes modifiable even when the
leftmost ("base") symbol of a data-ref is not.

Added a new unit test for WhyNotModifiable() that uses internal
READ statements (mostly), since I/O semantic checking uses
WhyNotModifiable() for all its definability checking.

Differential Revision: https://reviews.llvm.org/D94849
The file was modifiedflang/lib/Evaluate/tools.cpp
The file was modifiedflang/lib/Semantics/check-io.cpp
The file was modifiedflang/lib/Semantics/tools.cpp
The file was addedflang/test/Semantics/modifiable01.f90
The file was modifiedflang/include/flang/Evaluate/tools.h
Commit 5b7aef6eb4b2930971029b984cb2360f7682e5a5 by 31459023+hctim
Revert "[PDB] Defer relocating .debug$S until commit time and parallelize it"

This reverts commit 6529d7c5a45b1b9588e512013b02f891d71bc134.

Reason: Broke the ASan buildbots.
http://lab.llvm.org:8011/#/builders/99/builds/1567
The file was modifiedlld/COFF/Chunks.cpp
The file was modifiedllvm/lib/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.cpp
The file was modifiedlld/COFF/Chunks.h
The file was modifiedllvm/include/llvm/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.h
The file was modifiedllvm/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp
The file was modifiedlld/COFF/PDB.cpp
Commit d8ffaa9f7234d8bf40682763373ab060d14adf22 by jeroen.dobbelaere
[NFC] cleanup noalias2.ll test

D75825 and D75828 modified llvm/test/Transforms/Inline/noalias2.ll to handle llvm.assume. The checking though was broken.
The NO_ASSUME has been replaced by a normal CHECK; the ASSUME rules were never triggered and have been removed.
The test checks have been regenerated.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D94978
The file was modifiedllvm/test/Transforms/Inline/noalias2.ll
Commit e463bd53c03ff9183bd30030477dfe6f3b2fdd0c by alexey.bataev
Revert "[SLP]Merge reorder and reuse shuffles."

This reverts commit 438682de6a38ac97f89fa38faf5c8dc9b09cd9ad to fix the
bug with the reducing size of the resulting vector for the entry node
with multiple users.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/PR32086.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
Commit 27afc091e2c0caa954326129adb86987d1b41c91 by mtrofin
[NFC] Disallow unused prefixes under Other

Differential Revision: https://reviews.llvm.org/D94853
The file was modifiedllvm/test/Other/print-slotindexes.ll
The file was modifiedllvm/test/Other/new-pass-manager.ll
The file was modifiedllvm/test/Other/opt-LTO-pipeline.ll
The file was modifiedllvm/test/Other/opt-bisect-legacy-pass-manager.ll
The file was addedllvm/test/Other/lit.local.cfg
Commit cabe1b11243740d39c0b49c10a8ce86001b1011c by aeubanks
[polly][NewPM][test] Fix polly tests under -enable-new-pm

In preparation for turning on opt's -enable-new-pm by default, this pins
uses of passes via the legacy "opt -passname" with pass names beginning
with "polly-" and "polyhedral-info" to the legacy PM. Many of these
tests use -analyze, which isn't supported in the new PM.

(This doesn't affect uses of "opt -passes=passname").

rL240766 accidentally removed `-polly-prepare` in
phi_not_grouped_at_top.ll, and it also doesn't use the output of
-analyze.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D94266
The file was modifiedllvm/tools/opt/opt.cpp
The file was modifiedpolly/test/ScopInfo/phi_not_grouped_at_top.ll
Commit b272698de790d6603db7992c0c0ad6446b7a52b8 by alexey.bataev
[OPENMP]Do not use OMP_MAP_TARGET_PARAM for data movement directives.

OMP_MAP_TARGET_PARAM flag is used to mark the data that shoud be passed
as arguments to the target kernels, nothing else. But the compiler still
marks the data with OMP_MAP_TARGET_PARAM flags even if the data is
passed to the data movement directives, like target data, target update
etc. This flag is just ignored for this directives and the compiler does
not need to emit it.

Reviewed By: cchen

Differential Revision: https://reviews.llvm.org/D91261
The file was modifiedclang/test/OpenMP/target_data_codegen.cpp
The file was modifiedclang/test/OpenMP/target_enter_data_depend_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/test/OpenMP/target_data_map_pointer_array_subscript_codegen.cpp
The file was modifiedclang/test/OpenMP/target_update_depend_codegen.cpp
The file was modifiedclang/test/OpenMP/target_map_member_expr_array_section_codegen.cpp
The file was modifiedclang/test/OpenMP/target_exit_data_codegen.cpp
The file was modifiedclang/test/OpenMP/target_enter_data_codegen.cpp
The file was modifiedclang/test/OpenMP/target_update_codegen.cpp
The file was modifiedclang/test/OpenMP/target_data_use_device_addr_codegen.cpp
The file was modifiedclang/test/OpenMP/declare_mapper_codegen.cpp
The file was modifiedclang/test/OpenMP/target_data_use_device_ptr_codegen.cpp
The file was modifiedclang/test/OpenMP/target_data_use_device_ptr_if_codegen.cpp
The file was modifiedclang/test/OpenMP/target_exit_data_depend_codegen.cpp
Commit 7bd3702b64043fb623bf82c1d1a8a2d168142219 by sivachandra
[libc] Extend the current fenv functions to aarch64.

This change does not try to move the common parts of x86 and aarch64 and
build few abstractions over them. While this is possible, x86 story
needs a bit of cleanup, especially around manipulation of the mxcsr
register. Moreover, on x86 one can raise exceptions without performing
exception raising operations. So, all of this can be done in follow up
patches.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D94947
The file was modifiedlibc/utils/FPUtil/FEnv.h
The file was addedlibc/utils/FPUtil/aarch64/FEnv.h
The file was modifiedlibc/config/linux/aarch64/entrypoints.txt
Commit 5a684b70dc74f9f671f8eb61993a25769ec68117 by richard
Ensure we don't strip the ConstantExpr carrying a non-type template
argument's value off it during substitution.
The file was modifiedclang/test/SemaTemplate/temp_arg_nontype_cxx17.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp
Commit da986511fb9da1a46a0ca4dba2e49e2426036303 by richard
Revert "DR2064: decltype(E) is only a dependent type if E is type-dependent, not
if E is merely instantiation-dependent."

This change leaves us unable to distinguish between different function
templates that differ in only instantiation-dependent ways, for example

template<typename T> decltype(int(T())) f();
template<typename T> decltype(int(T(0))) f();

We'll need substantially better support for types that are
instantiation-dependent but not dependent before we can go ahead with
this change.

This reverts commit e3065ce238475ec202c707f4c58d90df171626ca.
The file was modifiedclang/test/Sema/invalid-bitwidth-expr.mm
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/test/SemaCXX/invalid-template-base-specifier.cpp
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/test/SemaTemplate/dependent-expr.cpp
The file was modifiedclang/www/cxx_dr_status.html
The file was modifiedclang/lib/AST/Type.cpp
The file was modifiedclang/test/CodeGenCXX/mangle-subst.cpp
The file was modifiedclang/test/SemaCXX/coroutines.cpp
The file was modifiedclang/test/CXX/drs/dr20xx.cpp
The file was modifiedclang/include/clang/AST/DependenceFlags.h
The file was modifiedclang/test/SemaTemplate/temp_arg_template_cxx1z.cpp
Commit b99147b4fa7b361fba4eeefdb443dca72b8ee87f by sbc
[lld][WebAssembly] Don't defined indirect function table in relocatable output

Object files (and the output --relocatable) should never define
__indirect_function_table.  It should always be linker synthesized
with the final output executable.

Differential Revision: https://reviews.llvm.org/D94993
The file was modifiedlld/wasm/Driver.cpp
The file was modifiedlld/test/wasm/signature-mismatch.ll
The file was modifiedlld/test/wasm/relocatable.ll
The file was modifiedlld/test/wasm/weak-alias.ll
The file was modifiedlld/test/wasm/locals-duplicate.test
Commit 894d88a759c9376de4a48ed99c965aac97839b6c by stellaraccident
[mlir][python] Add facility for extending generated python ODS.

* This isn't exclusive with other mechanisms for more ODS centric op definitions, but based on discussions, we feel that we will always benefit from a python escape hatch, and that is the most natural way to write things that don't fit the mold.
* I suspect this facility needs further tweaking, and once it settles, I'll document it and add more tests.
* Added extensions for linalg, since it is unusable without them and continued to evolve my e2e example.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D94752
The file was modifiedmlir/examples/python/linalg_matmul.py
The file was modifiedmlir/lib/Bindings/Python/CMakeLists.txt
The file was modifiedmlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
The file was addedmlir/lib/Bindings/Python/.style.yapf
The file was addedmlir/examples/python/.style.yapf
The file was addedmlir/lib/Bindings/Python/mlir/dialects/_linalg.py
The file was modifiedmlir/lib/Bindings/Python/mlir/dialects/__init__.py
Commit ce24bb0eddab12460a01e4d91faa435f2fc84bb6 by steveire
[ASTMatchers] NFC Rearrange declarations to allow more arg adapting
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchersInternal.h
Commit be7352c00d51f4358db3a23ed6a077f7cb48eafd by silvasean
[mlir][splitting std] move 2 more ops to `tensor`

- DynamicTensorFromElementsOp
- TensorFromElements

Differential Revision: https://reviews.llvm.org/D94994
The file was modifiedmlir/test/Dialect/Standard/bufferize.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/lib/Dialect/Tensor/IR/TensorOps.cpp
The file was modifiedmlir/test/Dialect/Standard/invalid.mlir
The file was modifiedmlir/lib/Conversion/ShapeToStandard/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Tensor/IR/Tensor.h
The file was modifiedmlir/test/Dialect/Standard/ops.mlir
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/test/Conversion/ShapeToStandard/shape-to-standard.mlir
The file was modifiedmlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/CMakeLists.txt
The file was modifiedmlir/test/IR/core-ops.mlir
The file was modifiedmlir/test/Dialect/Standard/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/Tensor/IR/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
The file was modifiedmlir/include/mlir/Dialect/Tensor/Transforms/Passes.td
The file was modifiedmlir/test/Dialect/Tensor/canonicalize.mlir
The file was modifiedmlir/test/Dialect/Tensor/bufferize.mlir
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp
The file was modifiedmlir/test/Dialect/Tensor/invalid.mlir
The file was modifiedmlir/test/Transforms/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/PassDetail.h
The file was modifiedmlir/test/Dialect/Tensor/ops.mlir
The file was modifiedmlir/test/IR/invalid-ops.mlir
Commit 347145538443347e705aaf1fb1473a5dcc5698e6 by stilis
[lldb/test] Skip TestProcessAttach: test_attach_to_process_from_different_dir_by_id on Windows

This test is flakey on Windows and on failure it hangs causing the test suite to fail and future builds (on the buildbot, especially) to fail because they cannot re-write the files that are currently in use
The file was modifiedlldb/test/API/commands/process/attach/TestProcessAttach.py
Commit ecf696641e6ce4b22e8c8ea3c7476b9c1f0f200b by steveire
[ASTMatchers] Allow use of mapAnyOf in more contexts

Add an operator overload to ArgumentAdaptingMatcherFunc to allow use of
mapAnyOf within hasAncestor, hasParent etc.

Differential Revision: https://reviews.llvm.org/D94864
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchersInternal.h
Commit e75a4b6ea9e950181049f1c2f8a78835754852fe by craig.topper
[RISCV] Remove NotHasStdExtZbb predicate from zext.h/sext.b/sext.h InstAliases. NFC

NotHasStdExtZbb doesn't have an AssemblerPredicate associated with it
so it didn't do anything. We don't need it either because the sorting
rules in tablegen prioritize by number of predicates. So the
dedicated instructions in the B extension that have predicates
will be prioritized automatically.
The file was modifiedllvm/lib/Target/RISCV/RISCV.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td
Commit 18e093faf726d15f210ab4917142beec51848258 by richard
[msabi] Mangle a template argument referring to array-to-pointer decay
applied to an array the same as the array itself.

This follows MS ABI, and corrects a regression from the implementation
of generalized non-type template parameters, where we "forgot" how to
mangle this case.
The file was modifiedclang/lib/AST/MicrosoftMangle.cpp
The file was modifiedclang/test/CodeGenCXX/mangle-ms-templates.cpp
Commit 8d112a8eda9d78bc4c97cf7bc9e133afae7b6eed by steveire
Remove TypedMatcherOps from VariantValue

It provides no features or advantage over ASTNodeKind-based handling.

Differential Revision: https://reviews.llvm.org/D94876
The file was modifiedclang/include/clang/ASTMatchers/Dynamic/VariantValue.h
The file was modifiedclang/lib/ASTMatchers/Dynamic/VariantValue.cpp
Commit 22eb1cf89f38b33aaf082326ba4dcfee4f98913d by echristo
Remove unused functions.
The file was modifiedmlir/test/lib/Dialect/Affine/TestVectorizationUtils.cpp
Commit 0cd0eb6e0a8133ec86d884c1bbc9c3cbd1769c0b by steveire
Add API to retrieve a clade kind from ASTNodeKind

Differential Revision: https://reviews.llvm.org/D94877
The file was modifiedclang/include/clang/AST/ASTTypeTraits.h
The file was modifiedclang/lib/AST/ASTTypeTraits.cpp
The file was modifiedclang/unittests/AST/ASTTypeTraitsTest.cpp
Commit 96ef4f307df27f4e0946eb344bac2703017ad073 by sbc
Revert "[WebAssembly] call_indirect issues table number relocs"

This reverts commit 418df4a6ab35d343cc0f2608c90a73dd9b8d0ab1.

This change broke emscripten tests, I believe because it started
generating 5-byte a wide table index in the call_indirect instruction.
Neither v8 nor wabt seem to be able to handle that.  The spec
currently says that this is single 0x0 byte and:

"In future versions of WebAssembly, the zero byte occurring in the
encoding of the call_indirectcall_indirect instruction may be used to
index additional tables."

So we need to revisit this change.  For backwards compat I guess
we need to guarantee that __indirect_function_table is always at
address zero.   We could also consider making this a single-byte
relocation with and assert if have more than 127 tables (for now).

Differential Revision: https://reviews.llvm.org/D95005
The file was modifiedllvm/test/MC/WebAssembly/type-index.s
The file was modifiedlld/test/wasm/shared.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
The file was removedllvm/test/MC/WebAssembly/call-indirect-relocs.s
The file was modifiedllvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
The file was modifiedlld/test/wasm/compress-relocs.ll
The file was modifiedllvm/test/MC/WebAssembly/basic-assembly.s
The file was modifiedllvm/test/CodeGen/WebAssembly/function-pointer64.ll
The file was modifiedlld/test/wasm/call-indirect.ll
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
The file was modifiedllvm/test/MC/WebAssembly/reloc-code.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedllvm/test/MC/WebAssembly/weak-alias.s
The file was modifiedllvm/test/MC/WebAssembly/tail-call-encodings.s
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/multivalue.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
Commit 1bf2b1665b43e1a5090177486c8fa6374a4596a2 by joker.eph
Implement constant folding for DivFOp

Add a constant folder for DivFOp. Analogous to existing folders for
AddFOp, SubFOp, and MulFOp. Matches the behavior of existing LLVM
constant folding (https://github.com/llvm/llvm-project/blob/999f5da6b3088fa4c0bb9d05b358d015ca74c71f/llvm/lib/IR/ConstantFold.cpp#L1432).

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D94939
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
Commit 21b1ad0340a7ba69c605ea1c218adb567b5190ae by wmi
[SampleFDO] Add the support to split the function profiles with context into
separate sections.

For ThinLTO, all the function profiles without context has been annotated to
outline functions if possible in prelink phase. In postlink phase, profile
annotation in postlink phase is only meaningful for function profile with
context. If the profile is large, it is better to split the profile into two
parts, one with context and one without, so the profile reading in postlink
phase only has to read the part with context. To have the profile splitting,
we extend the ExtBinary format to support different section arrangement. It
will be flexible to add other section layout in the future without the need
to create new class inheriting from ExtBinary class.

Differential Revision: https://reviews.llvm.org/D94435
The file was modifiedllvm/include/llvm/ProfileData/SampleProfReader.h
The file was addedllvm/test/Transforms/SampleProfile/ctxsplit.ll
The file was modifiedllvm/include/llvm/ProfileData/SampleProfWriter.h
The file was addedllvm/test/Transforms/SampleProfile/Inputs/ctxsplit.extbinary.afdo
The file was modifiedllvm/include/llvm/ProfileData/SampleProf.h
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was modifiedllvm/lib/ProfileData/SampleProfWriter.cpp
The file was modifiedllvm/lib/ProfileData/SampleProfReader.cpp
Commit 3729ee893948be7e3ba138b2a04c4cdfa6257cdf by wmi
Fix Wmissing-field-initializers warnings.
The file was modifiedllvm/include/llvm/ProfileData/SampleProfWriter.h
Commit 68a1f09107a4b0c32fe84063ea1c5a902c8817a9 by ianlevesque
[xray] Honor xray-never function-instrument attribute

function-instrument=xray-never wasn't actually honored before. We were
getting lucky that it worked because CodeGenFunction would omit the
other xray attributes when a function was annotated with
xray_never_instrument. This patch adds proper support.

Differential Revision: https://reviews.llvm.org/D89441
The file was modifiedllvm/lib/CodeGen/XRayInstrumentation.cpp
The file was modifiedllvm/test/CodeGen/AArch64/xray-attribute-instrumentation.ll
Commit be59bac184e3a3ccdd3c7f41f31e48ffe77f443d by thakis
[gn build] (manually) port 933518fff82c
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit 7f36df0fb19c08879822cf5b7d4bba300fc8c058 by thakis
[gn build] fix libcxx gn file with libcxx_abi_namespace set
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit b62c7e047420026dcfe84ad66969f501698acbee by stellaraccident
[mlir][python] Swap shape and element_type order for MemRefType.

* Matches how all of the other shaped types are declared.
* No super principled reason fro this ordering beyond that it makes the one that was different be like the rest.
* Also matches ordering of things like ndarray, et al.

Reviewed By: ftynse, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D94812
The file was modifiedmlir/examples/python/linalg_matmul.py
The file was modifiedmlir/test/Bindings/Python/ir_types.py
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp
Commit 233106269db6af64f9eff7db0bdf119593f822b1 by serguei.n.dmitriev
[llvm-link] Improve link time for bitcode archives [NFC]

Linking large bitcode archives currently takes a lot of time with llvm-link,
this patch adds couple improvements which reduce link time for archives
- Use one Linker instance for archive instead of recreating it for each member
- Lazy load archive members

Reviewed By: tra, jdoerfert

Differential Revision: https://reviews.llvm.org/D94643
The file was modifiedllvm/tools/llvm-link/llvm-link.cpp
Commit daeea961a6d93f301e7a22659a2c203846fd58f2 by wlei
[llvm-profgen][NFC] Fix the incorrect computation of callsite sample count

Differential Revision: https://reviews.llvm.org/D95009
The file was modifiedllvm/test/tools/llvm-profgen/noinline-cs-noprobe.test
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.cpp
Commit 4479c0c2c0be019b9932c6f1380a40e6cb48da25 by aqjune
Allow nonnull/align attribute to accept poison

Currently LLVM is relying on ValueTracking's `isKnownNonZero` to attach `nonnull`, which can return true when the value is poison.
To make the semantics of `nonnull` consistent with the behavior of `isKnownNonZero`, this makes the semantics of `nonnull` to accept poison, and return poison if the input pointer isn't null.
This makes many transformations like below legal:

```
%p = gep inbounds %x, 1 ; % p is non-null pointer or poison
call void @f(%p)        ; instcombine converts this to call void @f(nonnull %p)
```

Instead, this semantics makes propagation of `nonnull` to caller illegal.
The reason is that, passing poison to `nonnull` does not immediately raise UB anymore, so such program is still well defined, if the callee does not use the argument.
Having `noundef` attribute there re-allows this.

```
define void @f(i8* %p) {       ; functionattr cannot mark %p nonnull here anymore
  call void @g(i8* nonnull %p) ; .. because @g never raises UB if it never uses %p.
  ret void
}
```

Another attribute that needs to be updated is `align`. This patch updates the semantics of align to accept poison as well.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D90529
The file was modifiedllvm/test/Transforms/Attributor/align.ll
The file was modifiedllvm/lib/IR/Function.cpp
The file was modifiedllvm/test/Analysis/ValueTracking/known-nonnull-at.ll
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/test/Transforms/FunctionAttrs/nonnull.ll
The file was modifiedllvm/lib/Transforms/IPO/FunctionAttrs.cpp
The file was modifiedllvm/test/Transforms/InstCombine/call_nonnull_arg.ll
The file was modifiedllvm/test/Transforms/InstCombine/unused-nonnull.ll
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/include/llvm/IR/Argument.h
The file was modifiedllvm/test/Transforms/Attributor/nonnull.ll
Commit 4dae2247fd62f1319de6297fa5088ab1b0175d88 by shihpo.hung
[RISCV] refactor VPatBinary (NFC)

Make it easier to reuse for intrinsic vrgatherei16
which needs to encode both LMUL & EMUL in the instruction name,
like PseudoVRGATHEREI16_VV_M1_M1 and PseudoVRGATHEREI16_VV_M1_M2.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D94951
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Commit 2e74a2775665eea221c6819af44011f7489df856 by aqjune
[SimplifyCFG] Reapply update_test_checks.py (NFC)
The file was modifiedllvm/test/Transforms/SimplifyCFG/switch_create-custom-dl.ll
The file was modifiedllvm/test/Transforms/SimplifyCFG/preserve-branchweights.ll
Commit 885720248921324d28b983248dcc4056fd994a0f by kazu
[llvm] Use llvm::find (NFC)
The file was modifiedllvm/utils/TableGen/SubtargetEmitter.cpp
The file was modifiedllvm/lib/MCA/Stages/InstructionTables.cpp
The file was modifiedllvm/lib/Support/DynamicLibrary.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/utils/TableGen/GlobalISel/GIMatchTree.cpp
The file was modifiedllvm/lib/Transforms/Scalar/GuardWidening.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonSubtarget.cpp
Commit 978c754076e37c7b392240dd121b5b6cb8d1bde2 by kazu
[llvm] Use llvm::any_of (NFC)
The file was modifiedllvm/lib/Support/CommandLine.cpp
The file was modifiedllvm/utils/TableGen/AsmWriterEmitter.cpp
The file was modifiedllvm/tools/llvm-objcopy/ELF/Object.cpp
Commit b023cdeacce3e7029d8a684bfbcb6f1c88dc1017 by kazu
[llvm] Use llvm::all_of (NFC)
The file was modifiedllvm/lib/Analysis/IRSimilarityIdentifier.cpp
The file was modifiedllvm/lib/DebugInfo/Symbolize/Symbolize.cpp
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Transforms/Scalar/GuardWidening.cpp
Commit b5c542d64b98b5a74d35dedad41051a0b00d7946 by ajcbik
[mlir][sparse] add narrower choices for pointers/indices

Use cases with 16- or even 8-bit pointer/index structures have been identified.

Reviewed By: penpornk

Differential Revision: https://reviews.llvm.org/D95015
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
The file was modifiedmlir/test/Dialect/Linalg/sparse_storage.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/test/lib/Transforms/TestSparsification.cpp
Commit 8031785f4a7ebd027edb34c91cbcf48db53ef444 by i
[ELF][test] Improve --wrap tests
The file was modifiedlld/test/ELF/wrap-shlib-undefined.s
Commit f96ff3c0f8ebd941b3f6b345164c3d858b781484 by i
[ELF] --wrap: Produce a dynamic symbol for undefined __wrap_

```
// a.s
jmp fcntl
// b.s
.globl fcntl
fcntl:
  ret
```

`ld.lld -shared --wrap=fcntl a.o b.o` has an `R_X86_64_JUMP_SLOT` referencing
the index 0 undefined symbol, which will cause a glibc `symbol lookup error` at
runtime. This is because `__wrap_fcntl` is not in .dynsym

We use an approximation `!wrap->isUndefined()`, which doesn't set
`isUsedInRegularObj` of `__wrap_fcntl` when `fcntl` is referenced and
`__wrap_fcntl` is undefined.

Fix this by using `sym->referenced`.
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/test/ELF/wrap-shlib-undefined.s
The file was modifiedlld/ELF/Symbols.h
Commit 8ca4b174d703e8676c6d47a2e25895c82e2e2ab7 by kai.wang
[RISCV] Implement vlseg intrinsics.

For Zvlsseg, we need continuous vector registers for the values. We need
to define new register classes for the different combinations of (number
of fields and LMUL). For example,

when the number of fields(NF) = 3, LMUL = 2, the values will be assigned
to (V0M2, V2M2, V4M2), (V2M2, V4M2, V6M2), (V4M2, V6M2, V8M2), ...

We define the vlseg intrinsics with multiple outputs. There is no way to
describe the codegen patterns with multiple outputs in the tablegen
files. We do the codegen in RISCVISelDAGToDAG and use EXTRACT_SUBREG to
extract the values of output.

The multiple scalable vector values will be put into a struct. This
patch is depended on the support for scalable vector struct.

Differential Revision: https://reviews.llvm.org/D94229
The file was modifiedllvm/lib/Target/RISCV/RISCVRegisterInfo.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVMCInstLower.cpp
The file was addedllvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit e22295385c7fb1104620a497da8eab935768fd78 by isanbard
[X86] Add segment and address-size override prefixes

X86 allows for the "addr32" and "addr16" address size override prefixes.
Also, these and the segment override prefixes should be recognized as
valid prefixes.

Differential Revision: https://reviews.llvm.org/D94726
The file was modifiedllvm/lib/Target/X86/X86InstrSystem.td
The file was modifiedllvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
The file was addedllvm/test/MC/X86/addr16-32.s
The file was addedllvm/test/MC/X86/segment-prefix.s
Commit 7fce3b240b6b313b1becf19ddf3f2a904c34ced2 by Raphael Isemann
[lldb][docs] Remove -webkit-hyphens in table cells so that table widths are correct on Safari

The tables in the new LLDB documentation currently are less wide than their
contents. The reason for that seems to be the `-webkit-hyphens: auto` property
that sphinx is setting for all `p` tags. The `p` tags in the generated Python
documentation seem to trigger some Safari layout issue, so Safari is calculating
the cell width to be smaller than it should be (which ends up looking like this
{F15104344} ).

This patch just sets that property back to the browser default `manual`. Not
sure if that's the proper workaround, but I clicked around on the website with
the changed CSS and nothing looked funny (which is I believe how webdev unit
testing works).

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D94991
The file was modifiedlldb/docs/_static/lldb.css
Commit 3c69ff4b03abaa3b7b80f4f3f2a1c1806e2d4495 by Raphael Isemann
[lldb][docs] Filter out 'thisown' attribute and inheritance boilerplate

This patch implements a filter that post-processes some of the generated RST sources
of the Python API docs. I mainly want to avoid two things:

1. Filter out all the inheritance boilerplate that just keeps mentioning for
every class that it inherits from the builtin 'object'. There is no inheritance
in the SB API.

2. More importantly, removes the SWIG generated `thisown` attribute from the
public documentation. I don't think we want users to mess with that attribute
and this is probably causing more confusion than it would help anyone. It also
makes the documentation for some smaller classes more verbose than necessary.

This patch just uses the sphinx event for reading source and removes the parts
that we don't want in documentation.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D94967
The file was modifiedlldb/docs/conf.py
Commit 255a507716bca63a375f3b8a379ccbbc58cb40da by david.sherwood
[NFC][InstructionCost] Use InstructionCost in lib/Transforms/IPO/IROutliner.cpp

In places where we call a TTI.getXXCost() function I have changed
the code to use InstructionCost instead of unsigned. This is in
preparation for later on when we will change the TTI interfaces
to return InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential Revision: https://reviews.llvm.org/D94427
The file was modifiedllvm/include/llvm/Transforms/IPO/IROutliner.h
The file was modifiedllvm/lib/Transforms/IPO/IROutliner.cpp
Commit b3c260d8fa07ed1202afdda9ca4c437a2a847080 by Raphael Isemann
[lldb][docs] Expand CSS fix for LLDB doc tables

Apparently the sphinx version on the server doesn't place <p> tags in the
table cells, so the previous fix from commit 7fce3b240b6b313b1becf19ddf3f2a90
didn't fix the bug for that sphinx version. Just expand the CSS workaround
to all <td> tags.
The file was modifiedlldb/docs/_static/lldb.css
Commit 2aeaaf841b58b2a6721f9271ae897e392fd0b357 by mikael.holmen
[GlobalISel] Add missing operand update when copy is required

When constraining an operand register using constrainOperandRegClass(),
the function may emit a COPY in case the provided register class does
not match the current operand register class. However, the operand
itself is not updated to make use of the COPY, thereby resulting in
incorrect code. This patch fixes that bug by updating the machine
operand accordingly.

Reviewed By: dsanders

Differential Revision: https://reviews.llvm.org/D91244
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/Utils.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
Commit 4ab704d62820396af5bd4a4322a5cbc2700a7ec3 by petar.avramovic
[AMDGPU][MC] Add tfe disassembler support MIMG opcodes

With tfe on there can be a vgpr write to vdata+1.
Add tablegen support for 5 register vdata store.
This is required for 4 register vdata store with tfe.

Differential Revision: https://reviews.llvm.org/D94960
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/mimg_vi.txt
Commit e20d46628a31a984074f2e1029e67734d5c2ab0d by Jan Svoboda
[clang][cli] Port more options to new parsing system

This patch adds marshalling information to more options.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D94957
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
Commit fc6677f0bbaf8a4654ef138fc6b0411c75a7313f by quic_arangasa
[Test Commit] This is a test commit for https://reviews.llvm.org/D94904

D94904 Reviewed by xbolva00

Reviewers for D94904: llvm-commits, MatzeB, craig.topper, kparzysz, efriedma, pengfei, wxiao3, xbolva00

Subscribers for D94904: llvm-commits, xbolva00

D94904 Differential Revision: https://reviews.llvm.org/D94904
The file was modifiedllvm/test/CodeGen/X86/critical-anti-dep-breaker.ll
Commit 536a1b0ea21163eaee53652c527ea20cf45bc675 by sam.mccall
[clangd] Allow CDBs to have background work to block on.

In preparation for moving DirectoryBasedCompilationDatabase broadcasting off
the main thread.

Differential Revision: https://reviews.llvm.org/D94603
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/GlobalCompilationDatabase.cpp
The file was modifiedclang-tools-extra/clangd/GlobalCompilationDatabase.h
Commit de4ba7073bd7e200aca704e6a26403e07bc246a5 by sam.mccall
[clangd] Move DirBasedCDB broadcasting onto its own thread.

This is on the critical path (it blocks getting the compile command for
the first file).

It's not trivially fast: it involves processing all filenames in the CDB
and doing some IO to look for shadowing CDBs.

And we may make this slower soon - making CDB configurable implies evaluating
the config for each listed to see which ones really are owned by the
broadcasted CDB.

Differential Revision: https://reviews.llvm.org/D94606
The file was modifiedclang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp
The file was modifiedclang-tools-extra/clangd/GlobalCompilationDatabase.cpp
The file was modifiedclang-tools-extra/clangd/GlobalCompilationDatabase.h
Commit e6be5c7cd6d227144f874623e2764890f80cad32 by sam.mccall
[clangd] Remove the recovery-ast options.

These force a couple of flags or that are now on by default.
So the flags don't currently do anything unless the compile command has
-fno-recovery-ast explicitly.

(For turning recovery *off* for debugging we can inject the flag with config)

This leaves the command-line flags around with no effect, I'm planning to add
a "retired flag" mechanism shortly in a separate patch.

Differential Revision: https://reviews.llvm.org/D94724
The file was modifiedclang-tools-extra/clangd/Compiler.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/Compiler.h
The file was modifiedclang-tools-extra/clangd/tool/ClangdMain.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
Commit 2ab5fd2c8567ac89d7e7639563babdfc78dbcf78 by sam.mccall
[clangd] Retire some flags for uncontroversial, stable features.

And mark a couple to be retired afther the next release branch.

Differential Revision: https://reviews.llvm.org/D94727
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
The file was modifiedclang-tools-extra/clangd/ParsedAST.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/unittests/TestTU.cpp
The file was modifiedclang-tools-extra/clangd/Compiler.h
The file was modifiedclang-tools-extra/clangd/tool/ClangdMain.cpp
Commit a6a72dfdf2e132d64ea73ddbbc0d3431b6483724 by Mirko.Brkusanin
[AMDGPU][GlobalISel] Avoid selecting S_PACK with constants

If constants are hidden behind G_ANYEXT we can treat them same way as G_SEXT.
For that purpose we extend getConstantVRegValWithLookThrough with option
to handle G_ANYEXT same way as G_SEXT.

Differential Revision: https://reviews.llvm.org/D92219
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/Utils.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Commit c1bc7981babcae20247650a4b8adab9c0c97890a by yedeng.yd
[Coroutine] Remain alignment information when merging frame variables

Summary: This is to address bug48712.
The solution in this patch is that when we want to merge two variable a
into the storage frame of variable b only if the alignment of a is
multiple of b.
There may be other strategies. But now I think they are hard to handle
and benefit little. Or we can implement them in the future.

Test-plan: check-llvm

Reviewers: jmorse, lxfind, junparser

Differential Revision: https://reviews.llvm.org/D94891
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was addedllvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll
The file was addedllvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-05.ll
Commit 29aaae281403c3ab26a4e87fe37a69e1b810e0f2 by quic_arangasa
[PostRASched] Regenerate Whole Test with update_llc_test_checks.py

Reviewed by xbolva00

Reviewers: llvm-commits, MatzeB, craig.topper, kparzysz, efriedma, pengfei, wxiao3, xbolva00

Subscribers: llvm-commits, xbolva00

Differential Revision: https://reviews.llvm.org/D94904
The file was modifiedllvm/test/CodeGen/X86/critical-anti-dep-breaker.ll
Commit cf50f4f764566a78da8c0551f853118fe604d8d7 by csigg
[mlir] Link mlir_runner_utils statically into cuda/rocm-runtime-wrappers.

The runtime-wrappers depend on LLVMSupport, pulling in static initialization code (e.g. command line arguments). Dynamically loading multiple such libraries results in ODR violoations.

So far this has not been an issue, but in D94421, I would like to load both the async-runtime and the cuda-runtime-wrappers as part of a cuda-runner integration test. When doing this, code that asserts that an option category is only registered once fails (note that I've only experienced this in Google's bazel where the async-runtime depends on LLVMSupport, but a similar issue would happen in cmake if more than one runtime-wrapper starts to depend on LLVMSupport).

The underlying issue is that we have a mix of static and dynamic linking. If all dependencies were loaded as shared objects (i.e. if LLVMSupport was linked dynamically to the runtime wrappers), each dependency would only get loaded once. However, linking dependencies dynamically would require special attention to paths (one could dynamically load the dependencies first given explicit paths). The simpler approach seems to be to link all dependencies statically into a single shared object.

This change basically applies the same logic that we have in the c_runner_utils: we have a shared object target that can be loaded dynamically, and we have a static library target that can be linked to other runtime-wrapper shared object targets.

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D94399
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-min.mlir
The file was modifiedmlir/test/mlir-rocm-runner/vecadd.mlir
The file was modifiedmlir/lib/ExecutionEngine/CMakeLists.txt
The file was modifiedmlir/tools/mlir-cuda-runner/CMakeLists.txt
The file was modifiedmlir/test/mlir-rocm-runner/vector-transferops.mlir
The file was modifiedmlir/test/mlir-rocm-runner/gpu-to-hsaco.mlir
The file was modifiedmlir/test/mlir-cuda-runner/two-modules.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-xor.mlir
The file was modifiedmlir/test/mlir-rocm-runner/two-modules.mlir
The file was modifiedmlir/include/mlir/ExecutionEngine/CRunnerUtils.h
The file was modifiedmlir/test/mlir-cuda-runner/gpu-to-cubin.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-region.mlir
The file was modifiedmlir/test/mlir-cuda-runner/multiple-all-reduce.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-and.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-max.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-or.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-op.mlir
The file was modifiedmlir/test/mlir-cuda-runner/shuffle.mlir
The file was modifiedmlir/tools/mlir-rocm-runner/CMakeLists.txt
Commit 43f34f58349ae178fd1c95d6a73c6858f35f2ea1 by julian.gross
Added check if there are regions that do not implement the RegionBranchOpInterface.

Add a check if regions do not implement the RegionBranchOpInterface. This is not
allowed in the current deallocation steps. Furthermore, we handle edge-cases,
where a single region is attached and the parent operation has no results.

This fixes: https://bugs.llvm.org/show_bug.cgi?id=48575

Differential Revision: https://reviews.llvm.org/D94586
The file was modifiedmlir/test/Transforms/buffer-deallocation.mlir
The file was modifiedmlir/lib/Transforms/BufferDeallocation.cpp
Commit eff6e75c3f7c5471f0326526dc3f0b8b10f8a4df by jeremy.morse
[LLD][ELF] Correct test temporary file paths

In 8031785f4a7ebd the temporary object being built was moved to %t/main.o,
but not all run lines were updated to reflect this. Observe the failure
on this buildbot:

  http://lab.llvm.org:8011/#/builders/5/builds/3646/steps/9/logs/stdio

It might pass locally for some people due to a stale %t.o hanging around
the build directory.
The file was modifiedlld/test/ELF/wrap-shlib-undefined.s
Commit eee2e8813f8113f23059a6a8757908c38e3099c5 by flo
[LV] Add test cases with multiple exits which require versioning.

This adds some test coverage for
caafdf07bbccbe89219539e2b56043c2a98358f1, which relaxed an assertion
to only require a unique exit block.
The file was addedllvm/test/Transforms/LoopVectorize/multiple-exits-versioning.ll
Commit f07403eb1a5f781b1bcc2b0c18ef7f632e1a0fdc by james.henderson
[llvm-symbolizer][doc] Reorder --relativenames in options list

This puts it in alphabetical order, matching the rest of the list.

Reviewed by: MaskRay, saugustine

Differential Revision: https://reviews.llvm.org/D94481
The file was modifiedllvm/docs/CommandGuide/llvm-symbolizer.rst
Commit a1d4649a5b176bf826685cac5cc4416b6498bdf9 by kadircet
[clangd] Fix division by zero when computing scores

NameMatch could be a float close to zero, in such cases we were
dividing by zero and moreover propogating a "NaN" to clients, which is invalid
per JSON.

This fixes the issue by only using Quality scores whenever the NameMatch is low,
as we do in CodeCompletion ranking.

Fixes https://github.com/clangd/clangd/issues/648.

Differential Revision: https://reviews.llvm.org/D94755
The file was modifiedclang-tools-extra/clangd/FindSymbols.cpp
The file was modifiedclang-tools-extra/clangd/CodeComplete.cpp
Commit f344c028dea34c1f1ec3b901d7a4c4d5d867384d by mark.murray
[AArch64] Add missing "pauth" feature to the .arch_extension directive.

Differential Revision: https://reviews.llvm.org/D94970
The file was addedllvm/test/MC/AArch64/armv8.3a-pauth.s
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
The file was modifiedllvm/test/MC/AArch64/directive-arch_extension.s
Commit cab20f61057760e3f9d7e12a9b25f3934ebd1ea4 by mark.murray
[AArch64] Add missing "flagm" feature to the .arch_extension directive.

Depends on D94970

Differential Revision: https://reviews.llvm.org/D94971
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
The file was addedllvm/test/MC/AArch64/armv8.4a-flagm.s
The file was modifiedllvm/test/MC/AArch64/directive-arch_extension.s
The file was modifiedllvm/test/MC/AArch64/directive-arch_extension-negative.s
Commit cba1ca9025899b1f6681ac824a7db60349d575f7 by csigg
Fix cuda-runner tests.
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-min.mlir
The file was modifiedmlir/test/mlir-rocm-runner/two-modules.mlir
The file was modifiedmlir/test/mlir-rocm-runner/vector-transferops.mlir
The file was modifiedmlir/test/mlir-cuda-runner/multiple-all-reduce.mlir
The file was modifiedmlir/test/mlir-cuda-runner/two-modules.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-region.mlir
The file was modifiedmlir/test/mlir-rocm-runner/vecadd.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-max.mlir
The file was modifiedmlir/test/mlir-rocm-runner/gpu-to-hsaco.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-xor.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-op.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-and.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-or.mlir
The file was modifiedmlir/test/mlir-cuda-runner/gpu-to-cubin.mlir
The file was modifiedmlir/test/mlir-cuda-runner/shuffle.mlir
Commit 42830f8bdc8f064fee648541f79f8e8d66072cce by hokein.wu
[clangd] Extend find-refs to include overrides.

find-references on `virtual void meth^od() = 0` will include override references.

Differential Revision: https://reviews.llvm.org/D94390
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
Commit 985b9b7e421a16e8fcab7f038601a23a25cdfd5d by bjorn.a.pettersson
[PM] Avoid duplicates in the Used/Preserved/Required sets

The pass analysis uses "sets" implemented using a SmallVector type
to keep track of Used, Preserved, Required and RequiredTransitive
passes. When having nested analyses we could end up with duplicates
in those sets, as there was no checks to see if a pass already
existed in the "set" before pushing to the vectors. This idea with
this patch is to avoid such duplicates by avoiding pushing elements
that already is contained when adding elements to those sets.

To align with the above PMDataManager::collectRequiredAndUsedAnalyses
is changed to skip adding both the Required and RequiredTransitive
passes to its result vectors (since RequiredTransitive always is
a subset of Required we ended up with duplicates when traversing
both sets).

Main goal with this is to avoid spending time verifying the same
analysis mulitple times in PMDataManager::verifyPreservedAnalysis
when iterating over the Preserved "set". It is assumed that removing
duplicates from a "set" shouldn't have any other negative impact
(I have not seen any problems so far). If this ends up causing
problems one could do some uniqueness filtering of the vector being
traversed in verifyPreservedAnalysis instead.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D94416
The file was modifiedllvm/lib/IR/Pass.cpp
The file was modifiedllvm/lib/IR/LegacyPassManager.cpp
The file was modifiedllvm/include/llvm/PassAnalysisSupport.h
Commit 5d718374a68fb68f3ec5ed3670b4dfa99dc42789 by chenmindong1
[SCEV] Add a test with wrong exit counts. (NFC)

This patch pre-commits a test case with wrong exit count
analysis for D92367.

Reviewed by: mkazantsev

Differential Revision: https://reviews.llvm.org/D94657
The file was addedllvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
Commit 21bfd068b32ece1c6fbc912208e7cd1782a8c3fc by amanieu
[AArch64] Add support for the GNU ILP32 ABI

Add the aarch64[_be]-*-gnu_ilp32 targets to support the GNU ILP32 ABI for AArch64.

The needed codegen changes were mostly already implemented in D61259, which added support for the watchOS ILP32 ABI. The main changes are:
- Wiring up the new target to enable ILP32 codegen and MC.
- ILP32 va_list support.
- ILP32 TLSDESC relocation support.

There was existing MC support for ELF ILP32 relocations from D25159 which could be enabled by passing "-target-abi ilp32" to llvm-mc. This was changed to check for "gnu_ilp32" in the target triple instead. This shouldn't cause any issues since the existing support was slightly broken: it was generating ELF64 objects instead of the ELF32 object files expected by the GNU ILP32 toolchain.

This target has been tested by running the full rustc testsuite on a big-endian ILP32 system based on the GCC ILP32 toolchain.

Reviewed By: kristof.beyls

Differential Revision: https://reviews.llvm.org/D94143
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
The file was modifiedllvm/test/MC/AArch64/adrp-relocation.s
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
The file was modifiedllvm/test/MC/AArch64/arm32-elf-relocs.s
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/MC/AArch64/arm64-ilp32.s
The file was modifiedllvm/test/MC/AArch64/elf-reloc-uncondbrimm.s
The file was modifiedllvm/test/MC/AArch64/ilp32-diagnostics.s
The file was addedllvm/test/CodeGen/AArch64/ilp32-va.ll
The file was modifiedllvm/test/MC/AArch64/arm64-elf-reloc-condbr.s
The file was modifiedllvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
The file was addedllvm/test/CodeGen/AArch64/ilp32-tlsdesc.ll
The file was modifiedllvm/test/MC/AArch64/elf-reloc-ldrlit.s
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
The file was modifiedllvm/lib/Support/Triple.cpp
The file was modifiedllvm/include/llvm/ADT/Triple.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetMachine.cpp
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
The file was modifiedllvm/test/MC/AArch64/elf-reloc-tstb.s
Commit c056f824340ff0189f3ef7870b83e3730de401d1 by Paul C. Anagnostopoulos
[TableGen] Improve algorithm for inheriting class template args and fields

Differential Revision: https://reviews.llvm.org/D94822
The file was modifiedllvm/lib/TableGen/TGParser.cpp
The file was modifiedllvm/lib/TableGen/Record.cpp
The file was modifiedllvm/include/llvm/TableGen/Record.h
The file was modifiedllvm/test/TableGen/self-reference-typeerror.td
Commit 19d02842ee56089b9208875ce4582e113e08fb6d by llvm-dev
[X86][AVX] Fold extract_subvector(VSRLI/VSHLI(x,32)) -> VSRLI/VSHLI(extract_subvector(x),32)

As discussed on D56387, if we're shifting to extract the upper/lower half of a vXi64 vector then we're actually better off performing this at the subvector level as its very likely to fold into something.

combineConcatVectorOps can perform this in reverse if necessary.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
The file was modifiedllvm/test/CodeGen/X86/combine-sra.ll
The file was modifiedllvm/test/CodeGen/X86/pmul.ll
Commit 4f5f29d40974b9ba6e89179dda738c1eb9794370 by Paul C. Anagnostopoulos
Revert "[TableGen] Improve algorithm for inheriting class template args and fields"

This reverts commit c056f824340ff0189f3ef7870b83e3730de401d1.

That commit causes build failures.
The file was modifiedllvm/include/llvm/TableGen/Record.h
The file was modifiedllvm/lib/TableGen/Record.cpp
The file was modifiedllvm/test/TableGen/self-reference-typeerror.td
The file was modifiedllvm/lib/TableGen/TGParser.cpp
Commit 8ba442bc2136c9ab91c74826db7195e406b94fb7 by hans
Revert "Following up on PR48517, fix handling of template arguments that refer"

Combined with 'da98651 - Revert "DR2064:
decltype(E) is only a dependent', this change (5a391d3) caused verifier
errors when building Chromium. See https://crbug.com/1168494#c1 for a
reproducer.

Additionally it reverts changes that were dependent on this one, see
below.

> Following up on PR48517, fix handling of template arguments that refer
> to dependent declarations.
>
> Treat an id-expression that names a local variable in a templated
> function as being instantiation-dependent.
>
> This addresses a language defect whereby a reference to a dependent
> declaration can be formed without any construct being value-dependent.
> Fixing that through value-dependence turns out to be problematic, so
> instead this patch takes the approach (proposed on the core reflector)
> of allowing the use of pointers or references to (but not values of)
> dependent declarations inside value-dependent expressions, and instead
> treating template arguments as dependent if they evaluate to a constant
> involving such dependent declarations.
>
> This ends up affecting a bunch of OpenMP tests, due to OpenMP
> imprecisely handling instantiation-dependent constructs, bailing out
> early instead of processing dependent constructs to the extent possible
> when handling the template.
>
> Previously committed as 8c1f2d15b826591cdf6bd6b468b8a7d23377b29e, and
> reverted because a dependency commit was reverted.

This reverts commit 5a391d38ac6c561ba908334d427f26124ed9132e.

It also restores clang/test/SemaCXX/coroutines.cpp to its state before
da986511fb9da1a46a0ca4dba2e49e2426036303.

Revert "[c++20] P1907R1: Support for generalized non-type template arguments of scalar type."

> Previously committed as 9e08e51a20d0d2b1c5724bb17e969d036fced4cd, and
> reverted because a dependency commit was reverted. This incorporates the
> following follow-on commits that were also reverted:
>
> 7e84aa1b81e72d44bcc58ffe1731bfc7abb73ce0 by Simon Pilgrim
> ed13d8c66781b50ff007cb089c5905f9bb9e8af2 by me
> 95c7b6cadbc9a3d4376ef44edbeb3c8bb5b8d7fc by Sam McCall
> 430d5d8429473c2b10b109991d7577a3cea41140 by Dave Zarzycki

This reverts commit 4b574008aef5a7235c1f894ab065fe300d26e786.

Revert "[msabi] Mangle a template argument referring to array-to-pointer decay"

> [msabi] Mangle a template argument referring to array-to-pointer decay
> applied to an array the same as the array itself.
>
> This follows MS ABI, and corrects a regression from the implementation
> of generalized non-type template parameters, where we "forgot" how to
> mangle this case.

This reverts commit 18e093faf726d15f210ab4917142beec51848258.
The file was removedclang/test/SemaTemplate/temp_arg_nontype_cxx17.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/lib/AST/MicrosoftMangle.cpp
The file was modifiedclang-tools-extra/clangd/index/remote/Client.cpp
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was modifiedclang-tools-extra/clangd/DumpAST.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaOverload.cpp
The file was modifiedlldb/include/lldb/lldb-enumerations.h
The file was modifiedclang/lib/Index/USRGeneration.cpp
The file was modifiedclang/lib/Serialization/ASTWriter.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_messages.cpp
The file was modifiedclang/test/OpenMP/distribute_parallel_for_dist_schedule_messages.cpp
The file was addedclang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_messages.cpp
The file was modifiedclang/include/clang/AST/ASTContext.h
The file was modifiedclang/test/OpenMP/target_update_from_messages.cpp
The file was modifiedclang/include/clang/AST/TemplateArgumentVisitor.h
The file was modifiedclang/test/OpenMP/target_simd_collapse_messages.cpp
The file was modifiedclang/test/OpenMP/target_update_to_messages.cpp
The file was modifiedclang/test/CodeGenCXX/mangle-template.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_messages.cpp
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedclang/test/OpenMP/distribute_simd_dist_schedule_messages.cpp
The file was modifiedclang-tools-extra/clangd/FindTarget.cpp
The file was modifiedclang/include/clang/AST/Expr.h
The file was modifiedclang/test/OpenMP/teams_distribute_simd_dist_schedule_messages.cpp
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
The file was modifiedclang/test/OpenMP/target_parallel_for_simd_collapse_messages.cpp
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/include/clang/AST/PropertiesBase.td
The file was modifiedclang/lib/AST/StmtProfile.cpp
The file was modifiedclang/tools/libclang/CIndex.cpp
The file was modifiedclang/lib/CodeGen/CGExprConstant.cpp
The file was modifiedclang/test/OpenMP/distribute_dist_schedule_messages.cpp
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/tools/libclang/CXCursor.cpp
The file was modifiedclang/lib/AST/ODRHash.cpp
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/test/SemaCXX/coroutines.cpp
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_dist_schedule_messages.cpp
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/test/CodeGenCXX/mangle-ms-templates.cpp
The file was modifiedclang/test/OpenMP/target_parallel_for_simd_ordered_messages.cpp
The file was modifiedclang/lib/AST/ASTStructuralEquivalence.cpp
The file was modifiedclang/lib/AST/ComputeDependence.cpp
The file was modifiedclang/lib/Sema/SemaLookup.cpp
The file was modifiedclang/test/SemaCXX/warn-unused-lambda-capture.cpp
The file was modifiedclang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
The file was modifiedclang/test/OpenMP/teams_distribute_dist_schedule_messages.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_simd_dist_schedule_messages.cpp
The file was modifiedclang/test/OpenMP/distribute_parallel_for_simd_dist_schedule_messages.cpp
The file was modifiedclang/lib/AST/Decl.cpp
The file was removedclang/test/CodeGenCXX/template-arguments.cpp
The file was modifiedclang/lib/AST/TemplateBase.cpp
The file was modifiedclang/lib/AST/TypeLoc.cpp
The file was modifiedclang/lib/AST/ExprCXX.cpp
The file was modifiedclang/include/clang/AST/TemplateBase.h
The file was modifiedclang/lib/Sema/SemaTemplateVariadic.cpp
The file was modifiedclang/test/OpenMP/task_messages.cpp
The file was modifiedclang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_messages.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
Commit cad4275d697c601761e0819863f487def73c67f8 by llvm-dev
[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE

Add DemandedElts support inside the TRUNCATE analysis.

Differential Revision: https://reviews.llvm.org/D56387
The file was modifiedllvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/AArch64/lowerMUL-newload.ll
The file was modifiedllvm/test/CodeGen/ARM/lowerMUL-newload.ll
The file was modifiedllvm/test/CodeGen/X86/min-legal-vector-width.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmulh.ll
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc.ll
The file was modifiedllvm/test/CodeGen/AArch64/aarch64-smull.ll
The file was modifiedllvm/test/CodeGen/X86/combine-sra.ll
Commit 8000c778532bfe1cc74191e41e19272e54477ed0 by steveire
Make it possible to store a ASTNodeKind in VariantValue

Differential Revision: https://reviews.llvm.org/D94878
The file was modifiedclang/lib/ASTMatchers/Dynamic/VariantValue.cpp
The file was modifiedclang/include/clang/ASTMatchers/Dynamic/VariantValue.h
The file was modifiedclang/unittests/ASTMatchers/Dynamic/VariantValueTest.cpp
Commit 537d90db827d1df0fef400653eefd857834ca0ba by Alexander.Richardson
[libc++] Split re.alg tests into locale-dependent and independent tests

Currently all these tests are XFAILED on Linux even though the problem
only seems to be with the few checks that look at collation. To retain
test coverage this splits the locale-dependent tests into a separate
.pass.cpp that is XFAILed as before.
This commit also XFAILs the locale-dependent tests on FreeBSD since the
[=M=] and [.ch.] behaviour for cs_CZ also doesn't seem to match the
behaviour that is expected by these tests.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D94969
The file was addedlibcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
The file was addedlibcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
The file was addedlibcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
The file was addedlibcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
The file was addedlibcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
The file was modifiedlibcxx/test/std/re/re.alg/re.alg.match/basic.pass.cpp
The file was addedlibcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
The file was modifiedlibcxx/test/std/re/re.alg/re.alg.match/extended.pass.cpp
The file was modifiedlibcxx/utils/libcxx/test/features.py
The file was modifiedlibcxx/test/std/re/re.alg/re.alg.match/awk.pass.cpp
The file was addedlibcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
The file was addedlibcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
The file was modifiedlibcxx/test/std/re/re.alg/re.alg.search/ecma.pass.cpp
The file was modifiedlibcxx/test/std/re/re.alg/re.alg.match/ecma.pass.cpp
The file was modifiedlibcxx/test/std/re/re.alg/re.alg.search/awk.pass.cpp
The file was modifiedlibcxx/test/std/re/re.alg/re.alg.search/basic.pass.cpp
The file was modifiedlibcxx/test/std/re/re.alg/re.alg.search/extended.pass.cpp
Commit e069662deb1fa167b3e5fdce4c9949e663df8082 by jonathanchesterfield
[libomptarget][devicertl] Wrap source in declare target pragmas

[libomptarget][devicertl] Wrap source in declare target pragmas

Factored out of D93135 / D94745. C++ and cuda ignore unknown pragmas
so this is a NFC for the current implementation language. Removes noise
from patches for building deviceRTL as openmp.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D95048
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/cancel.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/task.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/loop.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/data_sharing.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/omptarget.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/parallel.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/support.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/libcall.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/reduction.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_locks.hip
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/critical.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/omp_data.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/sync.cu
Commit e377c8eeb4aa2eb239a651f1fe12c27fc77deda3 by steveire
Implement dynamic mapAnyOf in terms of ASTNodeKinds

This reduces template bloat, but more importantly, makes it possible to
construct one from clang-query without template types.

Differential Revision: https://reviews.llvm.org/D94879
The file was modifiedclang/lib/ASTMatchers/Dynamic/Marshallers.h
Commit 40cd262c4339c8cbd67bf5c96c4a052ae02a8660 by jotrem
Loop peeling: check that latch is conditional branch

Loop peeling assumes that the loop's latch is a conditional branch.  Add
a check to canPeel that explicitly checks for this, and testcases that
otherwise fail an assertion when trying to peel a loop whose back-edge
is a switch case or the non-unwind edge of an invoke.

Reviewed By: skatkov, fhahn

Differential Revision: https://reviews.llvm.org/D94995
The file was modifiedllvm/lib/Transforms/Utils/LoopPeel.cpp
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll
Commit 6c1bc0d24ceacfe736de4fd29a21b91125125a1f by Louis Dionne
[docs] Fix overly specific link to uploading patches on Phabricator

The documentation for contributing to LLVM currently links to the section
explaining how to submit a Phabricator review using the web interface.
I believe it would be better to link to the general page for using
Phabricator instead, which explains how to sign up with Phabricator,
and also how to submit patches using either the web interface or the
command-line.

I think this is worth changing because what currently *appears* to be our
preferred way of submitting a patch (through the web interface) isn't
actually what we prefer. Indeed, patches submitted from the command-line
have more meta-data available (such as which repository the patch targets),
and also can't suffer from missing context.

Differential Revision: https://reviews.llvm.org/D94929
The file was modifiedllvm/docs/Contributing.rst
Commit 8590d245434dd4205c89f0a05b4c22feccb7421c by spatel
[SLP] move reduction createOp functions; NFC

We were able to remove almost all of the state from
OperationData, so these don't make sense as members
of that class - just pass the RecurKind in as a param.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 1c54112a5762ebab2c14a90c55f27d00bfced7f8 by spatel
[SLP] refactor more reduction functions; NFC

We were able to remove almost all of the state from
OperationData, so these don't make sense as members
of that class - just pass the RecurKind in as a param.

More streamlining is possible, but I'm trying to avoid
logic/typo bugs while fixing this. Eventually, we should
not need the `OperationData` class.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit c09be0d2a0f930a128c946329b42eef45d53062a by spatel
[SLP] reduce reduction code for checking vectorizable ops; NFC

This is another step towards removing `OperationData` and
fixing FMF matching/propagation bugs when forming reductions.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit c540ce9900ff99566b4951186e2f070b3b36cdbe by sameer.sahasrabuddhe
[AMDGPU] pin lit test divergent-unswitch.ll to the old pass manager

The loop-unswitch transform should not be performed on a loop whose
condition is divergent. For this to happen correctly, divergence
analysis must be available. The existing divergence analysis has not
been ported to the new pass manager yet. As a result, loop unswitching
on the new pass manager is currently unsafe on targets that care about
divergence.

This test is temporarily disabled to unblock work on the new pass
manager. The issue is now tracked in bug 48819.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D95051
The file was modifiedllvm/test/Transforms/LoopUnswitch/AMDGPU/divergent-unswitch.ll
Commit fd70f70d1e02752f411fcf923fddda31cce376ae by tianshilei1992
[OpenMP][NVPTX] Replaced CUDA builtin vars with LLVM intrinsics

Replaced CUDA builtin vars with LLVM intrinsics such that we don't need
definitions of those intrinsics.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D95013
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
Commit 7dd198852b4db52ae22242dfeda4eccda83aa8b2 by diego.caballero
[mlir][Affine] Add support for multi-store producer fusion

This patch adds support for producer-consumer fusion scenarios with
multiple producer stores to the AffineLoopFusion pass. The patch
introduces some changes to the producer-consumer algorithm, including:

* For a given consumer loop, producer-consumer fusion iterates over its
producer candidates until a fixed point is reached.

* Producer candidates are gathered beforehand for each iteration of the
consumer loop and visited in reverse program order (not strictly guaranteed)
to maximize the number of loops fused per iteration.

In general, these changes were needed to simplify the multi-store producer
support and remove some of the workarounds that were introduced in the past
to support more fusion cases under the single-store producer limitation.

This patch also preserves the existing functionality of AffineLoopFusion with
one minor change in behavior. Producer-consumer fusion didn't fuse scenarios
with escaping memrefs and multiple outgoing edges (from a single store).
Multi-store producer scenarios will usually (always?) have multiple outgoing
edges so we couldn't fuse any with escaping memrefs, which would greatly limit
the applicability of this new feature. Therefore, the patch enables fusion for
these scenarios. Please, see modified tests for specific details.

Reviewed By: andydavis1, bondhugula

Differential Revision: https://reviews.llvm.org/D92876
The file was modifiedmlir/test/Transforms/loop-fusion.mlir
The file was modifiedmlir/include/mlir/Transforms/LoopFusionUtils.h
The file was modifiedmlir/include/mlir/Analysis/Utils.h
The file was modifiedmlir/lib/Analysis/Utils.cpp
The file was modifiedmlir/include/mlir/Analysis/AffineStructures.h
The file was modifiedmlir/include/mlir/Transforms/Passes.td
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was modifiedmlir/lib/Transforms/Utils/LoopFusionUtils.cpp
The file was modifiedmlir/lib/Transforms/LoopFusion.cpp
Commit b11b6ab3e09464e88e57b69ff4a8fc8e1c00cc5b by craig.topper
[RISCV] Add way to mark CompressPats that should only be used for compressing.

There can be muliple patterns that map to the same compressed
instruction. Reversing those leads to multiple ways to uncompress
an instruction, but its not easily controllable which one will
be chosen by the tablegen backend.

This patch adds a flag to mark patterns that should only be used
for compressing. This allows us to leave one canonical pattern
for uncompressing.

The obvious benefit of this is getting c.mv to uncompress to
the addi patern that is aliased to the mv pseudoinstruction. For
the add/and/or/xor/li patterns it just removes some unreachable
code from the generated code.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D94894
The file was modifiedllvm/test/TableGen/AsmPredicateCombiningRISCV.td
The file was modifiedllvm/utils/TableGen/RISCVCompressInstEmitter.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoC.td
The file was modifiedllvm/test/MC/RISCV/option-rvc.s
The file was modifiedllvm/test/MC/RISCV/compress-rv32i.s
Commit cad16e4a9267f08229c59e473db6dedd730a5d93 by jpienaar
Avoid unused variable warning in opt mode
The file was modifiedmlir/lib/Transforms/LoopFusion.cpp
Commit 4c1eaf26ae70b9f0e441b0f613871d697c4c9a7d by tobias.gysi
[mlir] fix the rocm runtime wrapper to account for cuda / rocm api differences

The patch adapts the rocm runtime wrapper due to subtle differences between the cuda and the rocm/hip runtime api.

Reviewed By: csigg

Differential Revision: https://reviews.llvm.org/D95027
The file was modifiedmlir/tools/mlir-rocm-runner/rocm-runtime-wrappers.cpp
Commit 7169d3a315f4cdc19c4ab6b8f20c6f91b46ba9b8 by medismail.bennani
[lldb/Commands] Refactor ProcessLaunchCommandOptions to use TableGen (NFC)

This patch refactors the current implementation of
`ProcessLaunchCommandOptions` to be generated by TableGen.

The patch also renames the class to `CommandOptionsProcessLaunch` to
align better with the rest of the codebase style and moves it to
separate files.

Differential Review: https://reviews.llvm.org/D95059

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
The file was modifiedlldb/include/lldb/Target/Process.h
The file was modifiedlldb/source/Commands/CommandObjectPlatform.cpp
The file was addedlldb/source/Commands/CommandOptionsProcessLaunch.h
The file was modifiedlldb/source/Commands/Options.td
The file was addedlldb/source/Commands/CommandOptionsProcessLaunch.cpp
The file was modifiedlldb/source/Commands/CMakeLists.txt
The file was modifiedlldb/source/Commands/CommandObjectProcess.cpp
The file was modifiedlldb/source/Target/Process.cpp
Commit 719b563ecf6851136e4c1e6a5ff6c407522dd024 by conanap
[PowerPC][Power10] Exploit splat instruction xxsplti32dx in Power10

Exploits the instruction xxsplti32dx.

It can be used to materialize any 64 bit scalar/vector splat by using two instances, one for the upper 32 bits and the other for the lower 32 bits. It should not materialize the cases which can be materialized by using the instruction xxspltidp.

Differential Revision: https://https://reviews.llvm.org/D90173
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/p10-splatImm32.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
Commit cc4244d55f98b03603cf54eb4abac7e128e3c99a by frgossen
[MLIR][Standard] Add log1p operation to std

Differential Revision: https://reviews.llvm.org/D95041
The file was modifiedmlir/test/IR/core-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
Commit 36e62b1ff7e7aa883f8ea2f236e9c04df6976b59 by i
[AArch64] Fix -Wunused-but-set-variable in GCC -DLLVM_ENABLE_ASSERTIONS=off build
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Commit b8b5e87e6b8102d77e4e6beccf4e0f0237acc897 by llvm-dev
[X86][AVX] Handle vperm2x128 shuffling of a subvector splat.

We already handle "vperm2x128 (ins ?, X, C1), (ins ?, X, C1), 0x31" for shuffling of the upper subvectors, but we weren't dealing with the case when we were splatting the upper subvector from a single source.
The file was modifiedllvm/test/CodeGen/X86/avx-vperm2x128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 9d792fef577843b213aa11954820512942dc31c7 by craig.topper
[RISCV] Remove unnecessary APInt copy. NFC

getAPIntValue returns a const APInt& so keep it as a reference.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit 16d6e8527189298c75bf5690c771e8ab6dc3628d by Dávid Bolvanský
[BuildLibcalls] Mark some libcalls with inaccessiblememonly and inaccessiblemem_or_argmemonly

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94850
The file was modifiedllvm/test/Transforms/InferFunctionAttrs/annotate.ll
The file was modifiedllvm/lib/Transforms/Utils/BuildLibCalls.cpp
Commit 69e0bc77a5d74a5f0e57ad3e7a22ce4fba210b85 by rnk
[COFF] Use range for on relocations, NFC
The file was modifiedlld/COFF/Chunks.cpp
Commit b270fd59f0a86fe737853abc43e76b9d29a67eea by George Burgess IV
Revert "[clang] Change builtin object size when subobject is invalid"

This reverts commit 275f30df8ad6de75e1f29e4b33eaeb67686caf0d.

As noted on the code review (https://reviews.llvm.org/D92892), this
change causes us to reject valid code in a few cases. Reverting so we
have more time to figure out what the right fix{es are, is} here.
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/test/CodeGen/object-size.c
Commit a51226057fc30510ac86b32a36a9769ddbf4c318 by hans
Revert "[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE"

It caused "Vector shift amounts must be in the same as their first arg"
asserts in Chromium builds. See the code review for repro instructions.

> Add DemandedElts support inside the TRUNCATE analysis.
>
> Differential Revision: https://reviews.llvm.org/D56387

This reverts commit cad4275d697c601761e0819863f487def73c67f8.
The file was modifiedllvm/test/CodeGen/AArch64/aarch64-smull.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
The file was modifiedllvm/test/CodeGen/X86/min-legal-vector-width.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
The file was modifiedllvm/test/CodeGen/AArch64/lowerMUL-newload.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmulh.ll
The file was modifiedllvm/test/CodeGen/ARM/lowerMUL-newload.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/combine-sra.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit e8aec763a57e211420dfceb2a8dc6b88574924f3 by mtrofin
[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor

When using 2 InlinePass instances in the same CGSCC - one for other
mandatory inlinings, the other for the heuristic-driven ones - the order
in which the ImportedFunctionStats would be output-ed would depend on
the destruction order of the inline passes, which is not deterministic.

This patch moves the ImportedFunctionStats responsibility to the
InlineAdvisor to address this problem.

Differential Revision: https://reviews.llvm.org/D94982
The file was modifiedllvm/lib/Analysis/InlineAdvisor.cpp
The file was modifiedllvm/lib/Analysis/MLInlineAdvisor.cpp
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was modifiedllvm/lib/Transforms/Utils/ImportedFunctionsInliningStatistics.cpp
The file was modifiedllvm/lib/Analysis/ReplayInlineAdvisor.cpp
The file was modifiedllvm/include/llvm/Transforms/IPO/Inliner.h
The file was modifiedllvm/include/llvm/Analysis/ReplayInlineAdvisor.h
The file was modifiedllvm/include/llvm/Analysis/InlineAdvisor.h
The file was modifiedllvm/include/llvm/Analysis/MLInlineAdvisor.h
The file was modifiedllvm/test/Transforms/Inline/inline_stats.ll
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h
Commit ff3b51b0549343b6ef7d718e036116d5b502458c by pklausler
[flang] Fix ASSOCIATE statement name resolution

F18 Clause 19.4p9 says:

  The associate names of an ASSOCIATE construct have the scope of the
  block.

Clause 11.3.1p1 says the ASSOCIATE statement is not itself in the block:

  R1102 associate-construct is:  associate-stmt block end-associate-stmt

Associate statement associations are currently fully processed from left
to right, incorrectly interposing associating entities earlier in the
list on same-named entities in the host scope.

    1  program p
    2    logical :: a = .false.
    3    real :: b = 9.73
    4    associate (b => a, a => b)
    5      print*, a, b
    6    end associate
    7    print*, a, b
    8  end

Associating names 'a' and 'b' at line 4 in this code are now both
aliased to logical host entity 'a' at line 2.  This happens because the
reference to 'b' in the second association incorrectly resolves 'b' to
the entity in line 4 (already associated to 'a' at line 2), rather than
the 'b' at line 3.  With bridge code to process these associations,
f18 output is:

F F
F 9.73

It should be:

9.73 F
F 9.73

To fix this, names in right-hand side selector variables/expressions
must all be resolved before any left-hand side entities are resolved.
This is done by maintaining a stack of lists of associations, rather
than a stack of associations.  Each ASSOCIATE statement's list of
assocations is then visited once for right-hand side processing, and
once for left-hand side processing.

Note that other construct associations do not have this problem.
SELECT RANK and SELECT TYPE each have a single assocation, not a list.
Constraint C1113 prohibits the right-hand side of a CHANGE TEAM
association from referencing any left-hand side entity.

Differential Revision: https://reviews.llvm.org/D95010
The file was addedflang/test/Semantics/resolve100.f90
The file was modifiedflang/lib/Semantics/resolve-names.cpp
Commit d97f776be5f8cd3cd446fe73827cd355f6bab4e1 by mtrofin
Revert "[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor"

This reverts commit e8aec763a57e211420dfceb2a8dc6b88574924f3.
The file was modifiedllvm/include/llvm/Analysis/ReplayInlineAdvisor.h
The file was modifiedllvm/include/llvm/Transforms/IPO/Inliner.h
The file was modifiedllvm/include/llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h
The file was modifiedllvm/include/llvm/Analysis/MLInlineAdvisor.h
The file was modifiedllvm/include/llvm/Analysis/InlineAdvisor.h
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
The file was modifiedllvm/test/Transforms/Inline/inline_stats.ll
The file was modifiedllvm/lib/Analysis/InlineAdvisor.cpp
The file was modifiedllvm/lib/Analysis/MLInlineAdvisor.cpp
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was modifiedllvm/lib/Transforms/Utils/ImportedFunctionsInliningStatistics.cpp
The file was modifiedllvm/lib/Analysis/ReplayInlineAdvisor.cpp
Commit b3e73dc5af6b4d1438ea401a7ab60bfe298a53c6 by jezng
[lld-macho][easy] Create group for LLD-specific CLI flags

Reviewed By: #lld-macho, compnerd

Differential Revision: https://reviews.llvm.org/D94545
The file was modifiedlld/MachO/Options.td
Commit 697f4e429b900d2d3d8a03713c7d6cd562a5bd35 by jezng
[lld-macho] Run ObjCContractPass during LTO

Run the ObjCARCContractPass during LTO. The legacy LTO backend (under
LTO/ThinLTOCodeGenerator.cpp) already does this; this diff just adds that
behavior to the new LTO backend. Without that pass, the objc.clang.arc.use
intrinsic will get passed to the instruction selector, which doesn't know how to
handle it.

In order to test both the new and old pass managers, I've also added support for
the `--[no-]lto-legacy-pass-manager` flags.

P.S. Not sure if the ordering of the pass within the pipeline matters...

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D94547
The file was modifiedlld/MachO/Config.h
The file was modifiedlld/MachO/Options.td
The file was modifiedlld/MachO/LTO.cpp
The file was addedlld/test/MachO/objc-arc-contract.ll
The file was modifiedllvm/lib/LTO/LTOBackend.cpp
The file was modifiedlld/MachO/Driver.cpp
The file was modifiedllvm/include/llvm/LTO/Config.h
Commit 560d7e04113bf43ed0928a1fbdf328818194141e by dfukalov
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets

... to reduce headers dependency.

Reviewed By: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D95036
The file was modifiedllvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
The file was modifiedllvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
The file was addedllvm/lib/Target/AMDGPU/GCNSubtarget.h
The file was modifiedllvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600RegisterInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertSkips.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIAddIMGInit.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600FrameLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegPressure.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600MachineScheduler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600InstrInfo.cpp
The file was modifiedllvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPropagateAttributes.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIPostRABundler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
The file was addedllvm/lib/Target/AMDGPU/R600Subtarget.h
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600AsmPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600Packetizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegPressure.h
The file was modifiedllvm/lib/Target/AMDGPU/R600ISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIModeRegister.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
Commit f5d8eb085af97c6d873edf3ca16d85b8a97c67e6 by nicolas.vasilache
[mlir][Linalg] NFC - getAssumedNonShapedOperands now returns OperandRange

Also adds a isInput interface method.
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
Commit 11802eced5d67394c1dcb5acfaef38b0038c6d90 by tlively
[WebAssembly] Prototype new f64x2 conversions

As proposed in https://github.com/WebAssembly/simd/pull/383.

Differential Revision: https://reviews.llvm.org/D95012
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td
The file was modifiedllvm/test/MC/WebAssembly/simd-encodings.s
Commit 8776e3f289c19ee2e85c593792806e6503408d59 by erich.keane
[EXTINT][OMP] Fix _ExtInt type checking in device code

_ExtInt gets stuck in the device-type-checking for __int128 if it is
between 65 and 128 bits inclusive.  Anything larger or smaller was
permitted despite this, so this is simply enabling 65-128 bit _ExtInts.
_ExtInt is supported on all our current ABIs, but we stil use the
hasExtIntType in the target info to differentiate here so that it can be
disabled.
The file was modifiedclang/test/OpenMP/nvptx_unsupported_type_messages.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/lib/Sema/Sema.cpp
Commit b564b12bc665c5b9d7148422e4a65871dd31b912 by andrzej.warzynski
[flang][driver] Refactor one unit-test case to use fixtures (nfc)

Move the unit test from InputOutputTest.cpp to FrontendActionTest.cpp
and re-implement it in terms of the FrontendActionTest fixture. This is
just a small code clean-up and a continuation of:
  * https://reviews.llvm.org/D93544

Moving forward, we should try be implementing all unit-test cases for
Flang's frontend actions in terms of FrontendActionTest.

Reviewed By: sameeranjoshi

Differential Revision: https://reviews.llvm.org/D94922
The file was modifiedflang/unittests/Frontend/CMakeLists.txt
The file was modifiedflang/unittests/Frontend/FrontendActionTest.cpp
The file was modifiedflang/unittests/Frontend/CompilerInstanceTest.cpp
The file was removedflang/unittests/Frontend/InputOutputTest.cpp
Commit ca4ed1e7aeebe21dc3952f84b408805ab17ad63f by nikita.ppv
[PredicateInfo] Generalize processing of conditions

Branch/assume conditions in PredicateInfo are currently handled in
a rather ad-hoc manner, with some arbitrary limitations. For example,
an `and` of two `icmp`s will be handled, but an `and` of an `icmp`
and some other condition will not. That also includes the case where
more than two conditions and and'ed together.

This patch makes the handling more general by looking through and/ors
up to a limit and considering all kinds of conditions (though operands
will only be taken for cmps of course).

Differential Revision: https://reviews.llvm.org/D94447
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/condprop.ll
The file was modifiedllvm/test/Transforms/SCCP/conditions-ranges.ll
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/testandor.ll
The file was modifiedllvm/lib/Transforms/Utils/PredicateInfo.cpp
The file was modifiedllvm/test/Transforms/NewGVN/assume-equal.ll
Commit ea616f9026dc6bd9c67ebe2d3226ac91122a7945 by jonathanchesterfield
[libomptarget][devicertl][nfc] Remove some cuda intrinsics, simplify

[libomptarget][devicertl][nfc] Remove some cuda intrinsics, simplify

Replace __popc, __ffs with clang intrinsics. Move kmpc_impl_min to only file
that uses it and replace template with explictly typed.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95060
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/reduction.cu
Commit 9e708ac6b9929e9baa2017ff62f2353e6621a105 by rnk
[COFF] Fix relocation offsets in pdb-file-statics test input

The relocation offsets were incorrect. I fixed them with llvm-readobj
-codeview -codeview-subsection-bytes, which has a helpful printout of
the relocations that apply to a given symbol record with their offsets.
With this, I was able to update the relocation offsets in the yaml to
fix the line table and the S_DEFRANGE_REGISTER records.

There is still some remaining inconsistency in yaml2obj and obj2yaml
when round tripping MSVC objects, but that isn't a blocker for relanding
D94267.
The file was modifiedlld/test/COFF/Inputs/pdb-file-statics-a.yaml
Commit 599fdfc5db8f44582ee9bd05544769268ec9b4a3 by pavel
Revert "[lldb] Re-enable TestPlatformProcessConnect on macos"

This reverts commit 079e664661770a78e30c0d27a12d50047f1b1ea8. It needs
more work.
The file was modifiedlldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
The file was modifiedlldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
Commit fbc1dcb946553a3dc923a63288d9275eea86f918 by jonathanchesterfield
[libomptarget][devicertl][nfc] Simplify target_atomic abstraction

[libomptarget][devicertl][nfc] Simplify target_atomic abstraction

Atomic functions were implemented as a shim around cuda's atomics, with
amdgcn implementing those symbols as a shim around gcc style intrinsics.

This patch folds target_atomic.h into target_impl.h and folds amdgcn.

Further work is likely to be useful here, either changing to openmp's atomic
interface or instantiating the templates on the few used types in order to
move them into a cuda/c++ implementation file. This change is mostly to
group the remaining uses of the cuda api under nvptx' target_impl abstraction.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95062
The file was modifiedopenmp/libomptarget/deviceRTLs/common/state-queuei.h
The file was removedopenmp/libomptarget/deviceRTLs/common/target_atomic.h
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/reduction.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt
The file was removedopenmp/libomptarget/deviceRTLs/amdgcn/src/hip_atomics.h
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/loop.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/libcall.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
The file was modifiedopenmp/libomptarget/deviceRTLs/common/omptargeti.h
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
Commit c075572646a9bd71ac675e20f3d75101ae7dd090 by nicolas.vasilache
[mlir][Linalg] NFC - Expose getSmallestBoundingIndex as an utility function
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
Commit 1a9bd5b81328adf0dd5a8b4f3ad5949463e66da3 by rnk
Reland "[PDB] Defer relocating .debug$S until commit time and parallelize it"

This reverts commit 5b7aef6eb4b2930971029b984cb2360f7682e5a5 and relands
6529d7c5a45b1b9588e512013b02f891d71bc134.

The ASan error was debugged and determined to be the fault of an invalid
object file input in our test suite, which was fixed by my last change.
LLD's project policy is that it assumes input objects are valid, so I
have added a comment about this assumption to the relocation bounds
check.
The file was modifiedlld/COFF/Chunks.cpp
The file was modifiedllvm/include/llvm/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.h
The file was modifiedllvm/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp
The file was modifiedllvm/lib/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.cpp
The file was modifiedlld/COFF/Chunks.h
The file was modifiedlld/COFF/PDB.cpp
Commit e406de77c6f33a6d3bf0b432bad1217b37605c15 by nikita.ppv
[PredicateInfo][SCCP][NewGVN] Add tests for logical and/or (NFC)

Duplicate some existing and/or tests using logical form.
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/testandor.ll
The file was modifiedllvm/test/Transforms/SCCP/conditions-ranges.ll
The file was modifiedllvm/test/Transforms/NewGVN/condprop.ll
Commit 8fc9b6c2c560fc5945ce2115de345efb1617d59d by medismail.bennani
[lldb/Commands] Align process launch --plugin with process attach (NFC)

Following `7169d3a315f4cdc19c4ab6b8f20c6f91b46ba9b8`, this patch updates
the short option for the plugin command option to (`-p` to `-P`) to
align with the `process attach` command options.

The long option remains the same since there are already the same for both
commands.

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
The file was modifiedlldb/source/Commands/CommandOptionsProcessLaunch.cpp
Commit 1c6d1e57c15b59114a05b20e667517872510aaa9 by nikita.ppv
[PredicateInfo] Handle logical and/or

Teach PredicateInfo to handle logical and/or the same way as
bitwise and/or. This allows handling logical and/or inside IPSCCP
and NewGVN.
The file was modifiedllvm/lib/Transforms/Utils/PredicateInfo.cpp
The file was modifiedllvm/test/Transforms/NewGVN/condprop.ll
The file was modifiedllvm/test/Transforms/SCCP/conditions-ranges.ll
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/testandor.ll
Commit 866cb26039043581d5ab8b30d5a999a7c273f361 by nicolas.vasilache
[mlir] Fix SubTensorInsertOp semantics

Like SubView, SubTensor/SubTensorInsertOp are allowed to have rank-reducing/expanding semantics. In the case of SubTensorInsertOp , the rank of offsets/sizes/strides should be the rank of the destination tensor.

Also, add a builder flavor for SubTensorOp to return a rank-reduced tensor.

Differential Revision: https://reviews.llvm.org/D95076
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/test/IR/core-ops.mlir
Commit b1e1bbae0e30c89251940efb0780eee6a1b79ecd by pifon
[mlir] Add ComplexDialect to SCF->GPU pass.
The file was modifiedmlir/lib/Conversion/SCFToGPU/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp
Commit 8dd58a509cc8b93a211c9b07b12e1548dc187fc3 by nicolas.vasilache
[mlir][Linalg] NFC - Fully compose map and operands when creating AffineMin in tiling.

This may simplify the composition of patterns but is otherwise NFC.
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
Commit 0996b590aaafe2de8378fd45a5094c13a4de3360 by pklausler
[flang] Infrastructure improvements in utility routines

* IsArrayElement() needs another option to control whether it
  should ignore trailing component references.
* Add IsObjectPointer().
* Add const Scope& variants of IsFunction() and IsProcedure().
* Make TypeAndShape::Characterize() work with procedure bindings.
* Handle CHARACTER length in MeasureSizeInBytes().
* Fine-tune FindExternallyVisibleObject()'s handling of dummy arguments
  to conform with Fortran 2018: only INTENT(IN) and dummy pointers
  in pure functions signify; update two tests accordingly.

Also: resolve some stylistic inconsistencies and add a missing
"const" in the expression traversal template framework.

Differential Revision: https://reviews.llvm.org/D95011
The file was modifiedflang/lib/Evaluate/tools.cpp
The file was modifiedflang/test/Semantics/structconst03.f90
The file was modifiedflang/include/flang/Evaluate/traverse.h
The file was modifiedflang/lib/Semantics/tools.cpp
The file was modifiedflang/test/Semantics/structconst04.f90
The file was modifiedflang/include/flang/Evaluate/call.h
The file was modifiedflang/include/flang/Evaluate/tools.h
The file was modifiedflang/lib/Evaluate/characteristics.cpp
Commit a3d7cee7f9bdfbe3e88e4de39a76c3d3e2690fdb by akhuang
[CodeView] Emit function types in -gline-tables-only.

This change adds function types to further differentiate between
FUNC_IDs in -gline-tables-only.

Size increase of object files in clang are
Before: 917990 kb
After:  999312 kb

Bug: https://bugs.llvm.org/show_bug.cgi?id=48432

Differential Revision: https://reviews.llvm.org/D95001
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp
Commit 33a5d212c6198af2bd902bb8e4cfd0f0bec0114f by tianshilei1992
[OpenMP][NVPTX] Added forward declaration to pave the way for building deviceRTLs with OpenMP

Once we switch to build deviceRTLs with OpenMP, primitives and CUDA
intrinsics cannot be used directly anymore because `__device__` is not recognized
by OpenMP compiler. To avoid involving all CUDA internal headers we had in `clang`,
we forward declared these functions. Eventually they will be transformed into
right LLVM instrinsics.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D95058
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
Commit bebbe64075abf9d9887a8e1ee39c1ecefe970954 by psteinfeld
[flang] Fix creation of deferred shape arrays by POINTER statement

It's possible to  declare deferred shape array using the POINTER
statement, for example:

  POINTER :: var(:)

When analyzing POINTER declarations, we were not capturing the array
specification information, if present.  I fixed this by changing the
"Post" function for "parser::PointerDecl" to check to see if the
declaration contained a "DeferredShapeSpecList".  In such cases, I
analyzed the shape and used to information to declare an "ObjectEntity"
that contains the shape information rather than an "UnknownEntity".

I also added a couple of small tests that fail to compile without these
changes.

Differential Revision: https://reviews.llvm.org/D95080
The file was modifiedflang/lib/Semantics/resolve-names-utils.h
The file was modifiedflang/test/Semantics/allocate12.f90
The file was modifiedflang/lib/Semantics/resolve-names-utils.cpp
The file was modifiedflang/lib/Semantics/resolve-names.cpp
Commit 95ce32c7878d92a9058c052ebe7b35f97f23569e by mtrofin
[NFC] Move ImportedFunctionsInliningStatistics to Analysis

This is related to D94982. We want to call these APIs from the Analysis
component, so we can't leave them under Transforms.

Differential Revision: https://reviews.llvm.org/D95079
The file was addedllvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp
The file was removedllvm/include/llvm/Transforms/Utils/ImportedFunctionsInliningStatistics.h
The file was addedllvm/include/llvm/Analysis/Utils/ImportedFunctionsInliningStatistics.h
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
The file was removedllvm/lib/Transforms/Utils/ImportedFunctionsInliningStatistics.cpp
The file was modifiedllvm/lib/Analysis/CMakeLists.txt
The file was modifiedllvm/lib/Transforms/Utils/CMakeLists.txt
The file was modifiedllvm/include/llvm/Transforms/IPO/Inliner.h
Commit 36b05d2e9f553eab37c8646a4db3bdadb4279d38 by llvmgnsyncbot
[gn build] Port 95ce32c7878d
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
Commit a2223b09b10a4cc87b5e9c4a36ab9401c46610f6 by ezhulenev
[mlir:async] Fix data races in AsyncRuntime

Resumed coroutine potentially can deallocate the token/value/group and destroy the mutex before the std::unique_ptr destructor.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D95037
The file was modifiedmlir/lib/ExecutionEngine/AsyncRuntime.cpp
Commit ccec2cf1d9d7e991ef5a2ff2b02d466ebe6cd7a5 by mtrofin
Reland "[NPM][Inliner] Factor ImportedFunctionStats in the InlineAdvisor"

This reverts commit d97f776be5f8cd3cd446fe73827cd355f6bab4e1.

The original problem was due to build failures in shared lib builds. D95079
moved ImportedFunctionsInliningStatistics under Analysis, unblocking
this.
The file was modifiedllvm/include/llvm/Analysis/ReplayInlineAdvisor.h
The file was modifiedllvm/include/llvm/Analysis/InlineAdvisor.h
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was modifiedllvm/lib/Analysis/ImportedFunctionsInliningStatistics.cpp
The file was modifiedllvm/lib/Analysis/MLInlineAdvisor.cpp
The file was modifiedllvm/lib/Analysis/ReplayInlineAdvisor.cpp
The file was modifiedllvm/include/llvm/Analysis/Utils/ImportedFunctionsInliningStatistics.h
The file was modifiedllvm/include/llvm/Transforms/IPO/Inliner.h
The file was modifiedllvm/lib/Analysis/InlineAdvisor.cpp
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
The file was modifiedllvm/include/llvm/Analysis/MLInlineAdvisor.h
The file was modifiedllvm/test/Transforms/Inline/inline_stats.ll
Commit 7b5d7c7b0a2479de007ad18b947459b799991667 by michael.hliao
[hip] Fix `<complex>` compilation on Windows with VS2019.

Differential Revision: https://reviews.llvm.org/D95075
The file was modifiedclang/lib/Headers/__clang_hip_cmath.h
Commit 079967cdf9e48c9fc000f480eaa7b11710d85529 by Tony.Tye
[NFC][AMDGPU] Document target ID syntax for code object V2 to V3

Differential Revision: https://reviews.llvm.org/D95018
The file was modifiedllvm/docs/AMDGPUUsage.rst
Commit 555a395f2ccd531159538668fa36c7dc63ecff60 by nicolas.vasilache
[mlir] NFC - Fix unused variable in non-debug mode
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
Commit 6afdf13ae4ccf00296065960a0b311c87e6f8dd5 by i
Makefile.rules: Avoid redundant .d generation (make restart) and inline archive rule to the only test

Take an example when `CXX_SOURCES` is main.cpp.

main.d is an included file. make will rebuild main.d, re-executes itself [1] to read
in the new main.d file, then rebuild main.o, finally link main.o into a.out.
main.cpp is parsed twice in this process.

This patch merges .d generation into .o generation [2], writes explicit rules
for .c/.m and deletes suffix rules for %.m and %.o. Since a target can be
satisfied by either of .c/.cpp/.m/.mm, we use multiple pattern rules. The
rule with the prerequisite (with VPATH considered) satisfied is used [3].

Since suffix rules are disabled, the implicit rule for archive member targets is
no long available [4]. Rewrite, simplify the archive rule and inline it into the
only test `test/API/functionalities/archives/Makefile`.

[1]: https://www.gnu.org/software/make/manual/html_node/Remaking-Makefiles.html
[2]: http://make.mad-scientist.net/papers/advanced-auto-dependency-generation/
[3]: https://www.gnu.org/software/make/manual/html_node/Pattern-Match.html
[4]: https://www.gnu.org/software/make/manual/html_node/Archive-Update.html

ObjC/ObjCXX tests only run on macOS. I don't have testing environment.  Hope
someone can do it for me.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D94890
The file was modifiedlldb/test/API/functionalities/archives/Makefile
The file was modifiedlldb/packages/Python/lldbsuite/test/make/Makefile.rules
Commit 045d84f4e6d7d6bbccaa6d965669a068fc329809 by david.green
D94954: Fixes Snapdragon Kryo CPU core detection

All of these families were claiming to be a73 based, which was causing
-mcpu/mtune=native to never use the newer features available to these
cores.

Goes through each and bumps the individual cores to their respective Big
counterparts. Since this code path doesn't support big.little detection,
there was already a precedent set with the Qualcomm line to choose the
big cores only.

Adds a comment on each line for the product's name that the part number
refers to. Confirmed on-device and through Linux header naming
convections.

Additionally newer SoCs mix CPU implementer parts from multiple
implementers. Both 0x41 (ARM) and 0x51 (Qualcomm) in the Snapdragon case

This was causing a desync in information where the scan at the start to
find the implementer would mismatch the part scan later on.
Now scan for both implementer and part at the start so these stay in
sync.

Differential Revision: https://reviews.llvm.org/D94954
The file was modifiedllvm/unittests/Support/Host.cpp
The file was modifiedllvm/lib/Support/Host.cpp
Commit 5959c28f24856f3d4a1db6b4743c66bdc6dcd735 by ajcbik
[mlir][sparse] add asserts on reading in tensor data

Rationale:
Since I made the argument that metadata helps with extra
verification checks, I better actually do that ;-)

Reviewed By: penpornk

Differential Revision: https://reviews.llvm.org/D95072
The file was modifiedmlir/lib/ExecutionEngine/SparseUtils.cpp
Commit 735a07f0478566f6f7c60a8a98eb8884db574113 by diego.caballero
Revert "[mlir][Affine] Add support for multi-store producer fusion"

This reverts commit 7dd198852b4db52ae22242dfeda4eccda83aa8b2.

ASAN issue.
The file was modifiedmlir/include/mlir/Transforms/LoopFusionUtils.h
The file was modifiedmlir/lib/Transforms/Utils/LoopFusionUtils.cpp
The file was modifiedmlir/include/mlir/Transforms/Passes.td
The file was modifiedmlir/include/mlir/Analysis/AffineStructures.h
The file was modifiedmlir/test/Transforms/loop-fusion.mlir
The file was modifiedmlir/lib/Transforms/LoopFusion.cpp
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was modifiedmlir/lib/Analysis/Utils.cpp
The file was modifiedmlir/include/mlir/Analysis/Utils.h
Commit 0f8386c4f6aa804fe43814fcb3ae29d271da82d7 by craig.topper
[RISCV] Add addu.w and slliu.w test that uses getelementptr with zero extended indices.

This is closer to the kind of code that these intrinsics are
targeted at. Note we fail to match slliu.w here because our pattern
looks for (and (shl X, C1), 0xffffffff << C1) rather than
(shl (and X, 0xffffffff), C1). I'll fix this in a follow up
commit.
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbb.ll
Commit e996f1d4194bccf1c8ca984d695b848c0093bc23 by craig.topper
[RISCV] Add another isel pattern for slliu.w.

Previously we only matched (and (shl X, C1), 0xffffffff << C1)
which matches the InstCombine canonicalization order. But its
possible to see (shl (and X, 0xffffffff), C1) if the pattern
is introduced in SelectionDAG. For example, through expansion of
a GEP.
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbb.ll
Commit bb3f169b59e1c8bd7fd70097532220bbd11e9967 by Dávid Bolvanský
[BuildLibcalls, Attrs] Support more variants of C++'s new, add attributes for C++'s delete

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95095
The file was modifiedllvm/lib/Transforms/Utils/BuildLibCalls.cpp
The file was modifiedllvm/test/Transforms/InferFunctionAttrs/annotate.ll
Commit 1df0dbfcb5c0b90299fe5b74caf42e4cacce16fc by michaelrj
[libc][NFC] add "LlvmLibc" as a prefix to all test names

Summary:
Having a consistent prefix makes selecting all of the llvm libc tests
easier on any platform that is also using the gtest framework.
This also modifies the TEST and TEST_F macros to enforce this change
moving forward.

Reviewers: sivachandra

Subscribers:
The file was modifiedlibc/test/src/string/memcpy_test.cpp
The file was modifiedlibc/test/src/fenv/exception_status_test.cpp
The file was modifiedlibc/test/src/math/roundf_test.cpp
The file was modifiedlibc/test/src/ctype/islower_test.cpp
The file was modifiedlibc/test/src/ctype/isprint_test.cpp
The file was modifiedlibc/test/src/string/strlen_test.cpp
The file was modifiedlibc/test/src/math/hypot_test.cpp
The file was modifiedlibc/test/src/string/strcat_test.cpp
The file was modifiedlibc/test/src/math/floor_test.cpp
The file was modifiedlibc/test/src/math/hypotf_test.cpp
The file was modifiedlibc/test/src/string/strcmp_test.cpp
The file was modifiedlibc/test/src/math/copysignl_test.cpp
The file was modifiedlibc/test/src/string/memrchr_test.cpp
The file was modifiedlibc/test/src/math/fmax_test.cpp
The file was modifiedlibc/test/src/ctype/isascii_test.cpp
The file was modifiedlibc/test/src/ctype/iscntrl_test.cpp
The file was modifiedlibc/test/src/fenv/enabled_exceptions_test.cpp
The file was modifiedlibc/test/src/math/fdimf_test.cpp
The file was modifiedlibc/test/src/math/modf_test.cpp
The file was modifiedlibc/test/src/stdio/fwrite_test.cpp
The file was modifiedlibc/test/utils/CPP/bitset_test.cpp
The file was modifiedlibc/test/src/math/LdExpTest.h
The file was modifiedlibc/test/src/math/fdiml_test.cpp
The file was modifiedlibc/test/src/ctype/isspace_test.cpp
The file was modifiedlibc/test/src/math/trunc_test.cpp
The file was modifiedlibc/test/src/sys/mman/linux/mmap_test.cpp
The file was modifiedlibc/test/src/math/floorf_test.cpp
The file was modifiedlibc/test/src/math/truncf_test.cpp
The file was modifiedlibc/test/src/errno/errno_test.cpp
The file was modifiedlibc/test/src/ctype/isdigit_test.cpp
The file was modifiedlibc/test/src/string/memmove_test.cpp
The file was modifiedlibc/test/src/math/ilogb_test.cpp
The file was modifiedlibc/test/src/math/fdim_test.cpp
The file was modifiedlibc/test/src/string/memory_utils/memcpy_utils_test.cpp
The file was modifiedlibc/test/src/fenv/rounding_mode_test.cpp
The file was modifiedlibc/utils/UnitTest/LibcTest.h
The file was modifiedlibc/test/src/signal/raise_test.cpp
The file was modifiedlibc/test/src/math/fminf_test.cpp
The file was modifiedlibc/test/src/ctype/isalpha_test.cpp
The file was modifiedlibc/test/src/math/FDimTest.h
The file was modifiedlibc/test/src/math/sinf_test.cpp
The file was modifiedlibc/test/src/math/modfl_test.cpp
The file was modifiedlibc/test/src/math/ilogbf_test.cpp
The file was modifiedlibc/test/src/string/strnlen_test.cpp
The file was modifiedlibc/test/src/signal/signal_test.cpp
The file was modifiedlibc/test/src/math/round_test.cpp
The file was modifiedlibc/test/src/math/ilogbl_test.cpp
The file was modifiedlibc/test/src/ctype/isxdigit_test.cpp
The file was modifiedlibc/test/src/math/ceill_test.cpp
The file was modifiedlibc/test/src/ctype/isalnum_test.cpp
The file was modifiedlibc/test/src/ctype/tolower_test.cpp
The file was modifiedlibc/test/src/stdlib/llabs_test.cpp
The file was modifiedlibc/test/src/string/strrchr_test.cpp
The file was modifiedlibc/test/src/threads/thrd_test.cpp
The file was modifiedlibc/test/src/math/fabs_test.cpp
The file was modifiedlibc/test/src/ctype/isgraph_test.cpp
The file was modifiedlibc/test/src/signal/sigprocmask_test.cpp
The file was modifiedlibc/test/src/stdlib/_Exit_test.cpp
The file was modifiedlibc/test/src/string/strspn_test.cpp
The file was modifiedlibc/test/src/string/bzero_test.cpp
The file was modifiedlibc/test/src/string/strcspn_test.cpp
The file was modifiedlibc/test/src/string/strchr_test.cpp
The file was modifiedlibc/test/src/time/mktime_test.cpp
The file was modifiedlibc/test/src/string/strncpy_test.cpp
The file was modifiedlibc/test/src/math/roundl_test.cpp
The file was modifiedlibc/test/src/signal/sigaction_test.cpp
The file was modifiedlibc/test/src/stdlib/labs_test.cpp
The file was modifiedlibc/test/src/unistd/write_test.cpp
The file was modifiedlibc/test/src/math/fmin_test.cpp
The file was modifiedlibc/test/src/math/ILogbTest.h
The file was modifiedlibc/test/src/math/copysign_test.cpp
The file was modifiedlibc/test/src/math/fabsl_test.cpp
The file was modifiedlibc/test/src/ctype/toascii_test.cpp
The file was modifiedlibc/test/src/math/logbf_test.cpp
The file was modifiedlibc/test/src/math/fmaf_test.cpp
The file was modifiedlibc/test/src/ctype/ispunct_test.cpp
The file was modifiedlibc/test/src/signal/sigfillset_test.cpp
The file was modifiedlibc/test/src/math/floorl_test.cpp
The file was modifiedlibc/test/config/linux/x86_64/syscall_test.cpp
The file was modifiedlibc/test/src/math/cosf_test.cpp
The file was modifiedlibc/test/src/math/fabsf_test.cpp
The file was modifiedlibc/test/src/ctype/toupper_test.cpp
The file was modifiedlibc/test/src/string/memory_utils/utils_test.cpp
The file was modifiedlibc/test/src/math/sqrtf_test.cpp
The file was modifiedlibc/test/src/stdlib/abort_test.cpp
The file was modifiedlibc/test/src/math/copysignf_test.cpp
The file was modifiedlibc/test/src/math/NextAfterTest.h
The file was modifiedlibc/test/src/signal/sigdelset_test.cpp
The file was modifiedlibc/test/src/math/frexpl_test.cpp
The file was modifiedlibc/test/src/ctype/isblank_test.cpp
The file was modifiedlibc/test/src/math/expf_test.cpp
The file was modifiedlibc/test/src/math/modff_test.cpp
The file was modifiedlibc/test/src/math/sqrtl_test.cpp
The file was modifiedlibc/test/src/math/fmaxl_test.cpp
The file was modifiedlibc/test/src/stdlib/abs_test.cpp
The file was modifiedlibc/test/src/string/strcpy_test.cpp
The file was modifiedlibc/test/src/math/fminl_test.cpp
The file was modifiedlibc/test/src/math/ceil_test.cpp
The file was modifiedlibc/test/src/threads/call_once_test.cpp
The file was modifiedlibc/test/src/string/strstr_test.cpp
The file was modifiedlibc/test/src/threads/mtx_test.cpp
The file was modifiedlibc/test/src/math/exp2f_test.cpp
The file was modifiedlibc/test/src/math/sqrt_test.cpp
The file was modifiedlibc/test/src/string/strtok_test.cpp
The file was modifiedlibc/test/src/string/strtok_r_test.cpp
The file was modifiedlibc/test/utils/tools/WrapperGen/wrappergen_test.cpp
The file was modifiedlibc/test/src/assert/assert_test.cpp
The file was modifiedlibc/test/src/string/memset_test.cpp
The file was modifiedlibc/test/src/signal/sigaddset_test.cpp
The file was modifiedlibc/test/src/string/memchr_test.cpp
The file was modifiedlibc/test/src/string/memcmp_test.cpp
The file was modifiedlibc/test/src/ctype/isupper_test.cpp
The file was modifiedlibc/test/src/math/fmaxf_test.cpp
The file was modifiedlibc/test/src/math/logbl_test.cpp
The file was modifiedlibc/test/src/math/frexp_test.cpp
The file was modifiedlibc/test/src/math/frexpf_test.cpp
The file was modifiedlibc/test/src/string/strpbrk_test.cpp
The file was modifiedlibc/test/src/math/sincosf_test.cpp
The file was modifiedlibc/test/src/math/ceilf_test.cpp
The file was modifiedlibc/test/src/math/logb_test.cpp
The file was modifiedlibc/test/src/math/truncl_test.cpp
Commit 689de5841c1c4c9b0fe711b61d26f7425cf99423 by michaelrj
[libc][NFC][obvious] fix the names of MPFR tests

I missed the MPFR tests in my previous commit. They have now been fixed
to not fail the prefix check in the test macro.
The file was modifiedlibc/test/src/math/RIntTest.h
The file was modifiedlibc/test/src/math/hypotf_test.cpp
The file was modifiedlibc/test/src/math/fmaf_test.cpp
The file was modifiedlibc/test/src/math/RemQuoTest.h
The file was modifiedlibc/test/src/math/RoundToIntegerTest.h
The file was modifiedlibc/test/src/math/hypot_test.cpp
Commit 87a89549c4b14a5e19097484562dd359b77a8770 by varun_gandhi
[NFC] Minor cleanup for ValueHandle code.

Based on feedback in https://reviews.llvm.org/D93433.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D94238
The file was modifiedllvm/include/llvm/IR/ValueHandle.h
Commit 6ccf2d62b4876c88427ae97d0cd3c9ed4330560a by riddleriver
[mlir] Add an interface for Cast-Like operations

A cast-like operation is one that converts from a set of input types to a set of output types. The arity of the inputs may be from 0-N, whereas the arity of the outputs may be anything from 1-N. Cast-like operations are removable in cases where they produce a "no-op", i.e when the input types and output types match 1-1.

Differential Revision: https://reviews.llvm.org/D94831
The file was modifiedmlir/examples/toy/Ch7/mlir/Dialect.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/ToyCombine.cpp
The file was modifiedmlir/lib/Dialect/Tensor/IR/CMakeLists.txt
The file was modifiedmlir/examples/toy/Ch6/mlir/ToyCombine.cpp
The file was modifiedmlir/examples/toy/Ch6/include/toy/Ops.td
The file was modifiedmlir/examples/toy/Ch4/include/toy/Ops.td
The file was modifiedmlir/examples/toy/Ch5/mlir/ToyCombine.cpp
The file was modifiedmlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/include/mlir/IR/Diagnostics.h
The file was modifiedmlir/examples/toy/Ch7/include/toy/Ops.td
The file was addedmlir/include/mlir/Interfaces/CastInterfaces.h
The file was modifiedmlir/examples/toy/Ch7/CMakeLists.txt
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.h
The file was modifiedmlir/examples/toy/Ch4/CMakeLists.txt
The file was modifiedmlir/docs/Tutorials/Toy/Ch-4.md
The file was modifiedmlir/examples/toy/Ch6/CMakeLists.txt
The file was modifiedmlir/lib/IR/Operation.cpp
The file was modifiedmlir/lib/Dialect/Tensor/IR/TensorOps.cpp
The file was modifiedmlir/examples/toy/Ch6/include/toy/Dialect.h
The file was modifiedmlir/examples/toy/Ch4/include/toy/Dialect.h
The file was modifiedmlir/examples/toy/Ch4/mlir/ToyCombine.cpp
The file was addedmlir/include/mlir/Interfaces/CastInterfaces.td
The file was modifiedmlir/include/mlir/Interfaces/CMakeLists.txt
The file was modifiedmlir/examples/toy/Ch4/mlir/Dialect.cpp
The file was modifiedmlir/examples/toy/Ch6/mlir/Dialect.cpp
The file was modifiedmlir/lib/Interfaces/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Shape/IR/CMakeLists.txt
The file was modifiedmlir/examples/toy/Ch5/CMakeLists.txt
The file was modifiedmlir/examples/toy/Ch5/include/toy/Ops.td
The file was addedmlir/lib/Interfaces/CastInterfaces.cpp
The file was modifiedmlir/examples/toy/Ch5/include/toy/Dialect.h
The file was modifiedmlir/lib/Dialect/StandardOps/CMakeLists.txt
The file was modifiedmlir/examples/toy/Ch5/mlir/Dialect.cpp
The file was modifiedmlir/include/mlir/Dialect/Tensor/IR/Tensor.h
The file was modifiedmlir/examples/toy/Ch7/include/toy/Dialect.h
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
Commit c78219f644c7a6e352cd416f8ebb4374b745967e by riddleriver
[mlir] Add a new builtin `unrealized_conversion_cast` operation

An `unrealized_conversion_cast` operation represents an unrealized conversion
from one set of types to another, that is used to enable the inter-mixing of
different type systems. This operation should not be attributed any special
representational or execution semantics, and is generally only intended to be
used to satisfy the temporary intermixing of type systems during the conversion
of one type system to another.

This operation was discussed in the following RFC(and ODM):

https://llvm.discourse.group/t/open-meeting-1-14-dialect-conversion-and-type-conversion-the-question-of-cast-operations/

Differential Revision: https://reviews.llvm.org/D94832
The file was modifiedmlir/lib/IR/BuiltinDialect.cpp
The file was addedmlir/test/Dialect/Builtin/ops.mlir
The file was addedmlir/test/Dialect/Builtin/invalid.mlir
The file was addedmlir/test/Dialect/Builtin/canonicalize.mlir
The file was modifiedmlir/lib/IR/CMakeLists.txt
The file was modifiedmlir/include/mlir/IR/BuiltinOps.td
The file was modifiedmlir/include/mlir/IR/BuiltinOps.h
Commit 8a7ff7301a6ce50f2adf52959c04f37a00c5a631 by joker.eph
[mlir] Make MLIRContext::getOrLoadDialect(StringRef, TypeID, ...) public

Having this function in a public scope is helpful to register dialects that are
defined at runtime, and thus that need a runtime-defined TypeID.

Also, a similar function in DialectRegistry, insert(TypeID, StringRef, ...), has
a public scope.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D95091
The file was modifiedmlir/include/mlir/IR/MLIRContext.h
Commit 825c2b4a41c7df935dc12fdfab9879b98c744e1e by riddleriver
[mlir][OpFormatGen] Fix incorrect kind used for RegionsDirective

I attempted to write a test case for this, but the situations in which the kind is used for RegionDirective and ResultsDirective have zero overlap; meaning that there isn't a situation in which sharing the kind creates a conflict.

Differential Revision: https://reviews.llvm.org/D94988
The file was modifiedmlir/tools/mlir-tblgen/OpFormatGen.cpp
Commit 96296d9220ee5193f6ad7ff181d42c10d9f3c7e3 by carrot
[DAGCombiner] Precommit test case for D95086

This is the test case for D95086 with worse result.

Differential Revision: https://reviews.llvm.org/D95103
The file was addedllvm/test/CodeGen/X86/select-ext.ll
Commit 3809e5dac965e7c25f3c286884a7af6e48946865 by tianshilei1992
[Clang][OpenMP] Use `clang_cc1` test for `declare_target_device_only_compilation.cpp`

Use `clang_cc1` test for `declare_target_device_only_compilation.cpp`

Reviewed By: echristo

Differential Revision: https://reviews.llvm.org/D95089
The file was modifiedclang/test/OpenMP/declare_target_device_only_compilation.cpp
Commit 34e8fcf63f823ebc5a36166c12c01c3a49deea0b by jezng
[lld-macho] Add dependency on ObjCARC to fix shared build
The file was modifiedlld/MachO/CMakeLists.txt
Commit bff389120fa2368d123612449c938958cfd7f45e by jingham
Fix a bug with setting breakpoints on C++11 inline initialization statements.

If they occurred before the constructor that used them, we would refuse to
set the breakpoint because we thought they were crossing function boundaries.

Differential Revision: https://reviews.llvm.org/D94846
The file was addedlldb/test/API/lang/cpp/break-on-initializers/main.cpp
The file was modifiedlldb/source/Breakpoint/BreakpointResolverFileLine.cpp
The file was addedlldb/test/API/lang/cpp/break-on-initializers/TestBreakOnCPP11Initializers.py
The file was addedlldb/test/API/lang/cpp/break-on-initializers/Makefile
Commit f86db34defc323135106dc12e9fa888003cdcbd7 by jianzhouzh
[MSan] Move origins for overlapped memory transfer

Reviewed-by: eugenis

Differential Revision: https://reviews.llvm.org/D94572
The file was modifiedcompiler-rt/lib/msan/msan_poisoning.cpp
The file was addedcompiler-rt/test/msan/chained_origin_memmove.cpp
Commit 98feb08e449f179c3c5ccc6878c31cf16c160b06 by jingham
Use CXX_SOURCES and point to the right source file.

Copy paste error, but the test still built on macOS.  Weird.
It failed on debian linux with an error about -fno-limit-debug-info
not being a supported flag???  Not sure how this goof would cause
that error, but let's see if it did...
The file was modifiedlldb/test/API/lang/cpp/break-on-initializers/Makefile
Commit f354b87df23799ee0b6c718894140c846eafc82d by Jonas Devlieghere
[dsymutil] Compare object modification times using second precision

The modification time in the debug map is expressed using second
precision, while the modification time returned by the filesystem could
be more precise. Avoid spurious warnings about timestamp mismatches by
truncating the modification time reported by the system to seconds.
The file was modifiedllvm/tools/dsymutil/BinaryHolder.cpp
Commit 6cab3f88ee4dbc59c8c5abb70490fea3f3f6d46c by craig.topper
[RISCV] Use update_llc_test_checks.py to regenerate check lines in vleff-rv32.ll and vleff-rv64.ll.

This should minimize change in a future patch.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
Commit baf6c2987e576e319857c586120e98e917d8b47f by Jonas Devlieghere
[lldb] Upstream eCore_arm_arm64e enum value in ArchSpec

Upstream the eCore_arm_arm64e enum value in ArchSpec. All the other
arm64e triple changes already landed in LLVM.

Differential revision: https://reviews.llvm.org/D95110
The file was modifiedlldb/include/lldb/Utility/ArchSpec.h
The file was modifiedlldb/source/Utility/ArchSpec.cpp
Commit 47228f785460cdd8f642c42876d394198d6b90c3 by kai.wang
[RISCV] Implement vsseg intrinsics.

Define vsseg intrinsics and pseudo instructions. Lower vsseg intrinsics
to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94688
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll
Commit e5e329023bb119631e7a756b47598cb0ce9cea5f by kai.wang
[RISCV] Implement vlsseg intrinsics.

Define vlsseg intrinsics and pseudo instructions. Lower vlsseg intrinsics
to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94763
The file was addedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Commit a8b96eadfd93f1641c72c378e33af636f463ab02 by kai.wang
[RISCV] Implement vssseg intrinsics.

Define vlsseg intrinsics and pseudo instructions. Lower vlsseg
intrinsics to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94863
The file was addedllvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
Commit d6bb96e677759375b2bea00115918b2cb6552f5b by mkazantsev
[X86] Add experimental option to separately tune alignment of innermost loops

We already have an experimental option to tune loop alignment. Its impact
is very wide (and there is a suspicion that it's not always profitable). We want
to have something more narrow to play with. This patch adds similar option that
overrides preferred alignment for innermost loops. This is for experimental
purposes, default values do not change the existing behavior.

Differential Revision: https://reviews.llvm.org/D94895
Reviewed By: pengfei
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.h
The file was addedllvm/test/CodeGen/X86/innermost-loop-alignment.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 8f5da41c4d1f4468e39e97996421083542cb5915 by kazu
[llvm] Construct SmallVector with iterator ranges (NFC)
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
The file was modifiedllvm/lib/Transforms/Utils/CodeExtractor.cpp
The file was modifiedllvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/lib/Transforms/Scalar/NaryReassociate.cpp
The file was modifiedllvm/lib/Transforms/Utils/CallPromotionUtils.cpp
The file was modifiedllvm/lib/Transforms/Utils/GuardUtils.cpp
Commit e53472de688627c749330398063b9b7f7c8b6066 by kazu
[Transforms] Use llvm::append_range (NFC)
The file was modifiedllvm/lib/Transforms/Scalar/GVN.cpp
The file was modifiedllvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
The file was modifiedllvm/lib/Transforms/Utils/CloneFunction.cpp
The file was modifiedllvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
The file was modifiedllvm/lib/Transforms/Scalar/GVNSink.cpp
The file was modifiedllvm/lib/Transforms/Utils/FixIrreducible.cpp
The file was modifiedllvm/lib/Transforms/IPO/GlobalOpt.cpp
The file was modifiedllvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
The file was modifiedllvm/lib/Transforms/Utils/SSAUpdater.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopSimplify.cpp
Commit 6de4865545da73687dd6d28d153cd345ed5e7918 by kazu
[llvm] Use hasSingleElement (NFC)
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFUnit.cpp
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAGNodes.h
The file was modifiedllvm/include/llvm/CodeGen/MachineRegisterInfo.h
The file was modifiedllvm/include/llvm/IR/Value.h
The file was modifiedllvm/lib/CodeGen/MachineRegisterInfo.cpp
Commit dd8ae42674b494e46ec40a22f40068db2b4a8b60 by Madhur.Amilkanthwar
[IndirectFunctions] Skip propagating attributes to address taken functions

In case of indirect calls or address taken functions,
skip propagating any attributes to them. We just
propagate features to such functions.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D94585
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPropagateAttributes.cpp
The file was addedllvm/test/CodeGen/AMDGPU/propagate-attributes-common-callees.ll
The file was addedllvm/test/CodeGen/AMDGPU/propagate-attributes-indirect.ll
The file was addedllvm/test/CodeGen/AMDGPU/propagate-attributes-direct-indirect-common-callee.ll
The file was addedllvm/test/CodeGen/AMDGPU/propagate-attributes-direct-indirect.ll
Commit 51f4958057d6c246e85c3fbc65353bc0d7c1049b by grimar
[yaml2obj/obj2yaml] - Improve dumping/creating of ELF versioning sections.

This makes the following improvements.

For `SHT_GNU_versym`:
* yaml2obj: set `sh_link` to index of `.dynsym` section automatically.
For `SHT_GNU_verdef`:
* yaml2obj: set `sh_link` to index of `.dynstr` section automatically.
* yaml2obj: set `sh_info` field automatically.
* obj2yaml: don't dump the `Info` field when its value matches the number of version definitions.
For `SHT_GNU_verneed`:
* yaml2obj: set `sh_link` to index of `.dynstr` section automatically.
* yaml2obj: set `sh_info` field automatically.
* obj2yaml: don't dump the `Info` field when its value matches the number of version dependencies.

Also, simplifies few test cases.

Differential revision: https://reviews.llvm.org/D94956
The file was modifiedllvm/test/tools/yaml2obj/ELF/verdef-section.yaml
The file was modifiedllvm/test/tools/llvm-readobj/ELF/verneed-invalid.test
The file was modifiedllvm/test/tools/obj2yaml/ELF/verneed-section.yaml
The file was modifiedllvm/test/tools/llvm-objdump/ELF/verdef.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/section-types.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/verdef-invalid.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dyn-symbols.test
The file was modifiedllvm/include/llvm/ObjectYAML/ELFYAML.h
The file was modifiedllvm/test/tools/llvm-objdump/ELF/verneed.test
The file was modifiedllvm/test/tools/obj2yaml/ELF/verdef-section.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/versym-section.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/override-shoffset.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/override-shsize.yaml
The file was modifiedllvm/test/tools/llvm-readobj/ELF/merged.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/reloc-symbol-with-versioning.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/all.test
The file was modifiedllvm/test/tools/yaml2obj/ELF/override-shname.yaml
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/test/tools/llvm-readobj/ELF/versioninfo.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/versym-invalid.test
The file was modifiedllvm/test/tools/yaml2obj/ELF/override-shtype.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/verneed-section.yaml
The file was modifiedllvm/test/tools/llvm-readobj/ELF/hidden-versym.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/verneed-flags.yaml
The file was modifiedllvm/test/Object/invalid.test
The file was modifiedllvm/tools/obj2yaml/elf2yaml.cpp
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedlld/test/ELF/invalid/verneed-shared.test
Commit 20013d02f3352a88d0838eed349abc9a2b0e9cc0 by yuanke.luo
[X86][AMX] Fix tile config register spill issue.

Previous code build the model that tile config register is the user of
each AMX instruction. There is a problem for the tile config register
spill. When across function, the ldtilecfg instruction may be inserted
on each AMX instruction which use tile config register. This cause all
tile data register clobber.
To fix this issue, we remove the model of tile config register. We
analyze the regmask of call instruction and insert ldtilecfg if there is
any tile data register live across the call. Inserting the sttilecfg
before the call is unneccessary, because the tile config doesn't change
and we can just reload the config.
Besides we also need check tile config register interference. Since we
don't model the config register we should check interference from the
ldtilecfg to each tile data register def.
             ldtilecfg
             /       \
            BB1      BB2
            /         \
           call       BB3
           /           \
       %1=tileload   %2=tilezero
We can start from the instruction of each tile def, and backward to
ldtilecfg. If there is any call instruction, and tile data register is
not preserved, we should insert ldtilecfg after the call instruction.

Differential Revision: https://reviews.llvm.org/D94155
The file was modifiedllvm/lib/Target/X86/X86ExpandPseudo.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was addedllvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
The file was modifiedllvm/lib/Target/X86/X86RegisterInfo.td
The file was modifiedllvm/lib/Target/X86/X86TileConfig.cpp
The file was modifiedllvm/test/CodeGen/X86/opt-pipeline.ll
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-across-func.ll
The file was modifiedllvm/lib/Target/X86/X86InstrAMX.td
The file was modifiedllvm/lib/Target/X86/X86PreTileConfig.cpp
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-bf16-intrinsics.ll
The file was modifiedllvm/include/llvm/CodeGen/LiveIntervals.h
The file was modifiedllvm/lib/CodeGen/LiveIntervals.cpp
Commit dd5c98280473a7f74c5e5a715839e4938b46a69c by grimar
[llvm-nm][ELF] - Make -D display symbol versions.

This fixes https://bugs.llvm.org/show_bug.cgi?id=48670.

Since binutils 2.35, nm -D displays symbol versions by default.
This patch teaches llvm-nm to do the same.

Differential revision: https://reviews.llvm.org/D94907
The file was modifiedllvm/tools/llvm-nm/llvm-nm.cpp
The file was modifiedllvm/test/tools/llvm-nm/dynamic.test
Commit 71635ea5ffd62a7de91c759c0dfb7bb40c16fd94 by i
MCDwarf: Delete uneeded parameter

And change signature
The file was modifiedllvm/lib/MC/MCAssembler.cpp
The file was modifiedllvm/lib/MC/MCDwarf.cpp
The file was modifiedllvm/include/llvm/MC/MCDwarf.h
Commit fc58bfd02f8d27e610500db53b268157cce0637b by pifon
[mlir] Remove complex ops from Standard dialect.

`complex` dialect should be used instead.
https://llvm.discourse.group/t/rfc-split-the-complex-dialect-from-std/2496/2

Differential Revision: https://reviews.llvm.org/D95077
The file was modifiedmlir/include/mlir/Dialect/StandardOps/EDSC/Intrinsics.h
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/test/IR/invalid-ops.mlir
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/test/IR/core-ops.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir
Commit bee486851c1a72899bd3c0f9b38249bbe5c38951 by flo
[LoopUnswitch] Implement first version of partial unswitching.

This patch applies the idea from D93734 to LoopUnswitch.

It adds support for unswitching on conditions that are only
invariant along certain paths through a loop.

In particular, it targets conditions in the loop header that
depend on values loaded from memory. If either path from
the true or false successor through the loop does not modify
memory, perform partial loop unswitching.

That is, duplicate the instructions feeding the condition in the pre-header.
Then unswitch on the duplicated condition. The condition is now known
in the unswitched version for the 'invariant' path through the original loop.

On caveat of this approach is that one of the loops created can be partially
unswitched again. To avoid this behavior, `llvm.loop.unswitch.partial.disable`
metadata is added to the unswitched loops, to avoid subsequent partial
unswitching.

If that's the approach to go, I can move the code handling the metadata kind
into separate functions.

This increases the cases we unswitch quite a bit in SPEC2006/SPEC2000 &
MultiSource. It also allows us to eliminate a dead loop in SPEC2017's omnetpp

```
Tests: 236
Same hash: 170 (filtered out)
Remaining: 66
Metric: loop-unswitch.NumBranches

Program                                        base   patch  diff
test-suite...000/255.vortex/255.vortex.test     2.00  23.00 1050.0%
test-suite...T2006/401.bzip2/401.bzip2.test     7.00  55.00 685.7%
test-suite :: External/Nurbs/nurbs.test         5.00  26.00 420.0%
test-suite...s-C/unix-smail/unix-smail.test     1.00   3.00 200.0%
test-suite.../Prolangs-C++/ocean/ocean.test     1.00   3.00 200.0%
test-suite...tions/lambda-0.1.3/lambda.test     1.00   3.00 200.0%
test-suite...yApps-C++/PENNANT/PENNANT.test     2.00   5.00 150.0%
test-suite...marks/Ptrdist/yacr2/yacr2.test     1.00   2.00 100.0%
test-suite...lications/viterbi/viterbi.test     1.00   2.00 100.0%
test-suite...plications/d/make_dparser.test    12.00  24.00 100.0%
test-suite...CFP2006/433.milc/433.milc.test    14.00  27.00 92.9%
test-suite.../Applications/lemon/lemon.test     7.00  12.00 71.4%
test-suite...ce/Applications/Burg/burg.test     6.00  10.00 66.7%
test-suite...T2006/473.astar/473.astar.test    16.00  26.00 62.5%
test-suite...marks/7zip/7zip-benchmark.test    78.00 121.00 55.1%
```

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D93764
The file was modifiedllvm/test/Transforms/LoopUnswitch/partial-unswitch.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnswitch.cpp
The file was addedllvm/test/Transforms/LoopUnswitch/partial-unswitch-mssa-threshold.ll
Commit facea4a2d4fa543da2241fb4268c34e9c019fca6 by hokein.wu
[clangd] Fix a missing override keyword, NFC.
The file was modifiedclang-tools-extra/clangd/index/remote/Client.cpp
Commit 64132f541edd82bffebbd5521e620219743a42eb by yuanke.luo
Revert "[X86][AMX] Fix tile config register spill issue."

This reverts commit 20013d02f3352a88d0838eed349abc9a2b0e9cc0.
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was removedllvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll
The file was modifiedllvm/lib/Target/X86/X86ExpandPseudo.cpp
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-across-func.ll
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86RegisterInfo.td
The file was modifiedllvm/test/CodeGen/X86/opt-pipeline.ll
The file was modifiedllvm/lib/Target/X86/X86InstrAMX.td
The file was modifiedllvm/include/llvm/CodeGen/LiveIntervals.h
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/X86/X86TileConfig.cpp
The file was modifiedllvm/lib/CodeGen/LiveIntervals.cpp
The file was modifiedllvm/lib/Target/X86/X86PreTileConfig.cpp
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-bf16-intrinsics.ll
Commit 86021d98d3f8b27f7956cee04f11505c2e836e81 by llvm-dev
[X86] Avoid a std::string copy by replacing auto with const auto&. NFC.

Fixes msvc analyzer warning.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit bc9ab9a5cd6bafc5e1293f3d5d51638f8f5cd26c by llvm-dev
[DAG] CombineToPreIndexedLoadStore - use const APInt& for getAPIntValue(). NFCI.

Cleanup some code to use auto* properly from cast, and use const APInt& for getAPIntValue() to avoid an unnecessary copy.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit ff41ae8b367769126c5d377eb712c7becfa2126f by adhemerval.zanella
MC: AArch64: Add support for gotpage_lo15

It is not used bt LLVM itself, but it would be used on lld tests
to implement R_AARCH64_LD64_GOTPAGE_LO15 support.
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
The file was modifiedllvm/test/MC/AArch64/arm64-elf-relocs.s
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
Commit 99b7b41edf4fbc2d6e52bc4524c956e8f69042d9 by Raphael Isemann
[lldb][import-std-module] Do some basic file checks before trying to import a module

Currently when LLDB has enough data in the debug information to import the `std` module,
it will just try to import it. However when debugging libraries where the sources aren't
available anymore, importing the module will generate a confusing diagnostic that
the module couldn't be built.

For the fallback mode (where we retry failed expressions with the loaded module), this
will cause the second expression to fail with a module built error instead of the
actual parsing issue in the user expression.

This patch adds checks that ensures that we at least have any source files in the found
include paths before we try to import the module. This prevents the module from being
loaded in the situation described above which means we don't emit the bogus 'can't
import module' diagnostic and also don't waste any time retrying the expression in the
fallback mode.

For the unit tests I did some refactoring as they now require a VFS with the files in it
and not just the paths. The Python test just builds a binary with a fake C++ module,
then deletes the module before debugging.

Fixes rdar://73264458

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D95096
The file was addedlldb/test/API/commands/expression/import-std-module/sysroot/root/usr/include/stdio.h
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/CppModuleConfiguration.cpp
The file was removedlldb/test/API/commands/expression/import-std-module/forward_decl_from_module/root/usr/include/libc_header.h
The file was modifiedlldb/test/API/commands/expression/import-std-module/sysroot/root/usr/include/c++/v1/algorithm
The file was addedlldb/test/API/commands/expression/import-std-module/missing-module-sources/root/usr/include/c++/v1/vector
The file was removedlldb/test/API/commands/expression/import-std-module/sysroot/root/usr/include/libc_header.h
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/CppModuleConfiguration.h
The file was addedlldb/test/API/commands/expression/import-std-module/missing-module-sources/root/usr/include/stdio.h
The file was addedlldb/test/API/commands/expression/import-std-module/sysroot/root/usr/include/c++/v1/vector
The file was addedlldb/test/API/commands/expression/import-std-module/empty-module/root/usr/include/c++/v1/vector
The file was addedlldb/test/API/commands/expression/import-std-module/missing-module-sources/main.cpp
The file was addedlldb/test/API/commands/expression/import-std-module/missing-module-sources/Makefile
The file was modifiedlldb/unittests/Expression/CppModuleConfigurationTest.cpp
The file was addedlldb/test/API/commands/expression/import-std-module/empty-module/root/usr/include/stdio.h
The file was addedlldb/test/API/commands/expression/import-std-module/missing-module-sources/root/usr/include/c++/v1/module.modulemap
The file was modifiedlldb/test/API/commands/expression/import-std-module/forward_decl_from_module/root/usr/include/c++/v1/vector
The file was removedlldb/test/API/commands/expression/import-std-module/empty-module/root/usr/include/libc_header.h
The file was addedlldb/test/API/commands/expression/import-std-module/forward_decl_from_module/root/usr/include/stdio.h
The file was addedlldb/test/API/commands/expression/import-std-module/missing-module-sources/TestStdModuleSourcesMissing.py
The file was modifiedlldb/test/API/commands/expression/import-std-module/empty-module/root/usr/include/c++/v1/algorithm
Commit 060b51e0524aed6b6cc452baa8eb6d663a580eee by Raphael Isemann
[lldb] Make TestBSDArchives a no-debug-info-test

The DSYM variant of this test is failing since D94890. But as we explicitly
try to disable the DSYM generation in the makefile and build the archive on
our own, I don't see why we even need to run the DSYM version of the test.

This patch disables the generated derived versions of this test for the
different debug information containers (which includes the failing DSYM one).
The file was modifiedlldb/test/API/functionalities/archives/TestBSDArchives.py
Commit ed2853d2c82d7286ba510c8f65049d6f649017f0 by Raphael Isemann
Reland [lldb] Fix TestThreadStepOut.py after "Flush local value map on every instruction"

The original patch got reverted as a dependency of cf1c774d6ace59c5adc9ab71b31e .
That patch got relanded so it's also necessary to reland this patch.

Original summary:

After cf1c774d6ace59c5adc9ab71b31e762c1be695b1, Clang seems to generate code
that is more similar to icc/Clang, so we can use the same line numbers for
all compilers in this test.
The file was modifiedlldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py
The file was modifiedlldb/test/API/functionalities/thread/step_out/main.cpp
Commit 935bacd3a7244f04b7f39818e3fc589529474d13 by llvm-dev
[DAG] SimplifyDemandedBits - correctly adjust truncated shift amount type

As noticed on D56387, for vectors we must always correctly adjust the shift amount type during truncation (not just after legalization). We were getting away with it as we currently only accepted scalars via the dyn_cast<ConstantSDNode>.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit 0ca81b90d19d395c4891b7507cec0f063dd26d22 by llvm-dev
[X86][SSE] Add uitofp(trunc(and(lshr(x,c)))) vector test

Reduced from regression reported by @hans on D56387
The file was modifiedllvm/test/CodeGen/X86/uint_to_fp-3.ll
Commit 294e2544c992de82c180c080f6359db8f02005d0 by frgossen
Add log1p lowering from standard to NVVM intrinsics

Differential Revision: https://reviews.llvm.org/D95130
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Commit 69bc0990a9181e6eb86228276d2f59435a7fae67 by llvm-dev
[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE (REAPPLIED).

Add DemandedElts support inside the TRUNCATE analysis.

REAPPLIED - this was reverted by @hans at rGa51226057fc3 due to an issue with vector shift amount types, which was fixed in rG935bacd3a724 and an additional test case added at rG0ca81b90d19d

Differential Revision: https://reviews.llvm.org/D56387
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/ARM/lowerMUL-newload.ll
The file was modifiedllvm/test/CodeGen/X86/min-legal-vector-width.ll
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
The file was modifiedllvm/test/CodeGen/AArch64/aarch64-smull.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/lowerMUL-newload.ll
The file was modifiedllvm/test/CodeGen/X86/combine-sra.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmulh.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc.ll
The file was modifiedllvm/test/CodeGen/X86/uint_to_fp-3.ll
Commit 4ef38f9c1255dcaa3f834cf376e55f8a7bdc5810 by frgossen
Add log1p lowering from standard to ROCDL intrinsics

Differential Revision: https://reviews.llvm.org/D95129
The file was modifiedmlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
The file was modifiedmlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
Commit 2b4716d6dff1c9a5e64b3487a0b2388e3ff18b30 by mikael.holmen
[MC] Use std::make_tuple to make some toolchains happy again

My toolchain (LLVM 8.0, libstdc++ 5.4.0) complained with:

12:27:43 ../lib/MC/MCDwarf.cpp:814:10: error: chosen constructor is explicit in copy-initialization
12:27:43   return {Offset, Size, SetDelta};
12:27:43          ^~~~~~~~~~~~~~~~~~~~~~~~
12:27:43 /proj/flexasic/app/llvm/8.0/bin/../lib/gcc/x86_64-unknown-linux-gnu/5.4.0/../../../../include/c++/5.4.0/tuple:479:19: note: explicit constructor declared here
12:27:43         constexpr tuple(_UElements&&... __elements)
12:27:43                   ^
12:27:43 1 error generated.

This commit adds explicit calls to std::make_tuple to work around
the problem.
The file was modifiedllvm/lib/MC/MCDwarf.cpp
Commit 070af1b7887f80383d8473bb4da565edbde6c6b0 by spatel
[InstCombine] avoid crashing on attribute propagation

In https://llvm.org/PR48810 , we are crashing while trying to
propagate attributes from mempcpy (returns void*) to memcpy
(returns nothing - void).

We can avoid the crash by removing known incompatible
attributes for the void return type.

I'm not sure if this goes far enough (should we just drop all
attributes since this isn't the same function?). We also need
to audit other transforms in LibCallSimplifier to make sure
there are no other cases that have the same problem.

Differential Revision: https://reviews.llvm.org/D95088
The file was modifiedllvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
The file was modifiedllvm/test/Transforms/InstCombine/mempcpy.ll
Commit 726de41e2bfb1d0d65e08f103dcb12810fe99d60 by 1.int32
[clang][AST] Add get functions for CXXFoldExpr paren locations.

Reviewed By: hokein

Differential Revision: https://reviews.llvm.org/D94787
The file was modifiedclang/include/clang/AST/ExprCXX.h
Commit 37510f69b4cb8d76064f108d57bebe95984a23ae by Raphael Isemann
[lldb][NFC] Fix build with GCC<6

GCC/libstdc++ before 6.1 can't handle scoped enums as unordered_map keys. LLVM
(and some build) bots officially support some GCC 5.x versions, so this patch
just makes the enum unscoped until we can require GCC 6.x.
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
Commit 20566a2ed825c05d56708552d33d95ee12255f46 by Matthew.Arsenault
AMDGPU: Add occupancy to serialized MachineFunctionInfo

Not sure about the default value handling, but also not sure
defaulting to a theoretically subtarget dependent value.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
The file was modifiedllvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
The file was modifiedllvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
Commit e4eaf9d82064901ff028332d1644eddafac73f69 by huberjn
[OpenMP] Add support for mapping names in mapper API

Summary:
The custom mapper API did not previously support the mapping names added previously. This means they were not present if a user requested debugging information while using the mapper functions. This adds basic support for passing the mapped names to the runtime library.

Reviewers: jdoerfert

Differential Revision: https://reviews.llvm.org/D94806
The file was modifiedclang/test/OpenMP/declare_mapper_codegen.cpp
The file was modifiedclang/test/OpenMP/target_depend_codegen.cpp
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPKinds.def
The file was modifiedclang/test/OpenMP/target_map_names.cpp
The file was modifiedllvm/test/Transforms/OpenMP/add_attributes.ll
The file was modifiedopenmp/libomptarget/test/mapping/declare_mapper_api.cpp
The file was modifiedopenmp/libomptarget/src/interface.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedopenmp/libomptarget/src/private.h
The file was modifiedopenmp/libomptarget/src/omptarget.cpp
Commit 0eeb15741bdaa6740c3bfcbed981b9d19d5348fb by andrzej.warzynski
[flang][driver] Make the driver report diagnostics from the prescanner

This patch makes sure that diagnostics from the prescanner are reported
when running `flang-new -E` (i.e. only the preprocessor phase is
requested). More specifically, the `PrintPreprocessedAction` action is
updated.

With this patch we make sure that the `f18` and `flang-new` provide
identical output when running the preprocessor and the prescanner
generates diagnostics.

Differential Revision: https://reviews.llvm.org/D94782
The file was modifiedflang/lib/Frontend/FrontendActions.cpp
The file was addedflang/test/Frontend/Inputs/empty.h
The file was addedflang/test/Frontend/preprocessor-diag.f90
Commit dfac521da1b90db6832a0d357f67cb819ea8687f by david.green
[ARM] Fix vector saddsat costs.

It turns out the vectorizer calls the getIntrinsicInstrCost functions
with a scalar return type and vector VF. This updates the costmodel to
handle that, still producing the correct vector costs.

A vectorizer test is added to show it vectorizing at the correct factor
again.
The file was addedllvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
Commit ba7dcd8542abfc784255efcb0767701dec42fe83 by sebastian.neubauer
[AMDGPU] Implement mir parseCustomPseudoSourceValue

Allow parsing generated mir with custom pseudo source value tokens.
Also rename pseudo source values to have more meaningful names.

Differential Revision: https://reviews.llvm.org/D94768
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
The file was addedllvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
The file was addedllvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2darraymsaa.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.3d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/image_ls_mipmap_zero.a16.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/print-mir-custom-pseudo.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
The file was addedllvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
Commit 35c535a7df3c392389de434fc47ec3c47c46537a by Matthew.Arsenault
AArch64/GlobalISel: Factor out parametersInCSRMatch

Make this look more like the DAG handling and move to common code.

I also noticed AArch64 seems to not be properly adding the
physreg:virtreg mapping to the function live ins.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/CallLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
Commit 48c54f0f623407192e93dc884724a12826eeab4f by tianshilei1992
[OpenMP][NVPTX] Added forward declaration for atomic operations

Pretty similar to D95058, this patch added forward declaration for
CUDA atomic functions. We already have definitions with right mangled names in
internal CUDA headers so the forward declaration here can work properly.

Reviewed By: jdoerfert, JonChesterfield

Differential Revision: https://reviews.llvm.org/D95085
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h
Commit 2a0db8d70eeb0c4c09e4c91b365630eefbbf3993 by Matthew.Arsenault
AMDGPU: Use more accurate fast f64 fdiv

A raw v_rcp_f64 isn't accurate enough, so start applying correction.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/rsq.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/fdiv.f64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/frem.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
Commit 94375d1083ccc9187c2502894f1dad62d9dd92b9 by Matthew.Arsenault
AMDGPU: Remove v_rsq_f64 patterns

This isn't accurate enough without correction
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/rsq.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
Commit c0b3c5a06451aad4351e35c74ccf2fe5da917a41 by jay.foad
[AMDGPU][GlobalISel] Run SIAddImgInit

This pass is required to get correct codegen for image instructions with
the tfe or lwe bits set.

Differential Revision: https://reviews.llvm.org/D95132
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
Commit 4234292ecf4902ad53286652acc3969c6758fed0 by ravishankarm
[mlir][SPIRV] Rename OpSpecConstantOperation -> OpSpecConstantOp

The SPIR-V spec uses OpSpecConstantOp. Using an inconsistent name
makes the dialect generation scripts fail. Update to use the right
operation name, and fix the auto generation scripts as well.

Differential Revision: https://reviews.llvm.org/D95097
The file was modifiedmlir/lib/Target/SPIRV/Serialization/Serialization.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
The file was modifiedmlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
The file was modifiedmlir/utils/spirv/define_opcodes.sh
The file was modifiedmlir/lib/Target/SPIRV/Deserialization/Deserializer.h
Commit 615167c9f74962ffbc70e4481655762783f4705c by ravishankarm
[mlir]][SPIRV] Define OrderedOp and UnorderedOp and add lowerings from Standard.

Define OrderedOp and UnorderedOp instructions in SPIR-V and convert
cmpf operations with `ord` and `uno` tag to these instructions
respectively.

Differential Revision: https://reviews.llvm.org/D95098
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
The file was modifiedmlir/utils/spirv/define_inst.sh
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
The file was modifiedmlir/test/Target/SPIRV/logical-ops.mlir
Commit 9dd5aea1e0397f693a739bffb03fd94dc8e1ec79 by kai.wang
[RISCV] Make LMUL field in VTYPE continuous.

Upgrade RISC-V V extension to v1.0-08a0b46.
Update the VTYPE encoding. Make LMUL encoding in a continuous field.
The file was modifiedllvm/test/MC/RISCV/rvv/vsetvl.s
The file was modifiedllvm/test/CodeGen/RISCV/rvv/add-vsetvli-gpr.mir
The file was modifiedllvm/test/CodeGen/RISCV/rvv/add-vsetvli-vlmax.ll
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h