SuccessChanges

Summary

  1. [scudo/standalone] Use .arch_extension memtag, not mte (details)
  2. DebugInfo/Symbolize: Allow STT_NOTYPE/STT_GNU_IFUNC symbols for .symtab symbolization (details)
  3. [AArch64] Use '//' as comment string for MSVC assembly (details)
  4. Revert "[Test] Add failing test for PR49087" (details)
  5. [AArch64][GlobalISel] Support the 'returned' parameter attribute. (details)
  6. [CMake] [MinGW] Enable use of LLVM_USE_SANITIZER in a MinGW environment (details)
  7. [gn build] reformat all gn files (details)
  8. [SimpleLoopUnswitch] Don't non-trivially unswitch loops that are unsafe to clone (details)
  9. [ARM] One-off identity shuffle (details)
  10. [Verifier] Allow DW_TAG_class_type/DW_TAG_union_type to have no filename (details)
  11. [FileCheck] Default --allow-unused-prefixes to false (details)
  12. [test] Fix unused check prefixes (details)
  13. [flang][NFC] Add comment. (details)
  14. [NVPTX][NewPM] Re-enable NVVMReflectPass (details)
  15. AMDGPU/GlobalISel: Remove dead check prefixes (details)
  16. AMDGPU: Stop adding stack passed wide arguments to call conv handler (details)
  17. GlobalISel: Use correct calling convention in handleAssignments (details)
  18. [RISCV] Initial support of LoopVectorizer for RISC-V Vector. (details)
Commit 4c9adbb287e7e6cfea866b3c3254b50f21e5ce1f by mcgrathr
[scudo/standalone] Use .arch_extension memtag, not mte

GNU binutils accepts only `.arch_extension memtag` while Clang
accepts either that or `.arch_extension mte` to mean the same thing.

Reviewed By: pcc

Differential Revision: https://reviews.llvm.org/D95996
The file was modifiedcompiler-rt/lib/scudo/standalone/memtag.h
Commit 6d766c8bf9df3c22590a78c77879080736ad55ae by i
DebugInfo/Symbolize: Allow STT_NOTYPE/STT_GNU_IFUNC symbols for .symtab symbolization

In assembly files, omitting `.type foo,@function` is common. Such functions have
type `STT_NOTYPE` and llvm-symbolizer reports `??` for them.

An ifunc symbol usually has an associated resolver symbol which is defined at
the same address. Returning either one is fine for symbolization. The resolver
symbol may not end up in the symbol table if (object file) `.L` is used (linked
image) .symtab is stripped while .dynsym is retained.

This patch allows ELF STT_NOTYPE/STT_GNU_IFUNC symbols for .symtab symbolization.

I have left TODO in the test files for an unimplemented STT_FILE heuristic.

Differential Revision: https://reviews.llvm.org/D95916
The file was addedllvm/test/DebugInfo/Symbolize/ELF/symtab-notype.s
The file was addedllvm/test/DebugInfo/Symbolize/ELF/symtab-ignored.s
The file was modifiedllvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
The file was addedllvm/test/DebugInfo/Symbolize/ELF/symtab-file.s
The file was addedllvm/test/DebugInfo/Symbolize/ELF/symtab-ifunc.s
Commit 71c29b4cf3fb2b5610991bfbc12b8bda97d60005 by martin
[AArch64] Use '//' as comment string for MSVC assembly

As the actual MSVC toolset doesn't use the GAS-style assembly that
Clang/LLVM produces and consumes, there's no reference for what
string to use for e.g. comments when building with a MSVC triple.

This frees up the use of semicolon as separator string, just like
was done for GNU targets in 23413195649d0cf6f3860ae8b5fb115b35032075.
(Previously, both the separator and comment strings were set to
the same, a semicolon.)

Compiler-rt extensively uses separator chars in its assembly,
and that assembly should be buildable with clang-cl for MSVC too.

Differential Revision: https://reviews.llvm.org/D96259
The file was removedllvm/test/MC/AArch64/coff-gnu.s
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/seh_funclet_x1.ll
The file was modifiedllvm/test/CodeGen/AArch64/win64-no-uwtable.ll
The file was modifiedllvm/test/CodeGen/AArch64/cfguard-checks.ll
The file was modifiedllvm/test/CodeGen/AArch64/windows-extern-weak.ll
The file was modifiedllvm/test/CodeGen/AArch64/wineh-try-catch.ll
The file was modifiedllvm/test/CodeGen/AArch64/reloc-specifiers.mir
The file was addedllvm/test/MC/AArch64/coff-separator.s
The file was modifiedllvm/test/CodeGen/AArch64/wineh-try-catch-nobase.ll
The file was modifiedllvm/test/MC/AArch64/coff-relocations.s
The file was modifiedllvm/test/CodeGen/AArch64/landingpad-ifcvt.ll
Commit 3d471d7f06ff66aaf23d2dee9283e3a38a33d499 by thakis
Revert "[Test] Add failing test for PR49087"

This reverts commit 0fc1738eb75d613b9e16143b83e7cb80512e84eb.
The test passes (unexpectedly, due to the XFAIL: *) when x86 isn't
the default triple (such as on an arm machine).
The file was removedllvm/test/CodeGen/X86/pr49087.ll
Commit ec41ed5b1b9458d5e06b77ee808823b274cc2ac4 by Amara Emerson
[AArch64][GlobalISel] Support the 'returned' parameter attribute.

On AArch64 (which seems to be the only target that supports it), this
attribute allows codegen to avoid saving/restoring the value in x0
across a call.

Gives a 0.1% geomean -Os code size improvement on CTMark.

Differential Revision: https://reviews.llvm.org/D96099
The file was modifiedllvm/include/llvm/CodeGen/TargetCallingConv.h
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/CallLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.h
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/arm64-this-return.ll
Commit 99dfcfd14c1fef46891ba7aa7e0bf5ffad1f0de9 by martin
[CMake] [MinGW] Enable use of LLVM_USE_SANITIZER in a MinGW environment

Currently using LLVM_USE_SANITIZER with a MinGW target leads to a fatal
configuration error due to an unsupported platform. MinGW targets on
clang however implement a few sanitizers, currently ASAN and UBSAN.

This patch enables LLVM_USE_SANITIZER in a MinGW environment as well.

Differential Revision: https://reviews.llvm.org/D95750
The file was modifiedllvm/cmake/modules/HandleLLVMOptions.cmake
Commit 69f5bd2ec50c407fda52734f44eb706250a25e48 by thakis
[gn build] reformat all gn files

$ git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
The file was modifiedllvm/utils/gn/build/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/include/llvm/Frontend/OpenMP/BUILD.gn
Commit 0eda4547969e0f5c12af6b4e26afd34ff8c95015 by aeubanks
[SimpleLoopUnswitch] Don't non-trivially unswitch loops that are unsafe to clone

Non-trivial unswitching can clone loops.

The legacy -loop-unswitch pass also checks for this.

Fixes PR49085.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D96288
The file was modifiedllvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
The file was addedllvm/test/Transforms/SimpleLoopUnswitch/not-safe-to-clone.ll
Commit 0c7e044a7f62bba3fb43bf9e5fa7f31289d7e216 by david.green
[ARM] One-off identity shuffle

A One-Off Identity mask is a shuffle that is mostly an identity mask
from as single source but contains a single element out-of-place, either
from a different vector or from another position in the same vector. As
opposed to lowering this via a ARMISD::BUILD_VECTOR we can generate an
extract/insert pair directly. Under ARM with individually accessible
lane elements this often becomes a simple lane move.

This also alters the LowerVECTOR_SHUFFLEUsingMovs code to use v4f32 (not
v4i32), a more natural type for lane moves.

Differential Revision: https://reviews.llvm.org/D95551
The file was modifiedllvm/test/CodeGen/Thumb2/mve-float16regloops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst3.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld3.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst4.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-shuffle.ll
Commit ad60802a7187aa39b0374536be3fa176fe3d6256 by i
[Verifier] Allow DW_TAG_class_type/DW_TAG_union_type to have no filename

`clang/lib/CodeGen/CGOpenMPRuntime.cpp` synthesized union
(`distinct !DICompositeType(tag: DW_TAG_union_type, name: "kmp_cmplrdata_t", size: 64, elements: <0x62b690>)`)
does not have meaningful filename/line number.

D94735 dropped the previously arbitrary and untested filename/line from the union and caused a verifier error here.

This fixes `check-libarcher` failures.

Differential Revision: https://reviews.llvm.org/D96212
The file was modifiedllvm/lib/IR/Verifier.cpp
Commit 87dbdd2e3bb63b681f8cc3179ef5c2d5929bbf61 by i
[FileCheck] Default --allow-unused-prefixes to false

Link: https://lists.llvm.org/pipermail/llvm-dev/2020-October/146162.html "[RFC] FileCheck: (dis)allowing unused prefixes"

If a downstream project using lit needs time for transition,
add the following to `lit.local.cfg`:

```
from lit.llvm.subst import ToolSubst

fc = ToolSubst('FileCheck', unresolved='fatal')
config.substitutions.insert(0, (fc.regex, 'FileCheck --allow-unused-prefixes'))
```

Differential Revision: https://reviews.llvm.org/D95849
The file was modifiedclang/test/Driver/crash-report-null.test
The file was modifiedllvm/test/Transforms/Attributor/lit.local.cfg
The file was modifiedllvm/test/lit.cfg.py
The file was removedllvm/test/Reduce/lit.local.cfg
The file was modifiedllvm/test/Other/opt-bisect-legacy-pass-manager.ll
The file was modifiedllvm/utils/FileCheck/FileCheck.cpp
The file was modifiedclang/test/OpenMP/lit.local.cfg
The file was modifiedllvm/test/FileCheck/allow-unused-prefixes.txt
The file was modifiedclang/test/lit.cfg.py
The file was modifiedllvm/test/FileCheck/lit.local.cfg
Commit 830ead58fe07f0a8365aabf16b0a5f736e788e6c by i
[test] Fix unused check prefixes
The file was modifiedlld/test/ELF/aarch64-prel16.s
The file was modifiedlld/test/MachO/load-command-sequence.s
Commit e892109c3e55eefcd197d9ef8dc701550d5f268e by eschweitz
[flang][NFC] Add comment.
The file was modifiedflang/lib/Optimizer/Dialect/FIRAttr.cpp
Commit e84a4650eb7ecd5d2e3b266d63d2f7ed83d49f98 by aeubanks
[NVPTX][NewPM] Re-enable NVVMReflectPass

Disabled alongside NVVMIntrRangePass in https://reviews.llvm.org/D96166,
but turns out NVVMIntrRangePass was the issue.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D96291
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll
Commit e855cc6d04ff540b20ff48cd6bfee3fbf85328b9 by Matthew.Arsenault
AMDGPU/GlobalISel: Remove dead check prefixes
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
Commit bcf723b2fd6d92e7dd0d7cf4a645a2b1cb974966 by Matthew.Arsenault
AMDGPU: Stop adding stack passed wide arguments to call conv handler

The generated calling convention code shouldn't see these types since
we split large types into 32-bit chunks before the calling convention
code is triggered.

GlobalISel ends up directly calls the generated CC code before
checking for the register count breakdown. Arguably this difference is
a bug, but this was dead code for the DAG anyway.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
Commit 87e280110d91edda0353eddb621cb96f72c7ece3 by Matthew.Arsenault
GlobalISel: Use correct calling convention in handleAssignments

This was using the calling convention of the calling function, not the
callee. Avoids regressions in a future patch.
The file was modifiedllvm/lib/CodeGen/GlobalISel/CallLowering.cpp
Commit a5b07a221a5772c0d3733a0bc8ff0b57dd5705de by kai.wang
[RISCV] Initial support of LoopVectorizer for RISC-V Vector.

Define an option -riscv-vector-bits-max to specify the maximum vector
bits for vectorizer. Loop vectorizer will use the value to check if it
is safe to use the whole vector registers to vectorize the loop.

It is not the optimum solution for loop vectorizing for scalable vector.
It assumed the whole vector registers will be used to vectorize the code.
If it is possible, we should configure vl to do vectorize instead of
using whole vector registers.

We only consider LMUL = 1 in this patch.

This patch just an initial work for loop vectorizer for RISC-V Vector.

Differential Revision: https://reviews.llvm.org/D95659
The file was addedllvm/test/Transforms/LoopVectorize/RISCV/scalable-vf-hint.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVSubtarget.h
The file was modifiedllvm/lib/Target/RISCV/RISCVSubtarget.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was addedllvm/test/Transforms/LoopVectorize/RISCV/lit.local.cfg
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp