SuccessChanges

Summary

  1. [flang][fir][NFC] Rename WhereOp to IfOp. (details)
  2. Move implementation of isAssumeLikeIntrinsic into IntrinsicInst (details)
  3. [AMDGPU] Fix promote alloca with double use in a same insn (details)
  4. Encode alignment attribute for `atomicrmw` (details)
  5. Encode alignment attribute for `cmpxchg` (details)
  6. Fix incorrect indentation in LangRef.rst (details)
  7. [CSSPGO] Process functions in a top-down order on a dynamic call graph. (details)
  8. Fix incorrect indentation in LangRef.rst (details)
  9. [OpenMP] Enable omp_get_num_devices() on Windows (details)
  10. [lldb] Disable x86-multithread-write.test with reproducers (details)
  11. NFCI. With the move to the new pass manager by default, sanitize-coverage.c is now passing on ARM. (details)
  12. Undo test changs introduced by D96193. (details)
  13. [OpenMP] libomp: minor changes to improve library performance (details)
  14. Fix errors in distributions (details)
  15. [AArch64] Adding Neon Sm3 & Sm4 Intrinsics (details)
  16. Replace deprecated %T in 2 tests. (details)
  17. [dfsan] Introduce memory mapping for origin tracking (details)
  18. NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. (details)
  19. [RISCV] Initial support for insert/extract subvector (details)
Commit f47d7c145b89985807c1e84316d091c5711f2e49 by eschweitz
[flang][fir][NFC] Rename WhereOp to IfOp.
The file was modifiedflang/lib/Optimizer/Dialect/FIROps.cpp
The file was modifiedflang/include/flang/Optimizer/Dialect/FIROps.td
The file was modifiedflang/lib/Lower/IO.cpp
Commit 8151c1b44211d5a7154ca860d28a6aed3a4f2715 by Stanislav.Mekhanoshin
Move implementation of isAssumeLikeIntrinsic into IntrinsicInst

This is remove dependency on ValueTracking in the future patch.

Differential Revision: https://reviews.llvm.org/D96079
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicInst.h
Commit cb41ee92dab809b3389de286a51127723a35834d by Stanislav.Mekhanoshin
[AMDGPU] Fix promote alloca with double use in a same insn

If we have an instruction where more than one pointer operands
are derived from the same promoted alloca, we are fixing it for
one argument and do not fix a second use considering this user
done.

Fix this by deferring processing of memory intrinsics until all
potential operands are replaced.

Fixes: SWDEV-271358

Differential Revision: https://reviews.llvm.org/D96386
The file was modifiedllvm/test/CodeGen/AMDGPU/promote-alloca-mem-intrinsics.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
Commit d06ab79816785fa362e7d96d7a398bea8064cba7 by jyknight
Encode alignment attribute for `atomicrmw`

This is a follow up patch to D83136 adding the align attribute to `atomicwmw`.

Differential Revision: https://reviews.llvm.org/D83465
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was modifiedllvm/test/Transforms/GCOVProfiling/atomic-counter.ll
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/test/Bitcode/compatibility.ll
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
Commit 17517f3178b5cdda832c4e90f618437c13560013 by jyknight
Encode alignment attribute for `cmpxchg`

This is a follow up patch to D83136 adding the align attribute to `cmpxchg`.
See also D83465 for `atomicrmw`.

Differential Revision: https://reviews.llvm.org/D87443
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/test/Bitcode/compatibility.ll
Commit ca052adf07f0e5f453555053e0b0172e0b9f7309 by gchatelet
Fix incorrect indentation in LangRef.rst
The file was modifiedllvm/docs/LangRef.rst
Commit de40f6d6230e2ec1383c52e555876235f9fd0077 by hoy
[CSSPGO] Process functions in a top-down order on a dynamic call graph.

Functions are currently processed by the sample profiler loader in a top-down order defined by the static call graph. The order is being adjusted to be a top-down order based on the input context-sensitive profile. One benefit is that the processing order of caller and callee in one SCC would follow the context order in the profile to favor more inlining. Another benefit is that the processing order of caller and callee through an indirect call (which is not on the static call graph) can be honored which in turn allows for more inlining.

The profile top-down order for SCC is also extended to support non-CS profiles.

Two switches `-mllvm -use-profile-indirect-call-edges` and `-mllvm -use-profile-top-down-order` are being introduced.

Reviewed By: wmi

Differential Revision: https://reviews.llvm.org/D95988
The file was addedllvm/test/Transforms/SampleProfile/Inputs/profile-topdown-order.prof
The file was addedllvm/test/Transforms/SampleProfile/Inputs/profile-context-order.prof
The file was modifiedllvm/include/llvm/Transforms/IPO/SampleContextTracker.h
The file was modifiedllvm/lib/Transforms/IPO/SampleContextTracker.cpp
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was addedllvm/test/Transforms/SampleProfile/profile-context-order.ll
The file was addedllvm/test/Transforms/SampleProfile/profile-topdown-order.ll
Commit 8f3518e69bee735cabf234ce5a5e8dce13730ced by gchatelet
Fix incorrect indentation in LangRef.rst
The file was modifiedllvm/docs/LangRef.rst
Commit ffb21e7f0593fde83568ae364040296fe94cf347 by hansang.bae
[OpenMP] Enable omp_get_num_devices() on Windows

This patch enables omp_get_num_devices() and omp_get_initial_device() on
Windows by providing an alternative to dlsym on Windows, and proposes to
add a new libomptarget entry, __tgt_get_num_devices().

Differential Revision: https://reviews.llvm.org/D96182
The file was modifiedopenmp/runtime/cmake/LibompHandleFlags.cmake
The file was modifiedopenmp/runtime/src/kmp_ftn_entry.h
The file was modifiedopenmp/runtime/src/z_Windows_NT_util.cpp
The file was modifiedopenmp/runtime/src/kmp_os.h
Commit 876e7714dc73e651c5841af1b38b54fa350b6331 by Jonas Devlieghere
[lldb] Disable x86-multithread-write.test with reproducers

This test is failing on GreenDragon. Disabling it until I have bandwidth
to investigate why the register values are different during replay.
The file was modifiedlldb/test/Shell/Register/x86-multithread-write.test
Commit 7b4832648a6339c798f1f72bbc88b1ee41e9a338 by douglas.yung
NFCI. With the move to the new pass manager by default, sanitize-coverage.c is now passing on ARM.

This change removes the XFAIL from the original test and duplicates the test into sanitize-coverage-old-pm.c
which uses the old pass manager and has the corresponding XFAIL.

This should fix the XPASS from this and similar runs:
http://lab.llvm.org:8011/#/builders/60/builds/1875
The file was addedclang/test/CodeGen/sanitize-coverage-old-pm.c
The file was modifiedclang/test/CodeGen/sanitize-coverage.c
Commit 0f848a24e19e9bcba8ac52e74ff364e047a81678 by hoy
Undo test changs introduced by D96193.

Summary:
The test doesn't work on Windows but there seems no good way to disable the test for Windows only so I'm undoing the test changes.
The file was modifiedlld/test/ELF/reproduce-lto.s
Commit 838dcdb5fc428fd4b1830a1a23bb38c1fb1c8e5a by Andrey.Churbanov
[OpenMP] libomp: minor changes to improve library performance

Three minor changes in this patch:
- added UNLIKELY hint to few rarely executed branches;
- replaced couple of run time checks with debug assertions;
- moved check of presence of ittnotify tool from inside the function call.

Differential Revision: https://reviews.llvm.org/D95816
The file was modifiedopenmp/runtime/src/kmp_tasking.cpp
The file was modifiedopenmp/runtime/src/kmp_itt.h
Commit 74916008a87dd2992d12af0b9725cb1804d0c8ba by gchatelet
Fix errors in distributions
The file was modifiedlibc/benchmarks/MemorySizeDistributions.cpp
Commit 61cca0f2e5bbb6045bb27b822e34cd39c9c1acb1 by pzheng
[AArch64] Adding Neon Sm3 & Sm4 Intrinsics

This adds SM3 and SM4 Intrinsics support for AArch64, specifically:
        vsm3ss1q_u32
        vsm3tt1aq_u32
        vsm3tt1bq_u32
        vsm3tt2aq_u32
        vsm3tt2bq_u32
        vsm3partw1q_u32
        vsm3partw2q_u32
        vsm4eq_u32
        vsm4ekeyq_u32

Reviewed By: labrinea

Differential Revision: https://reviews.llvm.org/D95655
The file was addedclang/test/CodeGen/aarch64-neon-range-checks.c
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was addedllvm/test/CodeGen/AArch64/neon-sm4-sm3.ll
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was addedclang/test/CodeGen/aarch64-neon-sm4-sm3.c
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
The file was modifiedclang/include/clang/Basic/arm_neon.td
Commit 60bed4ab57d562d5770cc9c24a8fcb243208f5e5 by abidh
Replace deprecated %T in 2 tests.

In D91442, @MaskRay commented about a failure. This commit does the following to
address his comments:

1. Replace %T with %t as former is deprecated.
2. Add an explicit --sysroot argument in a test.

Some tests were failing when gcc-10-riscv64-linux-gnu is installed on test machine.
This was happening because the test was checking a case when --gcc-toolchain is not
provided. But if --sysroot was also not provided then code could pick a toolchain
installed in /usr. So to make the test more robust, I have provided an explicit --sysroot
argument. Its value has been chosen to match the existing patterns.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D93023
The file was modifiedclang/test/Driver/riscv32-toolchain-extra.c
The file was modifiedclang/test/Driver/riscv64-toolchain-extra.c
Commit 5ebbc5802ff3248622506b90e93a93d0eb3bfcee by jianzhouzh
[dfsan] Introduce memory mapping for origin tracking

Reviewed-by: morehouse

Differential Revision: https://reviews.llvm.org/D96545
The file was modifiedcompiler-rt/lib/dfsan/dfsan.h
The file was modifiedcompiler-rt/lib/dfsan/dfsan_platform.h
The file was modifiedcompiler-rt/include/sanitizer/dfsan_interface.h
The file was modifiedcompiler-rt/lib/dfsan/dfsan.cpp
Commit 8043d5a9643b5731454fce91fac0018bfddc96d6 by jyknight
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg.

The ability to specify alignment was recently added, and it's an
important property which we should ensure is set as expected by
Clang. (Especially before making further changes to Clang's code in
this area.) But, because it's on the end of the lines, the existing
tests all ignore it.

Therefore, update all the tests to also verify the expected alignment
for atomicrmw and cmpxchg. While I was in there, I also updated uses
of 'load atomic' and 'store atomic', and added the memory ordering,
where that was missing.
The file was modifiedclang/test/CodeGenCXX/cxx1z-decomposition.cpp
The file was modifiedclang/test/CodeGen/arm64-microsoft-intrinsics.c
The file was modifiedclang/test/CodeGenCXX/atomic.cpp
The file was modifiedclang/test/OpenMP/atomic_read_codegen.c
The file was modifiedclang/test/OpenMP/teams_distribute_reduction_codegen.cpp
The file was modifiedclang/test/CodeGenCXX/atomic-inline.cpp
The file was modifiedclang/test/CodeGen/atomic-ops.c
The file was modifiedclang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp
The file was modifiedclang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
The file was modifiedclang/test/CodeGenObjC/property-atomic-bool.m
The file was modifiedclang/test/CodeGen/arm-atomics-m.c
The file was modifiedclang/test/OpenMP/requires_seq_cst_codegen.cpp
The file was modifiedclang/test/OpenMP/atomic_update_codegen.cpp
The file was modifiedclang/test/OpenMP/atomic_capture_codegen.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
The file was modifiedclang/test/CodeGen/pr45476.cpp
The file was modifiedclang/test/CodeGen/2008-03-05-syncPtr.c
The file was modifiedclang/test/CodeGenOpenCL/atomic-ops.cl
The file was modifiedclang/test/CodeGen/atomic_ops.c
The file was modifiedclang/test/CodeGen/arm-atomics.c
The file was modifiedclang/test/CodeGen/RISCV/riscv-atomics.c
The file was modifiedclang/test/CodeGen/builtins-nvptx-ptx50.cu
The file was modifiedclang/test/CodeGen/c11atomics-ios.c
The file was modifiedclang/test/CodeGen/bittest-intrin.c
The file was modifiedclang/test/CodeGen/atomic.c
The file was modifiedclang/test/OpenMP/requires_relaxed_codegen.cpp
The file was modifiedclang/test/CodeGen/code-coverage-tsan.c
The file was modifiedclang/test/CodeGenCXX/static-initializer-branch-weights.cpp
The file was modifiedclang/test/CodeGen/Atomics.c
The file was modifiedclang/test/CodeGen/X86/x86_64-atomic-128.c
The file was modifiedclang/test/CodeGen/ms-intrinsics-other.c
The file was modifiedclang/test/OpenMP/requires_acq_rel_codegen.cpp
The file was modifiedclang/test/CodeGenCXX/static-init.cpp
The file was modifiedclang/test/CodeGenCXX/atomicinit.cpp
The file was modifiedclang/test/CodeGen/X86/x86-atomic-long_double.c
The file was modifiedclang/test/CodeGen/atomics-inlining.c
The file was modifiedclang/test/CodeGen/ms-intrinsics.c
The file was modifiedclang/test/CodeGen/linux-arm-atomic.c
The file was modifiedclang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
The file was modifiedclang/test/CodeGen/big-atomic-ops.c
The file was modifiedclang/test/CodeGenCXX/cxx1z-inline-variables.cpp
The file was modifiedclang/test/OpenMP/for_reduction_codegen.cpp
The file was modifiedclang/test/CodeGenCXX/static-init-pnacl.cpp
The file was modifiedclang/test/OpenMP/taskloop_with_atomic_codegen.cpp
The file was modifiedclang/test/OpenMP/parallel_reduction_codegen.cpp
The file was modifiedclang/test/CodeGenCXX/atomic-align.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp
The file was modifiedclang/test/CodeGen/builtins-nvptx.c
The file was modifiedclang/test/OpenMP/parallel_master_codegen.cpp
The file was modifiedclang/test/CodeGen/2010-01-13-MemBarrier.c
The file was modifiedclang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
The file was modifiedclang/test/CodeGen/ms-volatile.c
The file was modifiedclang/test/OpenMP/atomic_codegen.cpp
The file was modifiedclang/test/OpenMP/atomic_write_codegen.c
The file was modifiedclang/test/CodeGen/c11atomics.c
The file was modifiedclang/test/OpenMP/sections_reduction_codegen.cpp
The file was modifiedclang/test/OpenMP/parallel_for_lastprivate_conditional.cpp
The file was modifiedclang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
Commit 9e62c9146d2c125a1abda594add70ed66008e372 by craig.topper
[RISCV] Initial support for insert/extract subvector

This patch handles cast-like insert_subvector & extract_subvector
in which case:
1. index starts from 0.
2. inserting a fixed-width vector into a scalable vector,
   or extracting a fixed-width vector from a scalable vector.

Reviewed By: craig.topper, frasercrmck

Differential Revision: https://reviews.llvm.org/D96352
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll