SuccessChanges

Summary

  1. [analyzer][tests] Fix issue comparison script (details)
  2. [ARM] MVE min/max cost tests. NFC (details)
  3. [X86] Add reduced test case for PR49162 (details)
  4. [WebAssemblly] Fix rethrow's argument computation (details)
  5. [DAG] Fix shift amount limit in SimplifyDemandedBits trunc(shift(x,c)) to truncated bitwidth (details)
  6. reland [InstCombine] convert assumes to operand bundles (details)
  7. [clangd] Fix unsued private field warning (details)
  8. [DAG] PromoteIntRes_ADDSUBSHLSAT - use promoted ISD::USUBSAT directly (details)
  9. [DAG] Fold i1/vXi1 ssubsat/usubsat(x,y) -> and(x,~y) (details)
  10. [clang-tidy] Simplify static assert check (details)
  11. [clang-tidy] Simplify inaccurate erase check (details)
  12. [clangd] Retire clang-tidy-checks flag. (details)
Commit 94a1a5d25f5546019fc5feeb24d924b09b9d27e4 by vsavchenko
[analyzer][tests] Fix issue comparison script

When newer build has duplicate issues the script tried to
remove it from the list more than once.  The new approach
changes the way we filter out matching issues.

Differential Revision: https://reviews.llvm.org/D96611
The file was modifiedclang/utils/analyzer/CmpRuns.py
Commit b7c3de8d5a3d10dd976de796d73fc3f395a832e0 by david.green
[ARM] MVE min/max cost tests. NFC
The file was addedllvm/test/Analysis/CostModel/ARM/mve-minmax.ll
Commit 5ca3ef98a71598d368f6f4aaf0b385b50b67ce4a by llvm-dev
[X86] Add reduced test case for PR49162
The file was addedllvm/test/CodeGen/X86/pr49162.ll
Commit 35f5f797a616c0eb8d6ae23ca24e3b80d3e3efdf by aheejin
[WebAssemblly] Fix rethrow's argument computation

Previously we assumed `rethrow`'s argument was always 0, but it turned
out `rethrow` follows the same rule with `br` or `delegate`:
https://github.com/WebAssembly/exception-handling/pull/137
https://github.com/WebAssembly/exception-handling/issues/146#issuecomment-777349038

Currently `rethrow`s generated by our backend always rethrow the
exception caught by the innermost enclosing catch, so this adds a
function to compute that and replaces `rethrow`'s argument with its
computed result.

This also renames `EHPadStack` in `InstPrinter` to `TryStack`, because
in CFGStackify we use `EHPadStack` to mean the range between
`catch`~`end`, while in `InstPrinter` we used it to mean the range
between `try`~`catch`, so choosing different names would look clearer.
Doesn't contain any functional changes in `InstPrinter`.

Reviewed By: dschuff

Differential Revision: https://reviews.llvm.org/D96595
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
The file was modifiedllvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/exception.mir
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
Commit 7ad0c573bd4a68dc81886037457d47daa3d6aa24 by llvm-dev
[DAG] Fix shift amount limit in SimplifyDemandedBits trunc(shift(x,c)) to truncated bitwidth

We lost this in D56387/rG69bc0990a9181e6eb86228276d2f59435a7fae67 - where I got the src/dst bitwidths mixed up and assumed getValidShiftAmountConstant would catch it.

Patch by @craig.topper - confirmed by @Carrot that it fixes PR49162
The file was modifiedllvm/test/CodeGen/X86/pr49162.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit 642e9225c6e89f2be84d71c5c19da1b19c33314e by tyker
reland [InstCombine] convert assumes to operand bundles

Instcombine will convert the nonnull and alignment assumption that use the boolean condtion
to an assumption that uses the operand bundles when knowledge retention is enabled.

Differential Revision: https://reviews.llvm.org/D82703
The file was modifiedllvm/test/Analysis/ValueTracking/assume.ll
The file was modifiedllvm/test/Analysis/ValueTracking/assume-queries-counter.ll
The file was modifiedllvm/include/llvm/Transforms/Utils/AssumeBundleBuilder.h
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/test/Analysis/BasicAA/featuretest.ll
The file was modifiedllvm/include/llvm/Analysis/AssumeBundleQueries.h
The file was modifiedllvm/include/llvm/IR/Value.h
The file was modifiedllvm/lib/Analysis/Loads.cpp
The file was modifiedllvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
The file was modifiedllvm/test/Transforms/InstCombine/assume-align.ll
The file was modifiedllvm/test/Transforms/InstCombine/assume.ll
Commit d25fbaa4a4a1284e998f545d45280e976c29cc85 by kadircet
[clangd] Fix unsued private field warning
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
Commit 60ba5397dfbf28ffe6ec670f0cb29cf892591106 by llvm-dev
[DAG] PromoteIntRes_ADDSUBSHLSAT - use promoted ISD::USUBSAT directly

As discussed on D96413, as long as the promoted bits of the args are zero we can use the basic ISD::USUBSAT pattern directly, without the shifting like we do for other ops.

I think something similar should be possible for ISD::UADDSAT as well, which I'll look at later.

Also, create a ISD::USUBSAT node directly - this will be expanded back by the legalizer later on if necessary.

Differential Revision: https://reviews.llvm.org/D96622
The file was modifiedllvm/test/CodeGen/X86/usub_sat_vec.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/usubsat.ll
The file was modifiedllvm/test/CodeGen/ARM/usub_sat_plus.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/test/CodeGen/AArch64/usub_sat_vec.ll
The file was modifiedllvm/test/CodeGen/X86/usub_sat_plus.ll
Commit 0df15e5eff8dec82a619c1d27985356a8aa4037e by llvm-dev
[DAG] Fold i1/vXi1 ssubsat/usubsat(x,y) -> and(x,~y)

Alive2: https://alive2.llvm.org/ce/z/4nkNGh
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/AArch64/usub_sat_vec.ll
The file was modifiedllvm/test/CodeGen/X86/ssub_sat_vec.ll
The file was modifiedllvm/test/CodeGen/AArch64/ssub_sat_vec.ll
The file was modifiedllvm/test/CodeGen/X86/usub_sat_vec.ll
Commit 1709bb8c7395418236ec94fe3b9d91fed746452b by steveire
[clang-tidy] Simplify static assert check

Differential Revision: https://reviews.llvm.org/D96223
The file was modifiedclang-tools-extra/clang-tidy/misc/StaticAssertCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/misc/StaticAssertCheck.h
Commit f2f920b987f3810863b9d0160cbb52df3fa2ab6f by steveire
[clang-tidy] Simplify inaccurate erase check

The normalization of matchers means that this now works in all language
modes.

Differential Revision: https://reviews.llvm.org/D96139
The file was modifiedclang-tools-extra/clang-tidy/bugprone/InaccurateEraseCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/bugprone/InaccurateEraseCheck.h
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/bugprone-inaccurate-erase.cpp
Commit 022920c25b8eb90b0bd0d209a9d0f836743a21bb by n.james93
[clangd] Retire clang-tidy-checks flag.

In clangd-12 the ability to override what clang tidy checks should run was moved into config.
For the 13 release its a wise progression to remove the command line option for this.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D96508
The file was modifiedclang-tools-extra/clangd/tool/ClangdMain.cpp