SuccessChanges

Summary

  1. [mlir][Linalg] Fix constant detection in linalg.pad_tensor vectorization. (details)
  2. [BasicAA] Use index difference to detect GEPs with identical indexes (details)
  3. [BasicAA] Avoid duplicate query for GEPs with identical offsets (NFCI) (details)
  4. [Analysis] Use ListSeparator (NFC) (details)
  5. [llvm] Fix header guards (NFC) (details)
  6. [llvm] Use llvm::is_contained (NFC) (details)
  7. [ARM] Add some tests for MVE lane interleaving. NFC (details)
  8. [AMDGPU] Fix build breakage (details)
  9. [AMDGPU] Limit memory scope for scratch, LDS and GDS (details)
Commit 428bc6feed088accf549296b77ecf544d54ff1c9 by nicolas.vasilache
[mlir][Linalg] Fix constant detection in linalg.pad_tensor vectorization.
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
The file was modifiedmlir/test/Dialect/Linalg/vectorization.mlir
Commit 728803ed74e26b370600002dcffe4994ce3ec37a by nikita.ppv
[BasicAA] Use index difference to detect GEPs with identical indexes

We currently detect GEPs that have exactly the same indexes by
comparing the Offsets and VarIndices. However, the latter implicitly
performs equality comparisons between two values, which is not
generally legal inside BasicAA, due to the possibility of comparisons
across phi cycles.

I believe that in this particular instance this actually ends up being
unproblematic, at least I wasn't able to come up with any cases that
could result in an incorrect root query result.

In the interest of being defensive, compute GetIndexDifference earlier
(which knows how to handle phi cycles properly) and use the result of
that to determine whether the offsets are identical.
The file was modifiedllvm/include/llvm/Analysis/BasicAliasAnalysis.h
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
Commit 53ae96d4bb4976c458b5c50e00782980efba9ded by nikita.ppv
[BasicAA] Avoid duplicate query for GEPs with identical offsets (NFCI)

For two GEPs with identical offsets, we currently first perform
a base address query without size information, and then if it is
MayAlias, perform another with size information. This is pointless,
as the latter query should produce strictly better results.

This was not quite true historically due to the way that NoAlias
assumptions were handled, but that issue has since been resolved.
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
Commit 6ac12e4b348cd954f0c0dea8a026b863416849fa by kazu
[Analysis] Use ListSeparator (NFC)
The file was modifiedllvm/lib/Analysis/SyncDependenceAnalysis.cpp
Commit 1cc558bd4fa1acd1462226ef4796c712f80ea8e8 by kazu
[llvm] Fix header guards (NFC)

Identified with llvm-header-guard.
The file was modifiedllvm/include/llvm/CodeGen/ReplaceWithVeclib.h
The file was modifiedllvm/include/llvm/Analysis/ObjCARCUtil.h
Commit 910e2d1e57b78c0a2fa77a490eb1e1d55bfba6f4 by kazu
[llvm] Use llvm::is_contained (NFC)
The file was modifiedllvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
The file was modifiedllvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
The file was modifiedllvm/lib/Transforms/IPO/ArgumentPromotion.cpp
The file was modifiedllvm/lib/Analysis/LoopInfo.cpp
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/tools/opt/opt.cpp
The file was modifiedllvm/lib/Passes/StandardInstrumentations.cpp
The file was modifiedllvm/lib/Transforms/Utils/BasicBlockUtils.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
The file was modifiedllvm/lib/Target/Mips/MipsLegalizerInfo.cpp
The file was modifiedllvm/tools/llvm-xray/xray-graph-diff.cpp
The file was modifiedllvm/include/llvm/IR/DataLayout.h
The file was modifiedllvm/lib/Target/X86/X86SelectionDAGInfo.cpp
The file was modifiedllvm/include/llvm/TableGen/Record.h
The file was modifiedllvm/lib/CodeGen/MachineModuleInfo.cpp
The file was modifiedllvm/lib/Object/IRSymtab.cpp
The file was modifiedllvm/lib/TableGen/Record.cpp
The file was modifiedllvm/lib/Analysis/AssumeBundleQueries.cpp
Commit ac00518c9dc98590a2973634cae8e15184dd6284 by david.green
[ARM] Add some tests for MVE lane interleaving. NFC
The file was addedllvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll
The file was addedllvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
Commit b4c0d610a66087aa332e256daabdec6460e5ef21 by kazu
[AMDGPU] Fix build breakage
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
Commit 8a91b68b95e6d1fd31e2a62a61ecb3a3506cf837 by Tony.Tye
[AMDGPU] Limit memory scope for scratch, LDS and GDS

Changes for AMD GPU SIMemoryLegalizer:

- Limit the memory scope to maximum supported by the scratch, LDS and
  GDS address spaces.

- Improve assertion checking.

- Correct toSIAtomicScope argument name.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D96643
The file was modifiedllvm/test/CodeGen/AMDGPU/local-atomics-fp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll