Changes

[NFC] Use the same type for bit fields in MCSchedClassDesc

Otherwise they are not allocated as a single bit field and take 4
bytes instead of 2.

Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D95954

[clang][cli] Documentation of CompilerInvocation parsing/generation

This patch documents command line parsing in `-cc1`, `CompilerInvocation` and the marshalling infrastructure for command line options.

Reviewed By: Bigcheese

Differential Revision: https://reviews.llvm.org/D95790

[libcxx] Implement parsing of root_name for paths on windows

Differential Revision: https://reviews.llvm.org/D91176

[ARM] MVE abs intrinsic costs. NFC

[mlir][spirv] Add spv.GLSL.FrexpStruct

co-authored-by: Alan Liu <alanliu.yf@gmail.com>

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D96527

Use LoopRotate PrepareForLTO stage in NPM

The PrepareForLTO stage of LoopRotate tries to avoid unrolling loops
with calls that might be inlined later.  See D94232 where this was
introduced.

We didn't catch all occurances of the LoopRotatePass in the New Pass
Manager, so the original regression in astar returned with the pass
manager switch.

[AMDGPU] Add implicit vcc_lo on S_CBRANCH_VCCNZ in wave32

* Update skip-if-dead.ll with tests for wave32.
* Fix the crash in verifier in one newly enabled test by adding
  missing fixImplicitOperands in branch insertion code.

```
*** Bad machine code: Using an undefined physical register ***
- function:    test_kill_divergent_loop
- basic block: %bb.2 bb (0xad96308)
- instruction: S_CBRANCH_VCCNZ %bb.1, implicit $vcc_lo
- operand 1:   implicit $vcc_lo
LLVM ERROR: Found 1 machine code errors.
```

* Simplify "cbranch_kill" to not use interp instructions.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D96793

[OpenCL] Support enum and typedef args in TableGen BIFs

Add enum and typedef argument support to `-fdeclare-opencl-builtins`,
which was the last major missing feature.

Adding the remaining missing builtins is left as future work.

Differential Revision: https://reviews.llvm.org/D96051

[ARM] Add MVE abs costs

Similar to min/max, this increases the accuracy of abs intrinsics costs
under MVE.

[PowerPC] Handle FP physical register in inline asm constraint.

Do not defer to the base class when the register constraint is a
physical fpr. The base class will select SPILLTOVSRRC as the register
class and register allocation will fail on subtargets without VSX
registers.

Differential Revision: https://reviews.llvm.org/D91629

[clangd] Pass file when possible to resolve URI.

Some URI scheme needs the hint path to do a correct resolution, we pass
one of the open files as hint path.

This is not perfect, and it might not work for opening files across
project, but it would fix a bug with our internal scheme.

in the long run, removing URIs from all the index internals is a more proper fix.

Differential Revision: https://reviews.llvm.org/D96844

[clangd] IndexedFiles should include Fils from RefSlab and RelationSlab.

This looks like an oversight.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D96845

[PowerPC][AIX] Enable Shrinkwrapping on 32 and 64 bit AIX.

Summary:
Currently Shrinkwrap is not enabled on AIX.
This patch enables shrink wrap on 32 and 64 bit AIX, and 64 bit ELF.

Reviewed By: sfertile, nemanjai

Differential Revision: https://reviews.llvm.org/D95094

[Fuzzer][Test] Use %python substitution for trace-malloc-unbalanced.test

This test was found to fail for some of our downstream builds, on
computers where python was not on the default $PATH. Therefore
add a %python substitution to use sys.executable, based on similar
solutions for python calls in tests elsewhere in LLVM.

Differential Revision: https://reviews.llvm.org/D96799

[lldb][NFC] Delete deleted const char* overloads of SetValueFromString

This came up during the review of D96817 because those deleted overloads force
the caller to explicitly create a StringRef when passing a string literal.

It seems they were added as some kind of help while migrating the code base to
StringRef in D24847, but I don't think they have any use these days and make
these functions awkward to use.

This patch just removes all the deleted overloads.

Reviewed By: tatyana-krasnukha

Differential Revision: https://reviews.llvm.org/D96861

[mlir][StandardToSPIRV] Add support for lowering trunci to SPIR-V to i1 types.

Add a pattern to converting some value to a boolean. spirv.S/UConvert does not
work on i1 types. Thus, the pattern is lowered to cmpi + select.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D96851

build: Add LLVM_WINSYSROOT to make setting /winsysroot easy on Win

Also add a script for sysroot management. For now, it can only create
fake sysroots that just symlink to local folders. This is useful for
testing.

Differential Revision: https://reviews.llvm.org/D96868

[InstCombine] add tests for fcmp-of-copysign; NFC

https://llvm.org/PR49179

[InstCombine] fold fcmp-of-copysign idiom

As discussed in:
https://llvm.org/PR49179
...this pattern shows up in library code.
There are several potential generalizations as noted,
but we need to be careful that we get FP special-values
right, and it's not clear how much variation we should
expect to see from this exact idiom.