SuccessChanges

Summary

  1. Updated requirements. (details)
The file was modifiedrequirements.txt (diff)

Summary

  1. [clang][SVE] Use __inline__ instead of inline in arm_sve.h (details)
  2. [verify-regalloc] Verify after allocation and before postOptimization (details)
  3. [RISCV] Add support for fixed vector MULHU/MULHS. (details)
  4. [flang][driver] Add missing dependency (nfc) (details)
  5. [RISCV] Pre-commit test file changes from D96661. NFC (details)
  6. Fix a buildbot warning triggered by 1dfb06d (details)
  7. [ObjC] Encode pointers to C++ classes as "^v" if the encoded string (details)
  8. [lldb] Un-XFAIL TestFormatters on windows (details)
  9. [dfsan] Add origin tls/move/read APIs (details)
  10. [dfsan] Refactor runtime functions checking (details)
  11. [dfsan] Refactor defining TLS variables (details)
  12. [WebAssembly] Handle multiple EH_LABELs in EH pad (details)
  13. [PowerPC][AIX] Add support for vector arg passing on the stack. (details)
  14. [CFE, SystemZ]  New target hook testFPKind() for checks of FP values. (details)
  15. [lldb] Remove unused code in ScriptInterpreterPython (details)
  16. libcxx: use early returns (details)
  17. [NPM] Properly reset parent loop after loop passes (details)
  18. Pre-commit test case (details)
  19. fix comment typos to cycle bots (details)
  20. [AArch64] Adding Neon Polynomial vadd Intrinsics (details)
  21. [RISCV] Use XLenRI alias for RegInfoByHwMode instances (details)
  22. [gn build] try to fix libxml2 include path on mac after 0ec448194e29 (details)
  23. [Coverage] Emit gap region after conditions when macro is present. (details)
  24. [RISCV] Add Zbb command lines to uadd/usub/sadd/ssub tests. (details)
  25. [WebAssembly] Fix assert in lookup of section symbols (details)
Commit 1f2122c9b046a7d6d141f7c42528d8a3e2e66b70 by joe.ellis
[clang][SVE] Use __inline__ instead of inline in arm_sve.h

The inline keyword is not defined in the C89 standard, so source files
that include arm_sve.h will fail compilation if -std=c89 is specified.
For consistency with arm_neon.h, we should use __inline__ instead.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D96852
The file was modifiedclang/utils/TableGen/SveEmitter.cpp
Commit 13753808f4e990089bf34ff44474e85cc3e6e775 by listmail
[verify-regalloc] Verify after allocation and before postOptimization

I've now hit several cases where a mistake in the regalloc main loop caused corrupt live intervals that didn't get caught until either the next verify or during post-optimization.  The later case is rather confusing and tends to lead one down false trails, so let's catch corruption before that.
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
Commit 156fc07e19ae599e638e18e598dbf5c5a4247408 by craig.topper
[RISCV] Add support for fixed vector MULHU/MULHS.

This uses to division by constant optimization to use MULHU/MULHS.

Reviewed By: frasercrmck, arcbbb

Differential Revision: https://reviews.llvm.org/D96934
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
Commit c0deb81cd1a4afbe7d1666390c31746b308ff96f by andrzej.warzynski
[flang][driver] Add missing dependency (nfc)

These dependencies were introduced via the `ParseTreeDumper` API in:
  * https://reviews.llvm.org/D96716
They manifested themselves in buildbot builders that set
`BUILD_SHARED_LIBS` to `On`.
The file was modifiedflang/lib/Frontend/CMakeLists.txt
Commit c9d56df26a2bb08aacdd91e35ffe1965a92e8046 by craig.topper
[RISCV] Pre-commit test file changes from D96661. NFC

This includes i32 SHFLI tests for RV64 which we currently don't optimize.
And tests for associativity of OR.
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbp.ll
Commit dcebe8ab1e26f8ea2fc91e12a20fadc5677407a0 by listmail
Fix a buildbot warning triggered by 1dfb06d
The file was modifiedllvm/lib/CodeGen/SpillPlacement.cpp
Commit b87a120820989844dc206c66bd0272b5238a14d1 by Akira
[ObjC] Encode pointers to C++ classes as "^v" if the encoded string
would otherwise include template specialization types

This helps reduce the size of the encoded C++ type strings in the binary.

This is enabled by default only on Darwin, but can be enabled/disabled
via command line options.

rdar://63288571

Differential Revision: https://reviews.llvm.org/D96816
The file was modifiedclang/include/clang/Basic/LangOptions.def
The file was modifiedclang/test/CodeGenObjCXX/encode.mm
The file was addedclang/test/Driver/objc-encode-cxx-class-template-spec.m
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit 1b8d2ec07142d3517c0236064b1b8d281319b02a by pavel
[lldb] Un-XFAIL TestFormatters on windows

The test passes after D96779.
The file was modifiedlldb/test/API/commands/expression/formatters/TestFormatters.py
Commit 063a6fa87ece8a452daba99df7fb99751ed10165 by jianzhouzh
[dfsan] Add origin tls/move/read APIs

This is a part of https://reviews.llvm.org/D95835.

Added
1) TLS storage
2) a weak global used to set by instrumented code
3) move origins

These APIs are similar to MSan's APIs
  https://github.com/llvm/llvm-project/blob/main/compiler-rt/lib/msan/msan_poisoning.cpp
We first improved MSan's by https://reviews.llvm.org/D94572 and https://reviews.llvm.org/D94552.
So the correctness has been verified by MSan.
After the DFSan instrument code is ready, we wil be adding more test
cases

4) read

To reduce origin tracking cost, some of the read APIs return only
the origin from the first taint data.

Note that we did not add origin set APIs here because they are related
to code instrumentation, will be added later with IR transformation
code.

Reviewed-by: morehouse

Differential Revision: https://reviews.llvm.org/D96564
The file was modifiedcompiler-rt/lib/dfsan/dfsan.h
The file was modifiedcompiler-rt/lib/dfsan/dfsan.cpp
Commit 2e6cd338c6d4605fa599f583bc8ca202dda6a551 by jianzhouzh
[dfsan] Refactor runtime functions checking

This is a part of https://reviews.llvm.org/D95835.

Reviewed-by: morehouse

Differential Revision: https://reviews.llvm.org/D96940
The file was modifiedllvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
Commit 406dc549034adc4da5e6f45ef3d9aef98c177331 by jianzhouzh
[dfsan] Refactor defining TLS variables

This is a part of https://reviews.llvm.org/D95835.

Reviewed-by: morehouse

Differential Revision: https://reviews.llvm.org/D96941
The file was modifiedllvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
Commit 6f2999b36a6e4834966fd5cde3aba4d296a2de97 by aheejin
[WebAssembly] Handle multiple EH_LABELs in EH pad

Usually `EH_LABEL`s are placed in
- Before an `invoke` (which becomes calls in the backend)
- After an `invoke`
- At the start of an EH pad

I don't know exactly why, but I noticed there are cases of multiple, not
a single, `EH_LABEL` instructions in the beginning of an EH pad. In that
case `global.set` instruction placed to restore `__stack_pointer` ended
up between two `EH_LABEL` instructions before `CATCH`. It should follow
after the `EH_LABEL`s and `CATCH`. This CL fixes that case.

Reviewed By: dschuff

Differential Revision: https://reviews.llvm.org/D96970
The file was modifiedllvm/test/CodeGen/WebAssembly/exception.mir
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
Commit bb260b1ca7d51869e140212aa543f53dfcf01a1b by sd.fertile
[PowerPC][AIX] Add support for vector arg passing on the stack.

Enable passing more vector arguments then available vector
argument passing registers.

Differential Revision: https://reviews.llvm.org/D96415
The file was addedllvm/test/CodeGen/PowerPC/aix-vec-arg-spills-mir.ll
The file was addedllvm/test/CodeGen/PowerPC/aix-vec-arg-spills.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-vector-stack.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-vector-stack-caller.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was addedllvm/test/CodeGen/PowerPC/aix-vec-arg-spills-callee.ll
Commit e57bd1ff4fb65208cb3060b62e1c48aa0aac623f by paulsson
[CFE, SystemZ]  New target hook testFPKind() for checks of FP values.

The recent commit 00a6254 "Stop traping on sNaN in builtin_isnan" changed the
lowering in constrained FP mode of builtin_isnan from an FP comparison to
integer operations to avoid trapping.

SystemZ has a special instruction "Test Data Class" which is the preferred
way to do this check. This patch adds a new target hook "testFPKind()" that
lets SystemZ emit the s390_tdc intrinsic instead.

testFPKind() takes the BuiltinID as an argument and is expected to soon
handle more opcodes than just 'builtin_isnan'.

Review: Thomas Preud'homme, Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D96568
The file was addedclang/test/CodeGen/SystemZ/strictfp_builtins.c
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
The file was modifiedclang/lib/CodeGen/TargetInfo.h
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit 612384f6e01194a4689b6663f039145b3d01ddce by Jonas Devlieghere
[lldb] Remove unused code in ScriptInterpreterPython

Remove the unused code I noticed when working on d6e80578fc5e and do
some other minor cleanups in the vicinity.
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
Commit a77e918016043691246d61f045519aaa5bc200f5 by joerg
libcxx: use early returns

Differential Revision: https://reviews.llvm.org/D96955
The file was modifiedlibcxx/src/filesystem/operations.cpp
Commit f70cdc5b5c7c6086417409ec2d31b66144fabbc9 by tu.da.wei
[NPM] Properly reset parent loop after loop passes

This fixes https://bugs.llvm.org/show_bug.cgi?id=49185

When `NDEBUG` is not set, `LPMUpdater` checks if the added loops have the same parent loop as the current one in `addSiblingLoops`.
If multiple loop passes are executed through `LoopPassManager`, `U.ParentL` will be the same across all passes.
However, the parent loop might change after running a loop pass, resulting in assertion failures in subsequent passes.

This patch resets `U.ParentL` after running individual loop passes in `LoopPassManager`.

Reviewed By: asbirlea, ychen

Differential Revision: https://reviews.llvm.org/D96727
The file was modifiedllvm/include/llvm/Transforms/Scalar/LoopPassManager.h
The file was addedllvm/test/Transforms/Util/pr49185.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopPassManager.cpp
Commit 2cc76b17be4781ebb3733efdc1b54c786753dfa1 by carrot
Pre-commit test case

Pre-commit test case for https://reviews.llvm.org/D95086, so that patch
can show the actual diff.
The file was modifiedllvm/test/CodeGen/X86/select-ext.ll
Commit cb4df6eb8d7c42c2910ca2e91a499607ac206e46 by thakis
fix comment typos to cycle bots
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/ELF/Writer.cpp
The file was modifiedlld/ELF/InputFiles.cpp
Commit d9645059c5deeacf264bea0cf50eab459cf8e5bb by pzheng
[AArch64] Adding Neon Polynomial vadd Intrinsics

This patch adds the following intrinsics:
            vadd_p8
            vadd_p16
            vadd_p64
            vaddq_p8
            vaddq_p16
            vaddq_p64
            vaddq_p128

Reviewed By: t.p.northover, DavidSpickett

Differential Revision: https://reviews.llvm.org/D96825
The file was modifiedclang/include/clang/Basic/arm_neon.td
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was addedclang/test/CodeGen/aarch64-poly-add.c
Commit 74df1ffaad3937891b808c894cfafe2fa29b1ad6 by jrtc27
[RISCV] Use XLenRI alias for RegInfoByHwMode instances

This avoids tedious repetition and matches what we do for the
ValueTypeByHwMode uses.

Reviewed By: craig.topper, luismarques

Differential Revision: https://reviews.llvm.org/D96649
The file was modifiedllvm/lib/Target/RISCV/RISCVRegisterInfo.td
Commit 9fa11201618d8ad3a978815d90d3e64d8e0fa310 by thakis
[gn build] try to fix libxml2 include path on mac after 0ec448194e29
The file was modifiedllvm/utils/gn/build/BUILD.gn
The file was modifiedllvm/utils/gn/build/mac_sdk.gni
Commit d83511dd26ca8d0dd5be6302ad7b55de05cedab2 by zequanwu
[Coverage] Emit gap region after conditions when macro is present.
The file was modifiedclang/lib/CodeGen/CoverageMappingGen.cpp
The file was modifiedclang/test/CoverageMapping/macro-expressions.cpp
The file was modifiedclang/test/CoverageMapping/if.cpp
The file was modifiedclang/test/CoverageMapping/macroparams2.c
The file was modifiedclang/test/CoverageMapping/macroscopes.cpp
The file was modifiedclang/test/CoverageMapping/macros.c
The file was modifiedclang/test/CoverageMapping/moremacros.c
Commit 8860f190347467ae9ad2d8688f0ce7feaef4bbfc by craig.topper
[RISCV] Add Zbb command lines to uadd/usub/sadd/ssub tests.

The expansions of the saturating intrinsics can make use of
the min(u)/max(u) instructions in Zbb.
The file was modifiedllvm/test/CodeGen/RISCV/sadd_sat_plus.ll
The file was modifiedllvm/test/CodeGen/RISCV/uadd_sat_plus.ll
The file was modifiedllvm/test/CodeGen/RISCV/usub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/RISCV/ssub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/RISCV/uadd_sat.ll
The file was modifiedllvm/test/CodeGen/RISCV/sadd_sat.ll
The file was modifiedllvm/test/CodeGen/RISCV/ssub_sat.ll
The file was modifiedllvm/test/CodeGen/RISCV/usub_sat.ll
Commit 508aa69e9dbcf4b4de1876cb1b0e9d2c1dbc176f by aardappel
[WebAssembly] Fix assert in lookup of section symbols

Fixes assert in: https://bugs.llvm.org/show_bug.cgi?id=49036

getWasmSection creates sections if they don't exist, but doesn't add them to the Symbols table. This may cause problems in subsequent calls to getOrCreateSymbol which checks this table, the calls createSymbol assuming it doesn't exist, which then checks UsedNames and finds out it does exist, causing an assert on trying to rename a non-temp symbol.

I tried also fixing the somewhat unintuitive forced suffixing (adding `0`), but it turns out that WasmObjectWriter currently assumes these section symbols are unique, so that may have to be a separate fix: https://bugs.llvm.org/show_bug.cgi?id=49252

Also worth noting is that getWasmSection calling createSymbol may not be correct to start with, given that createSymbol seems to assume it is creating non-section symbols. But again, for a future fix.

Related: where some of this was introduced: https://github.com/llvm/llvm-project/commit/8d396acac3bc21f688ac707bb42e4698dbdcab7e

Differential Revision: https://reviews.llvm.org/D96473
The file was addedllvm/test/MC/WebAssembly/section-symbol.s
The file was modifiedllvm/lib/MC/MCContext.cpp