SuccessChanges

Summary

  1. [RISCV] Remove redundant test cases for index segment load (1/8). (details)
  2. [RISCV] Remove redundant test cases for index segment load (2/8). (details)
  3. [RISCV] Remove redundant test cases for index segment load (3/8). (details)
  4. [RISCV] Remove redundant test cases for index segment load (4/8). (details)
  5. [RISCV] Remove redundant test cases for index segment store (5/8). (details)
  6. [RISCV] Remove redundant test cases for index segment store (6/8). (details)
  7. [RISCV] Remove redundant test cases for index segment store (7/8). (details)
  8. [RISCV] Remove redundant test cases for index segment store (8/8). (details)
  9. [ORC] Print CPU feature string in JITTargetMachineBuilder debugging output. (details)
  10. [HIP] Support device sanitizer (details)
  11. Mark 2534 as Complete. (details)
  12. [libc++] shared_ptr deleter requirements (LWG 2802). (details)
  13. [FPEnv][AArch64] Implement lowering of llvm.set.rounding (details)
  14. [mlir] Load dynamic libraries in JitRunner from absolute paths so that GDB can find the symbol tables. (details)
Commit a32c79ce2c355decbf6fd06b492044828c1c957d by kai.wang
[RISCV] Remove redundant test cases for index segment load (1/8).

Differential Revision: https://reviews.llvm.org/D97020
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll
Commit 320250e4865756545b4187a74faac656120c678b by kai.wang
[RISCV] Remove redundant test cases for index segment load (2/8).
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll
Commit 8cc0b1cbea7d7ef89a950d709654555ec6949136 by kai.wang
[RISCV] Remove redundant test cases for index segment load (3/8).

Differential Revision: https://reviews.llvm.org/D97022
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll
Commit 3b4b1c845a4b5e329065f59cb87dce7f528a16fd by kai.wang
[RISCV] Remove redundant test cases for index segment load (4/8).
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
Commit de6d640f6d21d78344b6a834f03148963b8a6f5c by kai.wang
[RISCV] Remove redundant test cases for index segment store (5/8).

Differential Revision: https://reviews.llvm.org/D97023
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll
Commit b0168a3896eed6ce69886139dc5ae5c983742464 by kai.wang
[RISCV] Remove redundant test cases for index segment store (6/8).

Differential Revision: https://reviews.llvm.org/D97024
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll
Commit c2f27da7e7eb514c1e2cb283fe832281fb17819e by kai.wang
[RISCV] Remove redundant test cases for index segment store (7/8).

Differential Revision: https://reviews.llvm.org/D97025
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll
Commit 0ab3558b25d6ba0b4606d3831c9bb1d98c17d113 by kai.wang
[RISCV] Remove redundant test cases for index segment store (8/8).

Differential Revision: https://reviews.llvm.org/D97026
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll
Commit 0469256d35e7dce12db1ff479bac9946c344d31f by Lang Hames
[ORC] Print CPU feature string in JITTargetMachineBuilder debugging output.
The file was modifiedllvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Commit 51ade31e67897bbd6f363f26d9110ec4d6ddaa7f by Yaxun.Liu
[HIP] Support device sanitizer

Add option -fgpu-sanitize to enable sanitizer for AMDGPU target.

Since it is experimental, it is off by default.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D96835
The file was modifiedclang/lib/Driver/ToolChains/HIP.cpp
The file was modifiedclang/lib/Driver/ToolChains/AMDGPU.cpp
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_finite_only_on.bc
The file was modifiedclang/lib/Driver/ToolChain.cpp
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_daz_opt_on.bc
The file was addedclang/test/Driver/Inputs/rocm/amdgcn/bitcode/asanrtl.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_unsafe_math_off.bc
The file was modifiedclang/lib/Driver/Driver.cpp
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_unsafe_math_on.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/ocml.bc
The file was modifiedclang/lib/Driver/ToolChains/ROCm.h
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_correctly_rounded_sqrt_on.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_isa_version_803.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_wavefrontsize64_off.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/include/hip/hip_runtime.h
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_isa_version_1011.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/opencl.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_daz_opt_off.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_correctly_rounded_sqrt_off.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/README
The file was modifiedclang/test/Driver/hip-sanitize-options.hip
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_isa_version_1010.bc
The file was modifiedclang/lib/Driver/ToolChains/HIP.h
The file was modifiedclang/lib/Driver/SanitizerArgs.cpp
The file was modifiedclang/include/clang/Driver/ToolChain.h
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_isa_version_1012.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/hip.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_wavefrontsize64_on.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/bin/.hipVersion
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_isa_version_908.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/ockl.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_finite_only_off.bc
The file was addedclang/test/Driver/Inputs/rocm-invalid/amdgcn/bitcode/oclc_isa_version_900.bc
Commit 82b82b9430a7f73dbf4bc931917143ee09f48d8f by zoecarver
Mark 2534 as Complete.

c90dee1 fixed LWG 1203 which supresses LWG 2534 as well.

Refs D62889.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D96885
The file was modifiedlibcxx/docs/Cxx1zStatusIssuesStatus.csv
Commit 6a328c66d35c71d5e92be80659186de567b86e38 by zoecarver
[libc++] shared_ptr deleter requirements (LWG 2802).

This patch implements 2802. Requires _Deleter to have call operator and be move constructible. Based on D62233.

Refs PR37637.

Differential Revision: https://reviews.llvm.org/D62274
The file was modifiedlibcxx/include/memory
The file was modifiedlibcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.const/pointer_deleter.pass.cpp
The file was modifiedlibcxx/docs/Cxx1zStatusIssuesStatus.csv
The file was modifiedlibcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.const/pointer_deleter_allocator.pass.cpp
Commit 2c4f60e45b3856d1a2d408f91db7432d4b7d9376 by sepavloff
[FPEnv][AArch64] Implement lowering of llvm.set.rounding

Differential Revision: https://reviews.llvm.org/D96836
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was addedllvm/test/CodeGen/AArch64/fpenv.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
Commit c86c96a710720296b6e904170f0e157d3c7dcc84 by csigg
[mlir] Load dynamic libraries in JitRunner from absolute paths so that GDB can find the symbol tables.

Reviewed By: mehdi_amini, ftynse

Differential Revision: https://reviews.llvm.org/D96759
The file was modifiedmlir/lib/ExecutionEngine/JitRunner.cpp