SuccessChanges

Summary

  1. [ConstantRangeTest] Make exhaustive testing more principled (NFC) (details)
  2. [DAG] foldSubToUSubSat - fold sub(a,trunc(umin(zext(a),b))) -> usubsat(a,trunc(umin(b,SatLimit))) (details)
  3. [X86] KnownBits - use llvm min/max intrinsics instead of (deprecated) sse intrinsics. NFCI. (details)
  4. [X86][SSE2] Remove SSE2 min/max intrinsics tests (details)
  5. [X86][SSE] Remove SSE41 min/max intrinsics tests (details)
  6. [X86][AVX] Remove AVX2 min/max intrinsics tests (details)
  7. [X86][SSE] vector-compare-combines.ll - use llvm min/max intrinsics instead of (deprecated) sse intrinsics. NFCI. (details)
  8. [X86][SSE] Use llvm min/max intrinsics instead of (deprecated) sse intrinsics. NFCI. (details)
  9. [RISCV] Pre-commit test case for D97055. NFC. (details)
  10. [libc++] Fix the build for AppleClang. (details)
  11. [InstCombine] matchBSwapOrBitReverse - remove pattern matching early-out. NFCI. (details)
Commit 2b729548f00bcab8c4dc6967bca0e6661324f27e by nikita.ppv
[ConstantRangeTest] Make exhaustive testing more principled (NFC)

The current infrastructure for exhaustive ConstantRange testing is
somewhat confusing in what exactly it tests and currently cannot even
be used for operations that produce smallest-size results, rather than
signed/unsigned envelopes.

This patch makes the testing more principled by collecting the exact
set of results of an operation into a bit set and then comparing it
against the range approximation by:

* Checking conservative correctness: All elements in the set must be
   in the range.
* Checking optimality under a given preference function: None of the
   (slack-free) ranges that can be constructed from the set are
   preferred over the computed range.

Implemented preference functions are:

* PreferSmallest: Smallest range regardless of signed/unsigned wrapping
   behavior. Probably what we would call "optimal" without further
   qualification.
* PreferSmallestUnsigned/Signed: Smallest range that has no
   unsigned/signed wrapping. We use this if our calculation is precise
   only up to signed/unsigned envelope.
* PreferSmallestNonFullUnsigned/Signed: Smallest range that has no
   unsigned/signed wrapping -- but preferring a smaller wrapping range
   over a (non-wrapping) full range. We use this if we have a fully
   precise calculation but apply a sign preference to the result
   (union/intersection). Even with a sign preference, returning a
   wrapping range is still "strictly better" than returning a full one.

This also addresses PR49273 by replacing the fragile manual range
construction logic in testBinarySetOperationExhaustive() with generic
code that isn't specialized to the particular form of ranges that set
operations can produces.

Differential Revision: https://reviews.llvm.org/D88356
The file was modifiedllvm/unittests/IR/ConstantRangeTest.cpp
Commit 761bbed264f7f524fbf0e57d0bb285b1d6e5816e by llvm-dev
[DAG] foldSubToUSubSat - fold sub(a,trunc(umin(zext(a),b))) -> usubsat(a,trunc(umin(b,SatLimit)))

This moves the last custom x86 USUBSAT fold to generic DAGCombine.

Completes PR40111

Differential Revision: https://reviews.llvm.org/D96703
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/psubus.ll
Commit ff51bcee4a2b331e3ccda54a06617165813b0572 by llvm-dev
[X86] KnownBits - use llvm min/max intrinsics instead of (deprecated) sse intrinsics. NFCI.

These are auto-upgraded to the equivalent llvm variants now.
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
The file was modifiedllvm/test/CodeGen/X86/known-bits-vector.ll
Commit 63422bcb23f8ba896a7475df5ef536cabd73a26a by llvm-dev
[X86][SSE2] Remove SSE2 min/max intrinsics tests

These are now autoupgraded to the llvm equivalents and the tests already moved sse2-intrinsics-x86-upgrade.ll
The file was modifiedllvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
Commit b9f3b305e599885de0e9784e5ea997ba4100a99e by llvm-dev
[X86][SSE] Remove SSE41 min/max intrinsics tests

These are now autoupgraded to the llvm equivalents and the tests already moved sse41-intrinsics-x86-upgrade.ll
The file was modifiedllvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
Commit 75e66b88bddfd56ebe31c0351740279fbaade458 by llvm-dev
[X86][AVX] Remove AVX2 min/max intrinsics tests

These are now autoupgraded to the llvm equivalents and the tests already moved avx2-intrinsics-x86-upgrade.ll
The file was modifiedllvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
Commit a274062bd4c9e9eb27c70f58f1938b1ea41798e5 by llvm-dev
[X86][SSE] vector-compare-combines.ll - use llvm min/max intrinsics instead of (deprecated) sse intrinsics. NFCI.

These are auto-upgraded to the equivalent llvm variants now.
The file was modifiedllvm/test/CodeGen/X86/vector-compare-combines.ll
Commit ee0dee7d38474d7e35e5d24722e3b90068dbf8a0 by llvm-dev
[X86][SSE] Use llvm min/max intrinsics instead of (deprecated) sse intrinsics. NFCI.

These are auto-upgraded to the equivalent llvm variants now.
The file was modifiedllvm/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll
The file was modifiedllvm/test/CodeGen/X86/pr14161.ll
The file was modifiedllvm/test/CodeGen/X86/2007-06-28-X86-64-isel.ll
Commit 55b75d83637d57d542be483645487d254db345af by fraser
[RISCV] Pre-commit test case for D97055. NFC.

This adds a test which unnecessarily spills mask registers.
The file was addedllvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
Commit 84dbcdd5ffa38345c617ca780d6e760beb69a96d by koraq
[libc++] Fix the build for AppleClang.

Forgot to add some parts of D93593, this should disable the tests on
Apple. Seems Louis was right ;-)
The file was modifiedlibcxx/test/std/utilities/format/format.formatter/format.parse.ctx/check_arg_id.pass.cpp
The file was modifiedlibcxx/test/std/utilities/format/format.formatter/format.parse.ctx/next_arg_id.pass.cpp
Commit 609d0c9772161ddbab148435b46efd71ba6754e3 by llvm-dev
[InstCombine] matchBSwapOrBitReverse - remove pattern matching early-out. NFCI.

recognizeBSwapOrBitReverseIdiom + collectBitParts have pattern matching to bail out early if a bswap/bitreverse pattern isn't possible - we should be able to rely on this instead without any notable change in compile time.

This is part of a cleanup towards letting matchBSwapOrBitReverse /recognizeBSwapOrBitReverseIdiom use 'root' instructions that aren't ORs (FSHL/FSHRs in particular which can be prematurely created).

Differential Revision: https://reviews.llvm.org/D97056
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp