SuccessChanges

Summary

  1. [RISCV] Fix INSERT/EXTRACT_SUBVECTOR on fractional LMUL types (details)
  2. [RISCV] Support INSERT_SUBVECTOR on vector masks (details)
  3. Use the default seed value for djb hash for StringMap (details)
  4. [AArch64] Adjust dot produce tests. NFC (details)
  5. [AArch64] Add combine for add(udot(0, x, y), z) -> udot(z, x, y). (details)
  6. Revert "Use the default seed value for djb hash for StringMap" (details)
  7. [mlir] Add convenience grouping for tensor type inference (details)
  8. [AArch64] NFC: Cleanup some SVE cost-model tests. (details)
  9. AArch64/GlobalISel: Fix using wrong calling convention for calls (details)
  10. GlobalISel: Move splitToValueTypes to generic code (details)
  11. GlobalISel: Verify G_CONCAT_VECTORS has at least 2 sources (details)
  12. [AMDGPU] Simplify SITargetLowering::isSDNodeSourceOfDivergence. NFC. (details)
  13. [Flang][OpenMP] Add semantic checks for OpenMP clauses. (details)
  14. [AMDGPU] New intrinsic void llvm.amdgcn.s.sethalt(i32) (details)
  15. [X86] Fold shuffle(not(x),undef) -> not(shuffle(x,undef)) (details)
  16. [lldb] Fix handling of `DW_AT_decl_file` according to D91014 (details)
Commit e80ca3af82f8177a1b239bab6bb25d08ec86adeb by fraser
[RISCV] Fix INSERT/EXTRACT_SUBVECTOR on fractional LMUL types

This patch fixes a bug where the lowering for INSERT_SUBVECTOR and
EXTRACT_SUBVECTOR would insist on first extracting a register-aligned
LMUL1 vector type before perfoming the slide up/down. This was even if
the vector was a fractional LMUL type, in which case the aligned
EXTRACT_SUBVECTOR was invalid.

This issue only occurred for scalable vector types, but a variety of
tests for both scalable and fixed-length vectors have been added to
ensure this does not regress in the future.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D97556
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
Commit 3fea9226eecd2069bea93c4fe5955b0b5ff316f7 by fraser
[RISCV] Support INSERT_SUBVECTOR on vector masks

Like with EXTRACT_SUBVECTOR, INSERT_SUBVECTOR poses a problem
for vector masks as RVV isn't able to slide mask types around. We choose
instead to bitcast to equivalently-sized i8 types where we can, else we
zero-extend, perform the operation, and truncate back down.

One test was left disabled due to a crash in the legalizer.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D97559
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
Commit d84440ec919019ac446241db72cfd905c6ac9dfa by sguelton
Use the default seed value for djb hash for StringMap

See original comment in 560ce2c70fb1fe8e4b9b5e39c54e494a50373ba8
Baiscally the default seed value results in less collision, but changes the
iteration order, which matters for a few test cases.

Differential Revision: https://reviews.llvm.org/D97396
The file was modifiedllvm/test/DebugInfo/X86/debug-pubtables-dwarf64.ll
The file was modifiedllvm/test/DebugInfo/X86/gnu-public-names.ll
The file was modifiedllvm/test/DebugInfo/Generic/debug-names-hash-collisions.ll
The file was modifiedllvm/lib/Support/StringMap.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/section_sizes_macho.test
The file was modifiedllvm/test/DebugInfo/Generic/accel-table-hash-collisions.ll
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/section_sizes_elf.test
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/statistics.ll
Commit 7d6e4ed1558fefae98cde41d4139131201bd2416 by david.green
[AArch64] Adjust dot produce tests. NFC

This regenerates and splits out the dotproduce tests, adding a few extra
tests for upcoming changes.
The file was addedllvm/test/CodeGen/AArch64/neon-dotpattern.ll
The file was modifiedllvm/test/CodeGen/AArch64/neon-dot-product.ll
The file was addedllvm/test/CodeGen/AArch64/neon-dotreduce.ll
Commit 7abf7dd5efe257b5e7ff72199aa513e7a513b742 by david.green
[AArch64] Add combine for add(udot(0, x, y), z) -> udot(z, x, y).

Given a zero input for a udot, an add can be folded in to take the place
of the input, using thte addition that the instruction naturally
performs.

Differential Revision: https://reviews.llvm.org/D97188
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/neon-dot-product.ll
The file was modifiedllvm/test/CodeGen/AArch64/neon-dotreduce.ll
Commit 7b319df29bf4ebe690ca0c41761e46d8b0081293 by sguelton
Revert "Use the default seed value for djb hash for StringMap"

This reverts commit d84440ec919019ac446241db72cfd905c6ac9dfa.

It breaks (at least) lldb and lld validation

https://lab.llvm.org/buildbot/#/builders/68/builds/7837
https://lab.llvm.org/buildbot/#/builders/36/builds/5495
The file was modifiedllvm/test/DebugInfo/X86/gnu-public-names.ll
The file was modifiedllvm/test/DebugInfo/X86/debug-pubtables-dwarf64.ll
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/section_sizes_macho.test
The file was modifiedllvm/test/DebugInfo/Generic/debug-names-hash-collisions.ll
The file was modifiedllvm/test/DebugInfo/Generic/accel-table-hash-collisions.ll
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/section_sizes_elf.test
The file was modifiedllvm/lib/Support/StringMap.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/statistics.ll
Commit 2f0b4db5ea52148a91c57fcb192856bab567de5a by jpienaar
[mlir] Add convenience grouping for tensor type inference

For ops that produces tensor types and implement the shaped type component interface, the type inference interface can be used. Create a grouping of these together to make it easier to specify (it cannot be added into a list of traits, but must rather be appended/concated to one as it isn't a trait but a list of traits).

Differential Revision: https://reviews.llvm.org/D97636
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/include/mlir/Interfaces/InferTypeOpInterface.td
Commit f870c551f090b6edc83892efd68e9e96ed5c19a8 by sander.desmalen
[AArch64] NFC: Cleanup some SVE cost-model tests.

Moved some of the `sve-getIntrinsicCost-<..>` into a single sve-intrinsics.ll
file, and simplified the tests a bit by bundling all the intrinsics in one
function (instead of testing one intrinsic per function). That makes it easier
to see the cost of the intrinsics.
The file was removedllvm/test/Analysis/CostModel/AArch64/sve-getIntrinsicInstrCost-vec-insert-extract.ll
The file was removedllvm/test/Analysis/CostModel/AArch64/sve-getIntrinsicInstrCost-vector-reduce.ll
The file was removedllvm/test/Analysis/CostModel/AArch64/sve-getIntrinsicInstrCost-gather.ll
The file was addedllvm/test/Analysis/CostModel/AArch64/sve-gather.ll
The file was addedllvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
The file was removedllvm/test/Analysis/CostModel/AArch64/sve-getIntrinsicInstrCost-cctz-ctlz.ll
The file was removedllvm/test/Analysis/CostModel/AArch64/sve-getIntrinsicInstrCost-scatter.ll
The file was removedllvm/test/Analysis/CostModel/AArch64/sve-getIntrinsicInstrCost-vector-reverse.ll
The file was addedllvm/test/Analysis/CostModel/AArch64/sve-scatter.ll
Commit b4bfe29415ba9524f56d4ea57eb3adbdb4a82fc9 by Matthew.Arsenault
AArch64/GlobalISel: Fix using wrong calling convention for calls

This was reusing the parent function calling convention instead of the
callee. I'm not sure if there's a case where there's an observable
difference.

I previously missed this in b72a23650f573299aec30846fb844c3558921fb8
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
Commit 6c260d3bc059b29aa62b91378be4afa2d98d8067 by Matthew.Arsenault
GlobalISel: Move splitToValueTypes to generic code

I copied the nearly identical function from AArch64 into AMDGPU, so
fix this duplication.

Mips and X86 have their own more exotic versions which should be
removed. However replacing those is better left for a separate patch
since it requires other changes to avoid regressions.
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
The file was modifiedllvm/lib/Target/ARM/ARMCallLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.h
The file was modifiedllvm/lib/Target/Mips/MipsCallLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.h
The file was modifiedllvm/lib/Target/ARM/ARMCallLowering.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/CallLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86CallLowering.cpp
Commit 361cfdf2284193365f2830008625975f55112428 by Matthew.Arsenault
GlobalISel: Verify G_CONCAT_VECTORS has at least 2 sources
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/test/MachineVerifier/test_g_concat_vectors.mir
Commit 48ca5d3398be7b9925d76d72bde0e4bc19c34245 by jay.foad
[AMDGPU] Simplify SITargetLowering::isSDNodeSourceOfDivergence. NFC.

Check for read-modify-write AtomicSDNodes instead of using an exhaustive
list of ISD opcodes.

Differential Revision: https://reviews.llvm.org/D97671
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 75ef78ffee7f7d6efa45af19f24fba7616290300 by praveen
[Flang][OpenMP] Add semantic checks for OpenMP clauses.

Semantic checks for the following OpenMP 4.5 clauses.

1. 2.15.4.2 - Copyprivate clause
2. 2.15.3.4 - Firstprivate clause
3. 2.15.3.5 - Lastprivate clause

Add related test cases and resolve test cases marked as XFAIL.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D91920
The file was addedflang/test/Semantics/omp-copyprivate02.f90
The file was addedflang/test/Semantics/omp-copyprivate01.f90
The file was modifiedflang/test/Semantics/omp-single02.f90
The file was addedflang/test/Semantics/omp-copyprivate03.f90
The file was modifiedflang/lib/Semantics/check-directive-structure.h
The file was modifiedflang/lib/Semantics/check-omp-structure.h
The file was modifiedflang/test/Semantics/omp-single01.f90
The file was modifiedflang/test/Semantics/omp-clause-validity01.f90
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp
The file was addedflang/test/Semantics/omp-firstprivate01.f90
The file was addedflang/test/Semantics/omp-lastprivate01.f90
The file was modifiedflang/include/flang/Semantics/symbol.h
The file was modifiedflang/lib/Semantics/resolve-directives.cpp
The file was addedflang/test/Semantics/omp-lastprivate02.f90
Commit 796a60d2ea32320f298f91beb04f015934598821 by jay.foad
[AMDGPU] New intrinsic void llvm.amdgcn.s.sethalt(i32)

The expected use case is for frontends to insert this into
shaders that are to be run under a debugger. The shader can
then be resumed or single stepped from the point of the call
under debugger control.

Differential Revision: https://reviews.llvm.org/D97670
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td
The file was addedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sethalt.ll
The file was modifiedllvm/lib/Target/AMDGPU/SOPInstructions.td
Commit 925093d88ae74560a8e94cf66f95d60ea3ffa2d3 by llvm-dev
[X86] Fold shuffle(not(x),undef) -> not(shuffle(x,undef))

Move NOT out to expose more AND -> ANDN folds
The file was modifiedllvm/test/CodeGen/X86/combine-bitselect.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/promote-cmp.ll
Commit 7ec7876feda412b6edad0d83565395ef2fd5a004 by weratt
[lldb] Fix handling of `DW_AT_decl_file` according to D91014

Apply changes from https://reviews.llvm.org/D91014 to other places where DWARF entries are being processed.

Differential Revision: https://reviews.llvm.org/D96778
The file was addedlldb/test/Shell/SymbolFile/DWARF/Inputs/DW_TAG_variable-DW_AT_decl_file-DW_AT_abstract_origin-crosscu2.s
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was addedlldb/test/Shell/SymbolFile/DWARF/DW_TAG_variable-DW_AT_decl_file-DW_AT_abstract_origin-crosscu1.s