FailedChanges

Summary

  1. Add Metadata to Transformer tooling (details)
  2. [lldb/Scripts] (details)
  3. [libc++abi] Remove empty source file cxa_unexpected.cpp (details)
  4. [clang-tidy] Sanity checks in ClangTidyTest header. (details)
  5. [Alignment][NFC] TargetLowering::allowsMemoryAccessForAlignment (details)
  6. [clang-tidy] performance-faster-string-find string-view (details)
  7. [CodeComplete] Tweak completion for else. (details)
  8. [ARM] Allow rounding intrinsics to be tail predicated (details)
  9. [lldb/Test] Skip recognizer tests when Python is disabled (details)
  10. [mlir] [VectorOps] Replace zero fma with mult for vector.contract (details)
  11. [ARM][MVE] Tail-predication: clean-up of unused code (details)
  12. X86: Use Register (details)
  13. AMDGPU: Use Register (details)
  14. TailDuplicator: Use Register (details)
  15. BranchFolding: Use Register (details)
  16. RegAlloc: Start using Register (details)
  17. [libc++abi] Remove unused include of <sys/types.h> (details)
  18. [ARM] Allow the usub_sat and ssub_sat intrinsics to be tail predicated (details)
  19. Pass MDFieldPrinter::printAPInt APInt arg by reference not value. (details)
  20. [ARM] Allow the fabs intrinsic to be tail predicated (details)
  21. [clang][docs] Add note about using `-flto` with `-g` on macOS (details)
  22. [PowerPC][NFC] Rename/organize encoding test files for ISA3.1 (details)
  23. [InstCombine] New FMA tests and regenerate tests. NFC (details)
  24. [MVT] Add new MVT types for RISC-V vector. (details)
  25. [flang] Silence some warnings from clang-tidy (details)
Commit 9945bd5911636e7f821ac82fdcf8fdb22126e7dc by yitzhakm
Add Metadata to Transformer tooling

This change adds a Metadata field to ASTEdit, Edit, and AtomicChange so that
edits can have associated metadata and that metadata can be constructed with
Transformer-based RewriteRules. Metadata is ignored when applying edits to
source, but other consumers of AtomicChange can use this metadata to direct how
they want to consume each edit.

Reviewed By: ymandel, gribozavr2

Differential Revision: https://reviews.llvm.org/D82226
The file was modifiedclang/include/clang/Tooling/Transformer/RewriteRule.h
The file was modifiedclang/lib/Tooling/Refactoring/AtomicChange.cpp
The file was modifiedclang/include/clang/Tooling/Refactoring/AtomicChange.h
The file was modifiedclang/lib/Tooling/Transformer/Transformer.cpp
The file was modifiedclang/unittests/Tooling/TransformerTest.cpp
The file was modifiedclang/unittests/Tooling/RefactoringTest.cpp
The file was modifiedclang/lib/Tooling/Transformer/RewriteRule.cpp
Commit e55a09793d689f42c17f55be861773b6a65751b2 by pavel
[lldb/Scripts]

Fix analyze-project-deps.py. "lldb/Plugins" (home of Plugins.def) does
not depend on anything. Make sure this does not crash the script.
The file was modifiedlldb/scripts/analyze-project-deps.py
Commit 9c795481e2e318a906cc7826aa0144aaaa8cd3dd by Louis Dionne
[libc++abi] Remove empty source file cxa_unexpected.cpp
The file was removedlibcxxabi/src/cxa_unexpected.cpp
The file was modifiedlibcxxabi/src/CMakeLists.txt
The file was modifiedllvm/utils/gn/secondary/libcxxabi/src/BUILD.gn
Commit 833273a81250213d3ba85ca5419d03155604ada2 by n.james93
[clang-tidy] Sanity checks in ClangTidyTest header.

Motivated by a suspicously failing build, but also good to have anyway in general.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D82815
The file was modifiedclang-tools-extra/unittests/clang-tidy/ClangTidyTest.h
Commit 423458ec09d647050f756e3ee4ca06901239d87c by gchatelet
[Alignment][NFC] TargetLowering::allowsMemoryAccessForAlignment

First patch of a series to adapt TargetLowering::allowsXXX functions

This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Differential Revision: https://reviews.llvm.org/D81372
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
Commit 2efba0e8122aeca29f878c0e3056a4552d20c720 by n.james93
[clang-tidy] performance-faster-string-find string-view

Extend the default string like classes to include `std::basic_string_view`.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D82720
The file was modifiedclang-tools-extra/clang-tidy/performance/FasterStringFindCheck.cpp
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/performance-faster-string-find.cpp
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/performance-faster-string-find.rst
Commit 8ba4867c27000ee029ab70a1194050d884fce6c7 by n.james93
[CodeComplete] Tweak completion for else.

If an `if` statement uses braces for its `then` block, suggest braces for the `else` and `else if` completion blocks, Otherwise don't suggest them.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D82626
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
The file was modifiedclang/lib/Parse/ParseStmt.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/CodeCompletion/patterns.cpp
Commit d9cb811cbfd9d34816497713b318ccc34ce045b7 by samteb02
[ARM] Allow rounding intrinsics to be tail predicated

This patch stops the trunc, rint, round, floor and ceil intrinsics from blocking tail predication.

Differential Revision: https://reviews.llvm.org/D82553
The file was modifiedllvm/lib/Target/ARM/MVETailPredication.cpp
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-intrinsic-round.ll
Commit 69b2d9f42f6adbd0c06264dc42b4be5760689eac by Jonas Devlieghere
[lldb/Test] Skip recognizer tests when Python is disabled

The `frame recognizer` command only exists when Python scripting is
enabled. Therefore the test should be made conditional on Python.
Without it, the test fails with "'frame recognizer' is not a known
command."
The file was addedlldb/test/Shell/Recognizer/lit.local.cfg
Commit 63b3933d0c3381447a706193d3c0d84927a0fbed by ajcbik
[mlir] [VectorOps] Replace zero fma with mult for vector.contract

More efficient implementation of the multiply-reduce pair,
no need to add in a zero vector. Microbenchmarking on AVX2
yields the following difference in vector.contract speedup
(over strict-order scalar reduction).

SPEEDUP     SIMD-fma SIMD-mul
4x4     1.45 2.00
8x8     1.40 1.90
32x32    5.32 5.80

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D82833
The file was modifiedmlir/test/Dialect/Vector/vector-contract-transforms.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
Commit af45907653fd312264632b616eff0fad1ae1eb2e by sjoerd.meijer
[ARM][MVE] Tail-predication: clean-up of unused code

After the rewrite of this pass (D79175) I missed one thing: the inserted VCTP
intrinsic can be cloned to exit blocks if there are instructions present in it
that perform the same operation, but this wasn't triggering anymore. However,
it turns out that for handling reductions, see D75533, it's actually easier not
not to have the VCTP in exit blocks, so this removes that code.

This was possible because it turned out that some other code that depended on
this, rematerialization of the trip count enabling more dead code removal
later, wasn't doing much anymore due to more aggressive dead code removal that
was added to the low-overhead loops pass.

Differential Revision: https://reviews.llvm.org/D82773
The file was modifiedllvm/lib/Target/ARM/MVETailPredication.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-reduce-mve-tail.ll
Commit 249933f254e1eed3c1b90384ef4616b9e87e22a5 by Matthew.Arsenault
X86: Use Register
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit cac655f2330000df68f86a67a428f1cac0259bb3 by Matthew.Arsenault
AMDGPU: Use Register
The file was modifiedllvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Commit edb4a5cb369bd87e69ffe8f30132c7b5dd5268a5 by Matthew.Arsenault
TailDuplicator: Use Register
The file was modifiedllvm/include/llvm/CodeGen/TailDuplicator.h
The file was modifiedllvm/lib/CodeGen/TailDuplicator.cpp
Commit af1eeaf38072bca5fcfc0b1483b2d078cdfb2bef by Matthew.Arsenault
BranchFolding: Use Register
The file was modifiedllvm/lib/CodeGen/BranchFolding.cpp
Commit b7f6ecf0c7d4ac86ed4983311d0501e75c659e25 by Matthew.Arsenault
RegAlloc: Start using Register
The file was modifiedllvm/lib/CodeGen/LiveRangeEdit.cpp
The file was modifiedllvm/lib/CodeGen/RegAllocPBQP.cpp
The file was modifiedllvm/lib/CodeGen/RegAllocBasic.cpp
The file was modifiedllvm/lib/CodeGen/InlineSpiller.cpp
The file was modifiedllvm/lib/CodeGen/LiveDebugValues.cpp
The file was modifiedllvm/lib/CodeGen/RegAllocBase.h
The file was modifiedllvm/lib/CodeGen/LiveDebugVariables.cpp
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
The file was modifiedllvm/lib/CodeGen/RegAllocBase.cpp
The file was modifiedllvm/lib/CodeGen/RegisterCoalescer.cpp
The file was modifiedllvm/include/llvm/CodeGen/LiveRangeEdit.h
The file was modifiedllvm/lib/CodeGen/LiveDebugVariables.h
Commit c2547f1554d3f1a1af882d594529053699b14839 by Louis Dionne
[libc++abi] Remove unused include of <sys/types.h>

I ran into an error while trying to build libc++abi for a platform that
doesn't have <sys/types.h>. I couldn't find what <sys/types.h> was used
for in the header, so I think it's fine to remove it.

Differential Revision: https://reviews.llvm.org/D82810
The file was modifiedlibcxxabi/src/cxa_guard_impl.h
Commit 66fa313999923d5e0ee08774039aac2c553112c2 by samteb02
[ARM] Allow the usub_sat and ssub_sat intrinsics to be tail predicated

This patch stops the usub_sat and ssub_sat intrinsics from blocking tail predication.

Differential Revision: https://reviews.llvm.org/D82571
The file was modifiedllvm/lib/Target/ARM/MVETailPredication.cpp
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-intrinsic-sub-sat.ll
Commit 32f8cd9a6a5600aed7d4001b3a16a191a4db90ab by llvm-dev
Pass MDFieldPrinter::printAPInt APInt arg by reference not value.

Noticed by clang-tidy performance-unnecessary-value-param warning.
The file was modifiedllvm/lib/IR/AsmWriter.cpp
Commit 3324e3a6eeb5aab8b704509bb4b40e652da3799d by samteb02
[ARM] Allow the fabs intrinsic to be tail predicated

This patch stops the fabs intrinsic from blocking tail predication.

Differential Revision: https://reviews.llvm.org/D82570
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-intrinsic-fabs.ll
The file was modifiedllvm/lib/Target/ARM/MVETailPredication.cpp
Commit a1f4e48c4aca8c7339be2018926baf860a562f13 by Jonas Devlieghere
[clang][docs] Add note about using `-flto` with `-g` on macOS

If -Wl,object_path_lto,<lto-filename>.o is not passed at link time
when compiling and linking in separate steps with -flto and -g, the
temporary file used for Link Time Optimization is deleted by the linker,
so the executable is missing debug symbols and can't be easily debugged,
and dsymutil can't be run.

Document this behaviour.

Differential revision: https://reviews.llvm.org/D82733
The file was modifiedclang/docs/CommandGuide/clang.rst
Commit 3163269275dc6c778e5be005454ef1ffc8ed4a20 by lei
[PowerPC][NFC] Rename/organize encoding test files for ISA3.1

Rename `future*` encoding test files to include ISA3.1 in the file name
and combine with exisitng ISA3.1 instruction encoding tests that were
added into `p10*` test files.

Keeping the `p10*` files for now to ensure we don't add more to it.
Will remove once all ISA3.1 instruction are implemented.
The file was modifiedllvm/test/MC/Disassembler/PowerPC/p10insts.txt
The file was addedllvm/test/MC/PowerPC/ppc64-encoding-ISA31.s
The file was removedllvm/test/MC/PowerPC/future-reloc.s
The file was removedllvm/test/MC/PowerPC/future.s
The file was removedllvm/test/MC/PowerPC/future-errors.s
The file was removedllvm/test/MC/Disassembler/PowerPC/future-invalid.txt
The file was modifiedllvm/test/MC/PowerPC/p10.s
The file was addedllvm/test/MC/PowerPC/ppc64-encoding-ISA31-pcrel-reloc.s
The file was addedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31-invalid.txt
The file was addedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt
The file was addedllvm/test/MC/PowerPC/ppc64-encoding-ISA31-errors.s
The file was removedllvm/test/MC/Disassembler/PowerPC/futureinsts.txt
Commit 787b1a474687831aac4815947e2f2541262b5b9d by david.green
[InstCombine] New FMA tests and regenerate tests. NFC
The file was modifiedllvm/test/Transforms/InstCombine/fma.ll
Commit a7b0f391852b6dd9001b5247269612b3d2c3ce31 by kai.wang
[MVT] Add new MVT types for RISC-V vector.

In RISC-V vector extension, users could group multiple vector registers
as one pseudo register. In mixed width operations, users could use
partial vector registers to reduce the register pressure. The parameter
to control register grouping and partial use is called LMUL. LMUL is a
part of the type. So, we have a bunch of vector types. In order to
support all these types, we need new MVT types in LLVM. In this patch, I
added several MVT types that are used in RISC-V vector implementation.
This is a standalone patch for MVT types without RISC-V related implementation.

Differential revision: https://reviews.llvm.org/D81724
The file was modifiedllvm/lib/CodeGen/ValueTypes.cpp
The file was modifiedllvm/include/llvm/Support/MachineValueType.h
The file was modifiedllvm/include/llvm/CodeGen/ValueTypes.td
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
Commit 98202edacbad2370105b8a5b837ad35569d7a387 by tkeith
[flang] Silence some warnings from clang-tidy

Disable some of the warnings from clang-tidy, in particular,
`readability-identifier-naming`. They add clutter to reviews.

Differential Revision: https://reviews.llvm.org/D82795
The file was addedflang/.clang-tidy