Changes

 [NFC] Test commit, revert whitespace change
As per the Developer Policy, upon obtaining commit access.

[OPENMP50]Support lastprivate conditional updates in inc/dec unary ops.
Added support for checking of updates of variables used in unary 
pre(pos) inc/dec expressions.

[X86] Rename vec-strict-*-cmp.ll to vec-strict-cmp-*.ll to match other
strict files wich have the size at the end. NFC

[LegalizeTypes] Add widening support for STRICT_FSETCC/FSETCCS
This patch adds widening which really just scalarizes because we don't
have a strategy for the extra elements we would need to pad with.
Differential Revision: https://reviews.llvm.org/D72193

[lldb/Docs] Describe optional dependencies on build page.
List the different CMake flags controlling the optional dependencies as 
per the discussion on the mailing list:
http://lists.llvm.org/pipermail/lldb-dev/2020-January/015867.html

[X86] Improve v4i32->v4f64 uint_to_fp for AVX1/AVX2 targets.
Use zext+or+fsub to do the conversion. Similar to D71971.
Differential Revision: https://reviews.llvm.org/D71971

llc/MIR: Fix setFunctionAttributes for MIR functions
A random set of attributes are implemented by llc/opt forcing the string
attributes on the IR functions before processing anything. This would
not happen for MIR functions, which have not yet been created at this
point.
Use a callback in the MIR parser, purely to avoid dealing with the 
ugliness that the command line flags are in a .inc file, and would 
require allowing access to these flags from multiple places (either from
the MIR parser directly, or a new utility pass to implement these 
flags). It would probably be better to cleanup the flag handling into a
separate library.
This is in preparation for treating more command line flags with a 
corresponding function attribute in a more uniform way. The fast math 
flags in particular have a messy system where the command line flag sets
the behavior from a function attribute if present, and otherwise the
command line flag. This means if any other pass tries to inspect the
function attributes directly, it will be inconsistent with the intended
behavior. This is also inconsistent with the current behavior of -mcpu
and -mattr, which overwrites any pre-existing function attributes. I
would like to move this to consistenly have the command line flags not
overwrite any pre-existing attributes, and to always ensure the command
line flags are consistent with the function attributes.

AMDGPU: Use ImmLeaf for inline immediate predicates

AMDGPU: Use ImmLeaf
This solves one GlobalISel importer error, but the pattern still fails 
for another reason.

AMDGPU: Fix legalizing f16 fpow
The existing test only covered one case for r600. The use of mul_legacy
also looks suspicious to me, but leave it for now. The patterns are also
not making use of source modifiers.

GlobalISel: Start adding computeNumSignBits to GISelKnownBits

GlobalISel: Correct result type for G_FCMP in lowerFPTOUI
Using the final result type doesn't make any sense. Use the natural 
default boolean type for the select condition.

GlobalISel: Fix unsupported legalize action
This would complain about invalid legalizer rules otherwise.
Mark some operations as unsupported for AMDGPU. This currently seems to
produce the same legalize error as when no rules are defined, but 
eventually this should produce a proper user facing error.

[Diagnostic] make Wmisleading-indendation not warn about labels
Reviewers: aaron.ballman, xbolva00
Reviewed By: aaron.ballman
Subscribers: nickdesaulniers, nathanchance
Differential Revision: https://reviews.llvm.org/D72202

[PowerPC][NFC] Rename record instructions to use _rec suffix instead of
o
We use o suffix to indicate record form instuctions,
(as it is similar to dot '.' in mne?)
This was fine before, as we did not support XO-form. However, with
https://reviews.llvm.org/D66902, we now have XO-form support.
It becomes confusing now to still use 'o' for record form, and it is
weird to have something like 'Oo' .
This patch rename all 'o' instructions to use '_rec' instead. Also
rename `isDot` to `isRecordForm`.
Reviewed By: #powerpc, hfinkel, nemanjai, steven.zhang, lkail
Differential Revision: https://reviews.llvm.org/D70758

[FileCheck] Remove FileCheck prefix in API
Summary: When FileCheck was made a library, types in the public API were
renamed to add a FileCheck prefix, such as Pattern to FileCheckPattern.
Many types were moved into a private interface and thus don't need this 
prefix anymore. This commit removes those unneeded prefixes.
Reviewers: jhenderson, jdenny, probinson, grimar, arichardson, rnk
Reviewed By: jhenderson
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72186

Don't rely on 'l'(ell) modifiers to indicate a label reference
Summary: It's not necessary to use an 'l'(ell) modifier when referencing
a label. Treat block addresses and MBB references as if the modifier is
used anyway. This prevents us from generating references to ficticious 
labels.
Reviewers: jyknight, nickdesaulniers, hfinkel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71849

[CMake] Pass symlink dependency to add_llvm_install_targets explicitly
The install-${name}-stripped targets don't strip when ${name} is being 
symlinked, e.g. llvm-ar or llvm-objcopy. The problem is that 
llvm_install_symlink passes install-${dest} as a dependency of 
install-${name}, e.g. install-llvm-ar becomes a dependency of both 
install-llvm-ranlib and install-llvm-ranlib-stripped. What this means is 
that when installing a distribution that contains both llvm-ar and 
llvm-ranlib is that first the stripped version of llvm-ar is installed
(by the install-llvm-ar-stripped target) and then it's overwritten by an 
unstripped version of llvm-ar bnecause install-llvm-ranlib-stripped has 
install-llvm-ranlib as a dependency as mentioned earlier. To avoid this 
issue, rather than passing the install-${dest} as dependency, we 
introduce a new argument to add_llvm_install_targets for symlink target 
which expands it into an appropriate dependency, i.e. install-${dest} 
for install-${name} target and install-${dest}-stripped for 
install-${name}-stripped.
Differential Revision: https://reviews.llvm.org/D71951

[NSArray] Remove a very old and deprecated formatter.
Checked with the Foundation folks.

[msan] Check qsort input.
Summary: Qsort interceptor suppresses all checks by unpoisoning the data
in the wrapper of a comparator function, and then unpoisoning the output
array as well.
This change adds an explicit run of the comparator on all elements of 
the input array to catch any sanitizer bugs.
Reviewers: vitalybuka
Subscribers: #sanitizers, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D71780

[X86] Move an enum definition into a header to simplify future patches
[NFC]

Change the patterns to include the prefix '= ' so we don't pass
errantly. Looking at a sometimes-passing test case on a platform where
random values were being returned - sometimes the expected digit ('1' or
'2') would be included in the random returned value.  Add a prefix to
reduce the likelihood of this a bit.

GlobalISel: Implement lower for G_INTRINSIC_ROUND
Mostly copied from AMDGPU lowering implementation, except used G_SITOFP
instead of directly creating a select on -1.0, 0.0.

TableGen/GlobalISel: Handle default operands that are used
Copy the logic from the existing handling in the DAG matcher emittter.
This will enable some AMDGPU pattern cleanups without breaking 
GlobalISel tests, and eventually handle importing more patterns.
The test is a bit annoying since the sections seem to randomly sort 
themselves if anything else is added in the future.

AMDGPU/GlobalISel: Replace handling of boolean values
This solves selection failures with generated selection patterns, which
would fail due to inferring the SGPR reg bank for virtual registers with
a set register class instead of VCC bank. Use instruction selection
would constrain the virtual register to a specific class, so when the
def was selected later the bank no longer was set to VCC.
Remove the SCC reg bank. SCC isn't directly addressable, so it requires
copying from SCC to an allocatable 32-bit register during selection, so
these might as well be treated as 32-bit SGPR values.
Now any scalar boolean value that will produce an outupt in SCC should 
be widened during RegBankSelect to s32. Any s1 value should be a vector
boolean during selection. This makes the vcc register bank unambiguous
with a normal SGPR during selection.
Summary of how this should now work:
- G_TRUNC is always a no-op, and never should use a vcc bank result.
- SALU boolean operations should be promoted to s32 in RegBankSelect
 apply mapping
- An s1 value means vcc bank at selection. The exception is for
 legalization artifacts that use s1, which are never VCC. All other
 contexts should infer the VCC register classes for s1 typed
 registers. The LLT for the register is now needed to infer the
 correct register class. Extensions with vcc sources should be
 legalized to a select of constants during RegBankSelect.
- Copy from non-vcc to vcc ensures high bits of the input value are
 cleared during selection.
- SALU boolean inputs should ensure the inputs are 0/1. This includes
 select, conditional branches, and carry-ins.
There are a few somewhat dirty details. One is that G_TRUNC/G_*EXT 
selection ignores the usual register-bank from register class functions,
and can't handle truncates with VCC result banks. I think this is OK,
since the artifacts are specially treated anyway. This does require some
care to avoid producing cases with vcc. There will also be no 100%
reliable way to verify this rule is followed in selection in case of
register classes, and violations manifests themselves as invalid copy
instructions much later.
Standard phi handling also only considers the bank of the result 
register, and doesn't insert copies to make the source banks match. This
doesn't work for vcc, so we have to manually correct phi inputs in this
case. We should add a verifier check to make sure there are no phis with
mixed vcc and non-vcc register bank inputs.
There's also some duplication with the LegalizerHelper, and some code 
which should live in the helper. I don't see a good way to share special
knowledge about what types to use for intermediate operations depending
on the bank for example. Using the helper to replace extensions with
selects also seems somewhat awkward to me.
Another issue is there are some contexts calling getRegBankFromRegClass
that apparently don't have the LLT type for the register, but I haven't
yet run into a real issue from this.
This also introduces new unnecessary instructions in most cases, since 
we don't yet try to optimize out the zext when the source is known to 
come from a compare.

AMDGPU/GlobalISel: Select G_UADDE/G_USUBE

Use FileCheck instead of grep

tools/timeit.sh: be flexible while parsing perf-stat output
Summary: There are some minor changes on the perf-stat output that needs
to be accommodated so we parse the time data correctly.
Reviewers: jmolloy, kongyi
Reviewed by: kongyi
Differential Revision: https://reviews.llvm.org/D72198